fsl_gpt.h

/*
 * Copyright (c) 2015, Freescale Semiconductor, Inc.
 * Copyright 2016-2020 NXP
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */
 
#ifndef _FSL_GPT_H_
#define _FSL_GPT_H_
 
#include "fsl_common.h"
 
/*******************************************************************************
 * Definitions
 ******************************************************************************/
 
#define FSL_GPT_DRIVER_VERSION (MAKE_VERSION(2, 0, 4))
typedef enum _gpt_clock_source
{
    kGPT_ClockSource_Off      = 0U, 
    kGPT_ClockSource_Periph   = 1U, 
    kGPT_ClockSource_HighFreq = 2U, 
    kGPT_ClockSource_Ext      = 3U, 
    kGPT_ClockSource_LowFreq  = 4U, 
    kGPT_ClockSource_Osc      = 5U, 
} gpt_clock_source_t;
 
typedef enum _gpt_input_capture_channel
{
    kGPT_InputCapture_Channel1 = 0U, 
    kGPT_InputCapture_Channel2 = 1U, 
} gpt_input_capture_channel_t;
 
typedef enum _gpt_input_operation_mode
{
    kGPT_InputOperation_Disabled = 0U, 
    kGPT_InputOperation_RiseEdge = 1U, 
    kGPT_InputOperation_FallEdge = 2U, 
    kGPT_InputOperation_BothEdge = 3U, 
} gpt_input_operation_mode_t;
 
typedef enum _gpt_output_compare_channel
{
    kGPT_OutputCompare_Channel1 = 0U, 
    kGPT_OutputCompare_Channel2 = 1U, 
    kGPT_OutputCompare_Channel3 = 2U, 
} gpt_output_compare_channel_t;
 
typedef enum _gpt_output_operation_mode
{
    kGPT_OutputOperation_Disconnected = 0U, 
    kGPT_OutputOperation_Toggle       = 1U, 
    kGPT_OutputOperation_Clear        = 2U, 
    kGPT_OutputOperation_Set          = 3U, 
    kGPT_OutputOperation_Activelow    = 4U, 
} gpt_output_operation_mode_t;
 
typedef enum _gpt_interrupt_enable
{
    kGPT_OutputCompare1InterruptEnable = GPT_IR_OF1IE_MASK, 
    kGPT_OutputCompare2InterruptEnable = GPT_IR_OF2IE_MASK, 
    kGPT_OutputCompare3InterruptEnable = GPT_IR_OF3IE_MASK, 
    kGPT_InputCapture1InterruptEnable  = GPT_IR_IF1IE_MASK, 
    kGPT_InputCapture2InterruptEnable  = GPT_IR_IF2IE_MASK, 
    kGPT_RollOverFlagInterruptEnable   = GPT_IR_ROVIE_MASK, 
} gpt_interrupt_enable_t;
 
typedef enum _gpt_status_flag
{
    kGPT_OutputCompare1Flag = GPT_SR_OF1_MASK, 
    kGPT_OutputCompare2Flag = GPT_SR_OF2_MASK, 
    kGPT_OutputCompare3Flag = GPT_SR_OF3_MASK, 
    kGPT_InputCapture1Flag  = GPT_SR_IF1_MASK, 
    kGPT_InputCapture2Flag  = GPT_SR_IF2_MASK, 
    kGPT_RollOverFlag       = GPT_SR_ROV_MASK, 
} gpt_status_flag_t;
 
typedef struct _gpt_init_config
{
    gpt_clock_source_t clockSource; 
    uint32_t divider;               
    bool enableFreeRun;             
    bool enableRunInWait;           
    bool enableRunInStop;           
    bool enableRunInDoze;           
    bool enableRunInDbg;            
    bool enableMode;                
} gpt_config_t;
 
/*******************************************************************************
 * API
 ******************************************************************************/
 
#if defined(__cplusplus)
extern "C" {
#endif
 
void GPT_Init(GPT_Type *base, const gpt_config_t *initConfig);
 
void GPT_Deinit(GPT_Type *base);
 
void GPT_GetDefaultConfig(gpt_config_t *config);
 
static inline void GPT_SoftwareReset(GPT_Type *base)
{
    base->CR |= GPT_CR_SWR_MASK;
    /* Wait reset finished. */
    while ((base->CR & GPT_CR_SWR_MASK) == GPT_CR_SWR_MASK)
    {
    }
}
 
static inline void GPT_SetClockSource(GPT_Type *base, gpt_clock_source_t gptClkSource)
{
    if (gptClkSource == kGPT_ClockSource_Osc)
    {
        base->CR = (base->CR & ~GPT_CR_CLKSRC_MASK) | GPT_CR_EN_24M_MASK | GPT_CR_CLKSRC(gptClkSource);
    }
    else
    {
        base->CR = (base->CR & ~(GPT_CR_CLKSRC_MASK | GPT_CR_EN_24M_MASK)) | GPT_CR_CLKSRC(gptClkSource);
    }
}
 
static inline gpt_clock_source_t GPT_GetClockSource(GPT_Type *base)
{
    return (gpt_clock_source_t)(uint8_t)((base->CR & GPT_CR_CLKSRC_MASK) >> GPT_CR_CLKSRC_SHIFT);
}
 
static inline void GPT_SetClockDivider(GPT_Type *base, uint32_t divider)
{
    assert(divider - 1U <= GPT_PR_PRESCALER_MASK);
 
    base->PR = (base->PR & ~GPT_PR_PRESCALER_MASK) | GPT_PR_PRESCALER(divider - 1U);
}
 
static inline uint32_t GPT_GetClockDivider(GPT_Type *base)
{
    return ((base->PR & GPT_PR_PRESCALER_MASK) >> GPT_PR_PRESCALER_SHIFT) + 1U;
}
 
static inline void GPT_SetOscClockDivider(GPT_Type *base, uint32_t divider)
{
    assert(divider - 1U <= (GPT_PR_PRESCALER24M_MASK >> GPT_PR_PRESCALER24M_SHIFT));
 
    base->PR = (base->PR & ~GPT_PR_PRESCALER24M_MASK) | GPT_PR_PRESCALER24M(divider - 1U);
}
 
static inline uint32_t GPT_GetOscClockDivider(GPT_Type *base)
{
    return ((base->PR & GPT_PR_PRESCALER24M_MASK) >> GPT_PR_PRESCALER24M_SHIFT) + 1U;
}
 
static inline void GPT_StartTimer(GPT_Type *base)
{
    base->CR |= GPT_CR_EN_MASK;
}
 
static inline void GPT_StopTimer(GPT_Type *base)
{
    base->CR &= ~GPT_CR_EN_MASK;
}
 
static inline uint32_t GPT_GetCurrentTimerCount(GPT_Type *base)
{
    return base->CNT;
}
 
static inline void GPT_SetInputOperationMode(GPT_Type *base,
                                             gpt_input_capture_channel_t channel,
                                             gpt_input_operation_mode_t mode)
{
    assert(channel <= kGPT_InputCapture_Channel2);
 
    base->CR =
        (base->CR & ~(GPT_CR_IM1_MASK << ((uint32_t)channel * 2UL))) | (GPT_CR_IM1(mode) << ((uint32_t)channel * 2UL));
}
 
static inline gpt_input_operation_mode_t GPT_GetInputOperationMode(GPT_Type *base, gpt_input_capture_channel_t channel)
{
    assert(channel <= kGPT_InputCapture_Channel2);
 
    return (gpt_input_operation_mode_t)(uint8_t)((base->CR >> (GPT_CR_IM1_SHIFT + (uint32_t)channel * 2UL)) &
                                                 (GPT_CR_IM1_MASK >> GPT_CR_IM1_SHIFT));
}
 
static inline uint32_t GPT_GetInputCaptureValue(GPT_Type *base, gpt_input_capture_channel_t channel)
{
    assert(channel <= kGPT_InputCapture_Channel2);
 
    return base->ICR[(uint32_t)channel];
}
 
static inline void GPT_SetOutputOperationMode(GPT_Type *base,
                                              gpt_output_compare_channel_t channel,
                                              gpt_output_operation_mode_t mode)
{
    assert(channel <= kGPT_OutputCompare_Channel3);
 
    base->CR =
        (base->CR & ~(GPT_CR_OM1_MASK << ((uint32_t)channel * 3UL))) | (GPT_CR_OM1(mode) << ((uint32_t)channel * 3UL));
}
 
static inline gpt_output_operation_mode_t GPT_GetOutputOperationMode(GPT_Type *base,
                                                                     gpt_output_compare_channel_t channel)
{
    assert(channel <= kGPT_OutputCompare_Channel3);
 
    return (gpt_output_operation_mode_t)(uint8_t)((base->CR >> (GPT_CR_OM1_SHIFT + (uint32_t)channel * 3UL)) &
                                                  (GPT_CR_OM1_MASK >> GPT_CR_OM1_SHIFT));
}
 
static inline void GPT_SetOutputCompareValue(GPT_Type *base, gpt_output_compare_channel_t channel, uint32_t value)
{
    assert(channel <= kGPT_OutputCompare_Channel3);
 
    base->OCR[(uint32_t)channel] = value;
}
 
static inline uint32_t GPT_GetOutputCompareValue(GPT_Type *base, gpt_output_compare_channel_t channel)
{
    assert(channel <= kGPT_OutputCompare_Channel3);
 
    return base->OCR[(uint32_t)channel];
}
 
static inline void GPT_ForceOutput(GPT_Type *base, gpt_output_compare_channel_t channel)
{
    assert(channel <= kGPT_OutputCompare_Channel3);
 
    base->CR |= (GPT_CR_FO1_MASK << (uint32_t)channel);
}
 
static inline void GPT_EnableInterrupts(GPT_Type *base, uint32_t mask)
{
    base->IR |= mask;
}
 
static inline void GPT_DisableInterrupts(GPT_Type *base, uint32_t mask)
{
    base->IR &= ~mask;
}
 
static inline uint32_t GPT_GetEnabledInterrupts(GPT_Type *base)
{
    return (base->IR & (GPT_IR_OF1IE_MASK | GPT_IR_OF2IE_MASK | GPT_IR_OF3IE_MASK | GPT_IR_IF1IE_MASK |
                        GPT_IR_IF2IE_MASK | GPT_IR_ROVIE_MASK));
}
 
static inline uint32_t GPT_GetStatusFlags(GPT_Type *base, gpt_status_flag_t flags)
{
    return base->SR & (uint32_t)flags;
}
 
static inline void GPT_ClearStatusFlags(GPT_Type *base, gpt_status_flag_t flags)
{
    base->SR = (uint32_t)flags;
}
 
#if defined(__cplusplus)
}
#endif
 
#endif /* _FSL_GPT_H_ */