RTEMS 6.1-rc5
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Data Structures | Macros | Enumerations | Functions
xnandpsu.h File Reference
#include "xil_types.h"
#include <string.h>
#include "xstatus.h"
#include "xil_assert.h"
#include "xnandpsu_hw.h"
#include "xnandpsu_onfi.h"
#include "xil_cache.h"

Go to the source code of this file.

Data Structures

struct  XNandPsu_Config
 
struct  XNandPsu_BbtDesc
 
struct  XNandPsu_BadBlockPattern
 
struct  XNandPsu_Geometry
 
struct  XNandPsu_Features
 
struct  XNandPsu_EccMatrix
 
struct  XNandPsu_EccCfg
 
struct  XNandPsu
 

Macros

#define XNANDPSU_H   /* by using protection macros */
 
#define XNANDPSU_DEBUG
 
#define XNANDPSU_MAX_TARGETS   1U
 
#define XNANDPSU_MAX_PKT_SIZE   0x7FFU
 
#define XNANDPSU_MAX_PKT_COUNT   0xFFFU
 
#define XNANDPSU_PAGE_SIZE_512   512U
 
#define XNANDPSU_PAGE_SIZE_2K   2048U
 
#define XNANDPSU_PAGE_SIZE_4K   4096U
 
#define XNANDPSU_PAGE_SIZE_8K   8192U
 
#define XNANDPSU_PAGE_SIZE_16K   16384U
 
#define XNANDPSU_PAGE_SIZE_1K_16BIT   1024U
 
#define XNANDPSU_MAX_PAGE_SIZE   16384U
 
#define XNANDPSU_HAMMING   0x1U
 
#define XNANDPSU_BCH   0x2U
 
#define XNANDPSU_MAX_BLOCKS   16384U
 
#define XNANDPSU_MAX_SPARE_SIZE   0x800U
 
#define XNANDPSU_MAX_LUNS   8U
 
#define XNANDPSU_MAX_PAGES_PER_BLOCK   512U
 
#define XNANDPSU_INTR_POLL_TIMEOUT   0xF000000U
 
#define XNANDPSU_SDR_CLK   ((u16)100U * (u16)1000U * (u16)1000U)
 
#define XNANDPSU_NVDDR_CLK_0   ((u16)20U * (u16)1000U * (u16)1000U)
 
#define XNANDPSU_NVDDR_CLK_1   ((u16)33U * (u16)1000U * (u16)1000U)
 
#define XNANDPSU_NVDDR_CLK_2   ((u16)50U * (u16)1000U * (u16)1000U)
 
#define XNANDPSU_NVDDR_CLK_3   ((u16)66U * (u16)1000U * (u16)1000U)
 
#define XNANDPSU_NVDDR_CLK_4   ((u16)83U * (u16)1000U * (u16)1000U)
 
#define XNANDPSU_NVDDR_CLK_5   ((u16)100U * (u16)1000U * (u16)1000U)
 
#define XNANDPSU_MAX_TIMING_MODE   5
 
#define XNandPsu_SetBits(InstancePtr, RegOffset, BitMask)
 
#define XNandPsu_ClrBits(InstancePtr, RegOffset, BitMask)
 
#define XNandPsu_ReadModifyWrite(InstancePtr, RegOffset, Mask, Value)
 
#define XNandPsu_IntrSigEnable(InstancePtr, Mask)
 
#define XNandPsu_IntrSigClear(InstancePtr, Mask)
 
#define XNandPsu_IntrStsEnable(InstancePtr, Mask)
 
#define IS_ONFI(Buff)
 

Enumerations

enum  XNandPsu_DataInterface { XNANDPSU_SDR = 0U , XNANDPSU_NVDDR }
 
enum  XNandPsu_TimingMode {
  XNANDPSU_SDR0 = 0U , XNANDPSU_SDR1 , XNANDPSU_SDR2 , XNANDPSU_SDR3 ,
  XNANDPSU_SDR4 , XNANDPSU_SDR5 , XNANDPSU_NVDDR0 , XNANDPSU_NVDDR1 ,
  XNANDPSU_NVDDR2 , XNANDPSU_NVDDR3 , XNANDPSU_NVDDR4 , XNANDPSU_NVDDR5
}
 
enum  XNandPsu_SWMode { XNANDPSU_POLLING = 0 , XNANDPSU_INTERRUPT }
 
enum  XNandPsu_DmaMode { XNANDPSU_PIO = 0 , XNANDPSU_SDMA , XNANDPSU_MDMA }
 
enum  XNandPsu_EccMode { XNANDPSU_NONE = 0 , XNANDPSU_HWECC , XNANDPSU_EZNAND , XNANDPSU_ONDIE }
 

Functions

s32 XNandPsu_CfgInitialize (XNandPsu *InstancePtr, XNandPsu_Config *ConfigPtr, u32 EffectiveAddr)
 
s32 XNandPsu_Erase (XNandPsu *InstancePtr, u64 Offset, u64 Length)
 
s32 XNandPsu_Write (XNandPsu *InstancePtr, u64 Offset, u64 Length, u8 *SrcBuf)
 
s32 XNandPsu_Read (XNandPsu *InstancePtr, u64 Offset, u64 Length, u8 *DestBuf)
 
s32 XNandPsu_EraseBlock (XNandPsu *InstancePtr, u32 Target, u32 Block)
 
s32 XNandPsu_WriteSpareBytes (XNandPsu *InstancePtr, u32 Page, u8 *Buf)
 
s32 XNandPsu_ReadSpareBytes (XNandPsu *InstancePtr, u32 Page, u8 *Buf)
 
s32 XNandPsu_ChangeTimingMode (XNandPsu *InstancePtr, XNandPsu_DataInterface NewIntf, XNandPsu_TimingMode NewMode)
 
s32 XNandPsu_GetFeature (XNandPsu *InstancePtr, u32 Target, u8 Feature, u8 *Buf)
 
s32 XNandPsu_SetFeature (XNandPsu *InstancePtr, u32 Target, u8 Feature, u8 *Buf)
 
s32 XNandPsu_ScanBbt (XNandPsu *InstancePtr)
 
s32 XNandPsu_MarkBlockBad (XNandPsu *InstancePtr, u32 Block)
 
void XNandPsu_EnableDmaMode (XNandPsu *InstancePtr)
 
void XNandPsu_DisableDmaMode (XNandPsu *InstancePtr)
 
void XNandPsu_EnableEccMode (XNandPsu *InstancePtr)
 
void XNandPsu_DisableEccMode (XNandPsu *InstancePtr)
 
void XNandPsu_Prepare_Cmd (XNandPsu *InstancePtr, u8 Cmd1, u8 Cmd2, u8 EccState, u8 DmaMode, u8 AddrCycles)
 
XNandPsu_ConfigXNandPsu_LookupConfig (u16 DevID)