RTEMS 6.1-rc5
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Data Structures | Macros | Typedefs | Enumerations
timer-defs.h File Reference
Board Support Packages » ARM » NXP LPC176X

API definitions of the for the timer of the lpc176x bsp. More...

#include <bsp/common-types.h>

Go to the source code of this file.

Data Structures

struct  lpc176x_timer_device
 Represents the timer device registers. More...
 
struct  lpc176x_timer
 The Timer device representation. More...
 
struct  lpc176x_timer_functions
 The Timer functions. More...
 

Macros

#define LPC176X_TMR0_BASE_ADDR   0x40004000U
 
#define LPC176X_T0IR
 
#define LPC176X_T0TCR
 
#define LPC176X_T0TC
 
#define LPC176X_T0PR
 
#define LPC176X_T0PC
 
#define LPC176X_T0MCR
 
#define LPC176X_T0MR0
 
#define LPC176X_T0MR1
 
#define LPC176X_T0MR2
 
#define LPC176X_T0MR3
 
#define LPC176X_T0CCR
 
#define LPC176X_T0CR0
 
#define LPC176X_T0CR1
 
#define LPC176X_T0CR2
 
#define LPC176X_T0CR3
 
#define LPC176X_T0EMR
 
#define LPC176X_T0CTCR
 
#define LPC176X_TMR1_BASE_ADDR   0x40008000U
 
#define LPC176X_T1IR
 
#define LPC176X_T1TCR
 
#define LPC176X_T1TC
 
#define LPC176X_T1PR
 
#define LPC176X_T1PC
 
#define LPC176X_T1MCR
 
#define LPC176X_T1MR0
 
#define LPC176X_T1MR1
 
#define LPC176X_T1MR2
 
#define LPC176X_T1MR3
 
#define LPC176X_T1CCR
 
#define LPC176X_T1CR0
 
#define LPC176X_T1CR1
 
#define LPC176X_T1CR2
 
#define LPC176X_T1CR3
 
#define LPC176X_T1EMR
 
#define LPC176X_T1CTCR
 
#define LPC176X_TMR2_BASE_ADDR   0x40090000U
 
#define LPC176X_T2IR
 
#define LPC176X_T2TCR
 
#define LPC176X_T2TC
 
#define LPC176X_T2PR
 
#define LPC176X_T2PC
 
#define LPC176X_T2MCR
 
#define LPC176X_T2MR0
 
#define LPC176X_T2MR1
 
#define LPC176X_T2MR2
 
#define LPC176X_T2MR3
 
#define LPC176X_T2CCR
 
#define LPC176X_T2CR0
 
#define LPC176X_T2CR1
 
#define LPC176X_T2CR2
 
#define LPC176X_T2CR3
 
#define LPC176X_T2EMR
 
#define LPC176X_T2CTCR
 
#define LPC176X_TMR3_BASE_ADDR   0x40094000U
 
#define LPC176X_T3IR
 
#define LPC176X_T3TCR
 
#define LPC176X_T3TC
 
#define LPC176X_T3PR
 
#define LPC176X_T3PC
 
#define LPC176X_T3MCR
 
#define LPC176X_T3MR0
 
#define LPC176X_T3MR1
 
#define LPC176X_T3MR2
 
#define LPC176X_T3MR3
 
#define LPC176X_T3CCR
 
#define LPC176X_T3CR0
 
#define LPC176X_T3CR1
 
#define LPC176X_T3CR2
 
#define LPC176X_T3CR3
 
#define LPC176X_T3EMR
 
#define LPC176X_T3CTCR
 
#define LPC176X_PIN_SELECT_TIMER   3U
 
#define LPC176X_PINSEL_NO_PORT   999U
 
#define LPC176X_TIMER_RESET   ( 1U << 1U )
 
#define LPC176X_TIMER_START   1U
 
#define LPC176X_TIMER_MODE_COUNTER_SOURCE_CAP0   0U
 
#define LPC176X_TIMER_MODE_COUNTER_SOURCE_CAP1   ( 1U << 2U )
 
#define LPC176X_TIMER0_CAPTURE_PORTS   { 58U, 59U }
 
#define LPC176X_TIMER1_CAPTURE_PORTS   { 50U, 51U }
 
#define LPC176X_TIMER2_CAPTURE_PORTS   { 4U, 5U }
 
#define LPC176X_TIMER3_CAPTURE_PORTS   { 23U, 24U }
 
#define LPC176X_TIMER0_EMATCH_PORTS
 
#define LPC176X_TIMER1_EMATCH_PORTS
 
#define LPC176X_TIMER2_EMATCH_PORTS   { 6U, 7U, 8U, 9U }
 
#define LPC176X_TIMER3_EMATCH_PORTS
 
#define LPC176X_TIMER_DEFAULT_RESOLUTION   1U
 
#define LPC176X_TIMER_MCR_MASK   7U
 
#define LPC176X_TIMER_MCR_MASK_SIZE   3U
 
#define LPC176X_TIMER_CCR_MASK   7U
 
#define LPC176X_TIMER_CCR_MASK_SIZE   3U
 
#define LPC176X_TIMER_EMR_MASK   3U
 
#define LPC176X_TIMER_EMR_MASK_SIZE   2U
 
#define LPC176X_TIMER_EMR_MASK_OFFSET   4U
 
#define LPC176X_TIMER_CLEAR_FUNCTION   0U
 
#define LPC176X_TIMER_PRESCALER_DIVISOR   1000000U
 
#define LPC176X_TIMER_VECTOR_NUMBER(timernumber)   ( timernumber + 1U )
 
#define LPC176X_TIMER_INTERRUPT_SOURCE_BIT(i)   ( 1U << i )
 
#define LPC176X_TIMER_MATCH_FUNCTION_COUNT   8U
 
#define LPC176X_TIMER_CAPTURE_FUNCTION_COUNT   8U
 
#define LPC176X_ISR_NAME_STRING_SIZE   10U
 
#define LPC176X_SET_MCR(mcr, match_port, function)
 
#define LPC176X_SET_CCR(mcr, capture_port, function)
 
#define LPC176X_SET_EMR(mcr, match_port, function)
 

Typedefs

typedef void(* lpc176x_isr_funct) (const lpc176x_timer_number tnumber)
 A function that attends an interruption for a timer.
 
typedef lpc176x_isr_funct const lpc176x_isr_funct_vector[LPC176X_ISR_FUNCTIONS_COUNT]
 The vector of functions that attends each possible interrupt source for a timer.
 

Enumerations

enum  lpc176x_capture_port { LPC176X_CAPn_0 , LPC176X_CAPn_1 , LPC176X_CAPTURE_PORTS_COUNT }
 Capture ports of a timer. More...
 
enum  lpc176x_match_port {
  LPC176X_MATn_0 , LPC176X_MATn_1 , LPC176X_MATn_2 , LPC176X_MATn_3 ,
  LPC176X_EMATCH_PORTS_COUNT
}
 Match ports of a timer. More...
 
enum  lpc176x_timer_mode {
  LPC176X_TIMER_MODE_TIMER , LPC176X_TIMER_MODE_COUNTER_RISING_CAP0 , LPC176X_TIMER_MODE_COUNTER_FALLING_CAP0 , LPC176X_TIMER_MODE_COUNTER_BOTH_CAP0 ,
  LPC176X_TIMER_MODE_COUNTER_RISING_CAP1 = ( 1U & ( 1U << 2U ) ) , LPC176X_TIMER_MODE_COUNTER_FALLING_CAP1 = ( 2U & ( 1U << 2U ) ) , LPC176X_TIMER_MODE_COUNTER_BOTH_CAP1 = ( 3U & ( 1U << 2U ) )
}
 Timer modes of a timer. More...
 
enum  lpc176x_timer_number {
  LPC176X_TIMER_0 , LPC176X_TIMER_1 , LPC176X_TIMER_2 , LPC176X_TIMER_3 ,
  LPC176X_TIMER_COUNT
}
 The timer devices in the board. More...
 
enum  lpc176x_isr_function {
  LPC176X_MAT0_ISR_FUNCTION , LPC176X_MAT1_ISR_FUNCTION , LPC176X_MAT2_ISR_FUNCTION , LPC176X_MAT3_ISR_FUNCTION ,
  LPC176X_CAP0_ISR_FUNCTION , LPC176X_CAP1_ISR_FUNCTION , LPC176X_ISR_FUNCTIONS_COUNT
}
 The index for the isr_funct_vector representing the functions that attends each possible interrupt source for a timer. More...
 
enum  lpc176x_match_function { LPC176X_TIMER_MATCH_FUNCTION_NONE = 0U , LPC176X_TIMER_MATCH_FUNCTION_INTERRUPT = 1U , LPC176X_TIMER_MATCH_FUNCTION_RESET = ( 1U << 1U ) , LPC176X_TIMER_MATCH_FUNCTION_STOP = ( 1U << 2U ) }
 The possible functions at match. This options could be used together. More...
 
enum  lpc176x_capture_function { LPC176X_TIMER_CAPTURE_FUNCTION_NONE = 0U , LPC176X_TIMER_CAPTURE_FUNCTION_RISING = 1U , LPC176X_TIMER_CAPTURE_FUNCTION_FALLING = ( 1U << 1U ) , LPC176X_TIMER_CAPTURE_FUNCTION_INTERRUPT = ( 1U << 2U ) }
 The possible functions at capture. This options could be used together. More...
 
enum  lpc176x_ext_match_function { LPC176X_TIMER_EXTMATCH_FUNCTION_NONE , LPC176X_TIMER_EXTMATCH_FUNCTION_CLEAR , LPC176X_TIMER_EXTMATCH_FUNCTION_SET , LPC176X_TIMER_EXTMATCH_FUNCTION_TOGGLE }
 The possible functions at match, for the external ports. More...
 

Detailed Description

API definitions of the for the timer of the lpc176x bsp.

Macro Definition Documentation

◆ LPC176X_SET_CCR

#define LPC176X_SET_CCR (   mcr,
  capture_port,
  function 
)
Value:
SET_FIELD( mcr, function, ( 0x7U << ( 3U * capture_port ) ), \
( 3U * capture_port ) )

◆ LPC176X_SET_EMR

#define LPC176X_SET_EMR (   mcr,
  match_port,
  function 
)
Value:
SET_FIELD( mcr, function, ( 0x3U << ( 2U * match_port + 4U ) ), \
( 2U * match_port + 4U ) )

◆ LPC176X_SET_MCR

#define LPC176X_SET_MCR (   mcr,
  match_port,
  function 
)
Value:
SET_FIELD( mcr, \
function, \
( 0x7U << ( 3U * match_port ) ), \
( 3U * match_port ) )

◆ LPC176X_T0CCR

#define LPC176X_T0CCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x28U ) )

◆ LPC176X_T0CR0

#define LPC176X_T0CR0
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x2CU ) )

◆ LPC176X_T0CR1

#define LPC176X_T0CR1
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x30U ) )

◆ LPC176X_T0CR2

#define LPC176X_T0CR2
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x34U ) )

◆ LPC176X_T0CR3

#define LPC176X_T0CR3
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x38U ) )

◆ LPC176X_T0CTCR

#define LPC176X_T0CTCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x70U ) )

◆ LPC176X_T0EMR

#define LPC176X_T0EMR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x3CU ) )

◆ LPC176X_T0IR

#define LPC176X_T0IR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x00U ) )

◆ LPC176X_T0MCR

#define LPC176X_T0MCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x14U ) )

◆ LPC176X_T0MR0

#define LPC176X_T0MR0
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x18U ) )

◆ LPC176X_T0MR1

#define LPC176X_T0MR1
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x1CU ) )

◆ LPC176X_T0MR2

#define LPC176X_T0MR2
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x20U ) )

◆ LPC176X_T0MR3

#define LPC176X_T0MR3
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x24U ) )

◆ LPC176X_T0PC

#define LPC176X_T0PC
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x10U ) )

◆ LPC176X_T0PR

#define LPC176X_T0PR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x0CU ) )

◆ LPC176X_T0TC

#define LPC176X_T0TC
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x08U ) )

◆ LPC176X_T0TCR

#define LPC176X_T0TCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR0_BASE_ADDR + \
0x04U ) )

◆ LPC176X_T1CCR

#define LPC176X_T1CCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x28U ) )

◆ LPC176X_T1CR0

#define LPC176X_T1CR0
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x2CU ) )

◆ LPC176X_T1CR1

#define LPC176X_T1CR1
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x30U ) )

◆ LPC176X_T1CR2

#define LPC176X_T1CR2
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x34U ) )

◆ LPC176X_T1CR3

#define LPC176X_T1CR3
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x38U ) )

◆ LPC176X_T1CTCR

#define LPC176X_T1CTCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x70U ) )

◆ LPC176X_T1EMR

#define LPC176X_T1EMR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x3CU ) )

◆ LPC176X_T1IR

#define LPC176X_T1IR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x00U ) )

◆ LPC176X_T1MCR

#define LPC176X_T1MCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x14U ) )

◆ LPC176X_T1MR0

#define LPC176X_T1MR0
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x18U ) )

◆ LPC176X_T1MR1

#define LPC176X_T1MR1
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x1CU ) )

◆ LPC176X_T1MR2

#define LPC176X_T1MR2
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x20U ) )

◆ LPC176X_T1MR3

#define LPC176X_T1MR3
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x24U ) )

◆ LPC176X_T1PC

#define LPC176X_T1PC
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x10U ) )

◆ LPC176X_T1PR

#define LPC176X_T1PR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x0CU ) )

◆ LPC176X_T1TC

#define LPC176X_T1TC
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x08U ) )

◆ LPC176X_T1TCR

#define LPC176X_T1TCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR1_BASE_ADDR + \
0x04U ) )

◆ LPC176X_T2CCR

#define LPC176X_T2CCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x28U ) )

◆ LPC176X_T2CR0

#define LPC176X_T2CR0
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x2CU ) )

◆ LPC176X_T2CR1

#define LPC176X_T2CR1
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x30U ) )

◆ LPC176X_T2CR2

#define LPC176X_T2CR2
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x34U ) )

◆ LPC176X_T2CR3

#define LPC176X_T2CR3
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x38U ) )

◆ LPC176X_T2CTCR

#define LPC176X_T2CTCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x70U ) )

◆ LPC176X_T2EMR

#define LPC176X_T2EMR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x3CU ) )

◆ LPC176X_T2IR

#define LPC176X_T2IR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x00U ) )

◆ LPC176X_T2MCR

#define LPC176X_T2MCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x14U ) )

◆ LPC176X_T2MR0

#define LPC176X_T2MR0
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x18U ) )

◆ LPC176X_T2MR1

#define LPC176X_T2MR1
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x1CU ) )

◆ LPC176X_T2MR2

#define LPC176X_T2MR2
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x20U ) )

◆ LPC176X_T2MR3

#define LPC176X_T2MR3
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x24U ) )

◆ LPC176X_T2PC

#define LPC176X_T2PC
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x10U ) )

◆ LPC176X_T2PR

#define LPC176X_T2PR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x0CU ) )

◆ LPC176X_T2TC

#define LPC176X_T2TC
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x08U ) )

◆ LPC176X_T2TCR

#define LPC176X_T2TCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR2_BASE_ADDR + \
0x04U ) )

◆ LPC176X_T3CCR

#define LPC176X_T3CCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x28U ) )

◆ LPC176X_T3CR0

#define LPC176X_T3CR0
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x2CU ) )

◆ LPC176X_T3CR1

#define LPC176X_T3CR1
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x30U ) )

◆ LPC176X_T3CR2

#define LPC176X_T3CR2
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x34U ) )

◆ LPC176X_T3CR3

#define LPC176X_T3CR3
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x38U ) )

◆ LPC176X_T3CTCR

#define LPC176X_T3CTCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x70U ) )

◆ LPC176X_T3EMR

#define LPC176X_T3EMR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x3CU ) )

◆ LPC176X_T3IR

#define LPC176X_T3IR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x00U ) )

◆ LPC176X_T3MCR

#define LPC176X_T3MCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x14U ) )

◆ LPC176X_T3MR0

#define LPC176X_T3MR0
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x18U ) )

◆ LPC176X_T3MR1

#define LPC176X_T3MR1
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x1CU ) )

◆ LPC176X_T3MR2

#define LPC176X_T3MR2
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x20U ) )

◆ LPC176X_T3MR3

#define LPC176X_T3MR3
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x24U ) )

◆ LPC176X_T3PC

#define LPC176X_T3PC
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x10U ) )

◆ LPC176X_T3PR

#define LPC176X_T3PR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x0CU ) )

◆ LPC176X_T3TC

#define LPC176X_T3TC
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x08U ) )

◆ LPC176X_T3TCR

#define LPC176X_T3TCR
Value:
( *(volatile uint32_t *) ( LPC176X_TMR3_BASE_ADDR + \
0x04U ) )

◆ LPC176X_TIMER0_EMATCH_PORTS

#define LPC176X_TIMER0_EMATCH_PORTS
Value:
{ 60U, \
61U, \
LPC176X_PINSEL_NO_PORT, \
LPC176X_PINSEL_NO_PORT }

◆ LPC176X_TIMER1_EMATCH_PORTS

#define LPC176X_TIMER1_EMATCH_PORTS
Value:
{ 54U, \
57U, \
LPC176X_PINSEL_NO_PORT, \
LPC176X_PINSEL_NO_PORT }

◆ LPC176X_TIMER3_EMATCH_PORTS

#define LPC176X_TIMER3_EMATCH_PORTS
Value:
{ 10U, \
11U, \
LPC176X_PINSEL_NO_PORT, \
LPC176X_PINSEL_NO_PORT }

Typedef Documentation

◆ lpc176x_isr_funct

typedef void(* lpc176x_isr_funct) (const lpc176x_timer_number tnumber)

A function that attends an interruption for a timer.

Parameters
tnumberTimer number.
Returns
Pointer to the match function.

Enumeration Type Documentation

◆ lpc176x_capture_function

enum lpc176x_capture_function

The possible functions at capture. This options could be used together.

Enumerated type to define the set of functions at capture for a timer device.

◆ lpc176x_capture_port

enum lpc176x_capture_port

Capture ports of a timer.

Enumerated type to define the set of capture ports for a timer device.

◆ lpc176x_ext_match_function

enum lpc176x_ext_match_function

The possible functions at match, for the external ports.

Enumerated type to define the set of functions at match, for external ports, for a timer device.

◆ lpc176x_isr_function

enum lpc176x_isr_function

The index for the isr_funct_vector representing the functions that attends each possible interrupt source for a timer.

Enumerated type to define the set of isr timer functions .

◆ lpc176x_match_function

enum lpc176x_match_function

The possible functions at match. This options could be used together.

Enumerated type to define the set of functions at mach for a timer device.

◆ lpc176x_match_port

enum lpc176x_match_port

Match ports of a timer.

Enumerated type to define the set of match ports for a timer device.

◆ lpc176x_timer_mode

enum lpc176x_timer_mode

Timer modes of a timer.

Enumerated type to define the set of modes for a timer device.

◆ lpc176x_timer_number

enum lpc176x_timer_number

The timer devices in the board.

Enumerated type to define the timer device's numbers.

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