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__IO uint32_t | XDMAC_GTYPE |
| (Xdmac Offset: 0x00) Global Type Register
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__I uint32_t | XDMAC_GCFG |
| (Xdmac Offset: 0x04) Global Configuration Register
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__IO uint32_t | XDMAC_GWAC |
| (Xdmac Offset: 0x08) Global Weighted Arbiter Configuration Register
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__O uint32_t | XDMAC_GIE |
| (Xdmac Offset: 0x0C) Global Interrupt Enable Register
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__O uint32_t | XDMAC_GID |
| (Xdmac Offset: 0x10) Global Interrupt Disable Register
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__I uint32_t | XDMAC_GIM |
| (Xdmac Offset: 0x14) Global Interrupt Mask Register
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__I uint32_t | XDMAC_GIS |
| (Xdmac Offset: 0x18) Global Interrupt Status Register
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__O uint32_t | XDMAC_GE |
| (Xdmac Offset: 0x1C) Global Channel Enable Register
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__O uint32_t | XDMAC_GD |
| (Xdmac Offset: 0x20) Global Channel Disable Register
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__I uint32_t | XDMAC_GS |
| (Xdmac Offset: 0x24) Global Channel Status Register
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__IO uint32_t | XDMAC_GRS |
| (Xdmac Offset: 0x28) Global Channel Read Suspend Register
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__IO uint32_t | XDMAC_GWS |
| (Xdmac Offset: 0x2C) Global Channel Write Suspend Register
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__O uint32_t | XDMAC_GRWS |
| (Xdmac Offset: 0x30) Global Channel Read Write Suspend Register
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__O uint32_t | XDMAC_GRWR |
| (Xdmac Offset: 0x34) Global Channel Read Write Resume Register
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__O uint32_t | XDMAC_GSWR |
| (Xdmac Offset: 0x38) Global Channel Software Request Register
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__I uint32_t | XDMAC_GSWS |
| (Xdmac Offset: 0x3C) Global Channel Software Request Status Register
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__O uint32_t | XDMAC_GSWF |
| (Xdmac Offset: 0x40) Global Channel Software Flush Request Register
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__I uint32_t | Reserved1 [3] |
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XdmacChid | XDMAC_CHID [XDMACCHID_NUMBER] |
| (Xdmac Offset: 0x50) chid = 0 .. 23
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__I uint32_t | Reserved2 [619] |
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__IO uint32_t | XDMAC_VERSION |
| (Xdmac Offset: 0xFFC) XDMAC Version Register
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The documentation for this struct was generated from the following files: