Uart hardware registers. More...

Data Fields
__O uint32_t	UART_CR
	(Uart Offset: 0x0000) Control Register

__IO uint32_t	UART_MR
	(Uart Offset: 0x0004) Mode Register

__O uint32_t	UART_IER
	(Uart Offset: 0x0008) Interrupt Enable Register

__O uint32_t	UART_IDR
	(Uart Offset: 0x000C) Interrupt Disable Register

__I uint32_t	UART_IMR
	(Uart Offset: 0x0010) Interrupt Mask Register

__I uint32_t	UART_SR
	(Uart Offset: 0x0014) Status Register

__I uint32_t	UART_RHR
	(Uart Offset: 0x0018) Receive Holding Register

__O uint32_t	UART_THR
	(Uart Offset: 0x001C) Transmit Holding Register

__IO uint32_t	UART_BRGR
	(Uart Offset: 0x0020) Baud Rate Generator Register

__IO uint32_t	UART_CMPR
	(Uart Offset: 0x0024) Comparison Register

__I uint32_t	Reserved1 [47]

__IO uint32_t	UART_WPMR
	(Uart Offset: 0x00E4) Write Protection Mode Register

__I uint32_t	Reserved2 [5]

__I uint32_t	UART_VERSION
	(Uart Offset: 0x00FC) Version Register

Detailed Description

Uart hardware registers.

The documentation for this struct was generated from the following files:

Data Fields