|
TcChannel | TC_CHANNEL [TCCHANNEL_NUMBER] |
| (Tc Offset: 0x0) channel = 0 .. 2
|
|
__O uint32_t | TC_BCR |
| (Tc Offset: 0xC0) Block Control Register
|
|
__IO uint32_t | TC_BMR |
| (Tc Offset: 0xC4) Block Mode Register
|
|
__O uint32_t | TC_QIER |
| (Tc Offset: 0xC8) QDEC Interrupt Enable Register
|
|
__O uint32_t | TC_QIDR |
| (Tc Offset: 0xCC) QDEC Interrupt Disable Register
|
|
__I uint32_t | TC_QIMR |
| (Tc Offset: 0xD0) QDEC Interrupt Mask Register
|
|
__I uint32_t | TC_QISR |
| (Tc Offset: 0xD4) QDEC Interrupt Status Register
|
|
__IO uint32_t | TC_FMR |
| (Tc Offset: 0xD8) Fault Mode Register
|
|
__I uint32_t | Reserved1 [2] |
|
__IO uint32_t | TC_WPMR |
| (Tc Offset: 0xE4) Write Protection Mode Register
|
|
__I uint32_t | Reserved2 [5] |
|
__I uint32_t | TC_VER |
| (Tc Offset: 0xFC) Version Register
|
|
The documentation for this struct was generated from the following files:
- bsps/arm/atsam/include/libchip/include/same70/component/component_tc.h
- bsps/arm/atsam/include/libchip/include/sams70/component/component_tc.h
- bsps/arm/atsam/include/libchip/include/samv71/component/component_tc.h