RTEMS 6.1-rc5
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stm32h7xx_ll_usart.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_LL_USART_H
21#define STM32H7xx_LL_USART_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx.h"
29
34#if defined(USART1) || defined(USART2) || defined(USART3) || defined(USART6) \
35 || defined(UART4) || defined(UART5) || defined(UART7) || defined(UART8) || defined(UART9) || defined(USART10)
36
42/* Private types -------------------------------------------------------------*/
43/* Private variables ---------------------------------------------------------*/
48/* Array used to get the USART prescaler division decimal values versus @ref USART_LL_EC_PRESCALER values */
49static const uint32_t USART_PRESCALER_TAB[] =
50{
51 1UL,
52 2UL,
53 4UL,
54 6UL,
55 8UL,
56 10UL,
57 12UL,
58 16UL,
59 32UL,
60 64UL,
61 128UL,
62 256UL
63};
68/* Private constants ---------------------------------------------------------*/
76/* Private macros ------------------------------------------------------------*/
77#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
85#endif /*USE_FULL_LL_DRIVER*/
86
87/* Exported types ------------------------------------------------------------*/
88#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
97typedef struct
98{
99 uint32_t PrescalerValue;
105 uint32_t BaudRate;
110 uint32_t DataWidth;
116 uint32_t StopBits;
122 uint32_t Parity;
128 uint32_t TransferDirection;
134 uint32_t HardwareFlowControl;
140 uint32_t OverSampling;
146} LL_USART_InitTypeDef;
147
151typedef struct
152{
153 uint32_t ClockOutput;
160 uint32_t ClockPolarity;
167 uint32_t ClockPhase;
174 uint32_t LastBitClockPulse;
182} LL_USART_ClockInitTypeDef;
183
187#endif /* USE_FULL_LL_DRIVER */
188
189/* Exported constants --------------------------------------------------------*/
200#define LL_USART_ICR_PECF USART_ICR_PECF
201#define LL_USART_ICR_FECF USART_ICR_FECF
202#define LL_USART_ICR_NECF USART_ICR_NECF
203#define LL_USART_ICR_ORECF USART_ICR_ORECF
204#define LL_USART_ICR_IDLECF USART_ICR_IDLECF
205#define LL_USART_ICR_TXFECF USART_ICR_TXFECF
206#define LL_USART_ICR_TCCF USART_ICR_TCCF
207#define LL_USART_ICR_TCBGTCF USART_ICR_TCBGTCF
208#define LL_USART_ICR_LBDCF USART_ICR_LBDCF
209#define LL_USART_ICR_CTSCF USART_ICR_CTSCF
210#define LL_USART_ICR_RTOCF USART_ICR_RTOCF
211#define LL_USART_ICR_EOBCF USART_ICR_EOBCF
212#define LL_USART_ICR_UDRCF USART_ICR_UDRCF
213#define LL_USART_ICR_CMCF USART_ICR_CMCF
214#define LL_USART_ICR_WUCF USART_ICR_WUCF
224#define LL_USART_ISR_PE USART_ISR_PE
225#define LL_USART_ISR_FE USART_ISR_FE
226#define LL_USART_ISR_NE USART_ISR_NE
227#define LL_USART_ISR_ORE USART_ISR_ORE
228#define LL_USART_ISR_IDLE USART_ISR_IDLE
229#define LL_USART_ISR_RXNE_RXFNE USART_ISR_RXNE_RXFNE
230#define LL_USART_ISR_TC USART_ISR_TC
231#define LL_USART_ISR_TXE_TXFNF USART_ISR_TXE_TXFNF
232#define LL_USART_ISR_LBDF USART_ISR_LBDF
233#define LL_USART_ISR_CTSIF USART_ISR_CTSIF
234#define LL_USART_ISR_CTS USART_ISR_CTS
235#define LL_USART_ISR_RTOF USART_ISR_RTOF
236#define LL_USART_ISR_EOBF USART_ISR_EOBF
237#define LL_USART_ISR_UDR USART_ISR_UDR
238#define LL_USART_ISR_ABRE USART_ISR_ABRE
239#define LL_USART_ISR_ABRF USART_ISR_ABRF
240#define LL_USART_ISR_BUSY USART_ISR_BUSY
241#define LL_USART_ISR_CMF USART_ISR_CMF
242#define LL_USART_ISR_SBKF USART_ISR_SBKF
243#define LL_USART_ISR_RWU USART_ISR_RWU
244#define LL_USART_ISR_WUF USART_ISR_WUF
245#define LL_USART_ISR_TEACK USART_ISR_TEACK
246#define LL_USART_ISR_REACK USART_ISR_REACK
247#define LL_USART_ISR_TXFE USART_ISR_TXFE
248#define LL_USART_ISR_RXFF USART_ISR_RXFF
249#define LL_USART_ISR_TCBGT USART_ISR_TCBGT
250#define LL_USART_ISR_RXFT USART_ISR_RXFT
251#define LL_USART_ISR_TXFT USART_ISR_TXFT
261#define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE
262#define LL_USART_CR1_RXNEIE_RXFNEIE USART_CR1_RXNEIE_RXFNEIE
263#define LL_USART_CR1_TCIE USART_CR1_TCIE
264#define LL_USART_CR1_TXEIE_TXFNFIE USART_CR1_TXEIE_TXFNFIE
265#define LL_USART_CR1_PEIE USART_CR1_PEIE
266#define LL_USART_CR1_CMIE USART_CR1_CMIE
267#define LL_USART_CR1_RTOIE USART_CR1_RTOIE
268#define LL_USART_CR1_EOBIE USART_CR1_EOBIE
269#define LL_USART_CR1_TXFEIE USART_CR1_TXFEIE
270#define LL_USART_CR1_RXFFIE USART_CR1_RXFFIE
271#define LL_USART_CR2_LBDIE USART_CR2_LBDIE
272#define LL_USART_CR3_EIE USART_CR3_EIE
273#define LL_USART_CR3_CTSIE USART_CR3_CTSIE
274#define LL_USART_CR3_WUFIE USART_CR3_WUFIE
275#define LL_USART_CR3_TXFTIE USART_CR3_TXFTIE
276#define LL_USART_CR3_TCBGTIE USART_CR3_TCBGTIE
277#define LL_USART_CR3_RXFTIE USART_CR3_RXFTIE
286#define LL_USART_FIFOTHRESHOLD_1_8 0x00000000U
287#define LL_USART_FIFOTHRESHOLD_1_4 0x00000001U
288#define LL_USART_FIFOTHRESHOLD_1_2 0x00000002U
289#define LL_USART_FIFOTHRESHOLD_3_4 0x00000003U
290#define LL_USART_FIFOTHRESHOLD_7_8 0x00000004U
291#define LL_USART_FIFOTHRESHOLD_8_8 0x00000005U
300#define LL_USART_DIRECTION_NONE 0x00000000U
301#define LL_USART_DIRECTION_RX USART_CR1_RE
302#define LL_USART_DIRECTION_TX USART_CR1_TE
303#define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE)
312#define LL_USART_PARITY_NONE 0x00000000U
313#define LL_USART_PARITY_EVEN USART_CR1_PCE
314#define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS)
323#define LL_USART_WAKEUP_IDLELINE 0x00000000U
324#define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE
333#define LL_USART_DATAWIDTH_7B USART_CR1_M1
334#define LL_USART_DATAWIDTH_8B 0x00000000U
335#define LL_USART_DATAWIDTH_9B USART_CR1_M0
344#define LL_USART_OVERSAMPLING_16 0x00000000U
345#define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8
350#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
356#define LL_USART_CLOCK_DISABLE 0x00000000U
357#define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN
361#endif /*USE_FULL_LL_DRIVER*/
362
367#define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U
368#define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL
377#define LL_USART_PHASE_1EDGE 0x00000000U
378#define LL_USART_PHASE_2EDGE USART_CR2_CPHA
387#define LL_USART_POLARITY_LOW 0x00000000U
388#define LL_USART_POLARITY_HIGH USART_CR2_CPOL
397#define LL_USART_PRESCALER_DIV1 0x00000000U
398#define LL_USART_PRESCALER_DIV2 (USART_PRESC_PRESCALER_0)
399#define LL_USART_PRESCALER_DIV4 (USART_PRESC_PRESCALER_1)
400#define LL_USART_PRESCALER_DIV6 (USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0)
401#define LL_USART_PRESCALER_DIV8 (USART_PRESC_PRESCALER_2)
402#define LL_USART_PRESCALER_DIV10 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_0)
403#define LL_USART_PRESCALER_DIV12 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1)
404#define LL_USART_PRESCALER_DIV16 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0)
405#define LL_USART_PRESCALER_DIV32 (USART_PRESC_PRESCALER_3)
406#define LL_USART_PRESCALER_DIV64 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_0)
407#define LL_USART_PRESCALER_DIV128 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1)
408#define LL_USART_PRESCALER_DIV256 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0)
417#define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0
418#define LL_USART_STOPBITS_1 0x00000000U
419#define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1)
420#define LL_USART_STOPBITS_2 USART_CR2_STOP_1
429#define LL_USART_TXRX_STANDARD 0x00000000U
430#define LL_USART_TXRX_SWAPPED (USART_CR2_SWAP)
439#define LL_USART_RXPIN_LEVEL_STANDARD 0x00000000U
440#define LL_USART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV)
449#define LL_USART_TXPIN_LEVEL_STANDARD 0x00000000U
450#define LL_USART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV)
459#define LL_USART_BINARY_LOGIC_POSITIVE 0x00000000U
460#define LL_USART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV
469#define LL_USART_BITORDER_LSBFIRST 0x00000000U
470#define LL_USART_BITORDER_MSBFIRST USART_CR2_MSBFIRST
479#define LL_USART_AUTOBAUD_DETECT_ON_STARTBIT 0x00000000U
480#define LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE USART_CR2_ABRMODE_0
481#define LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME USART_CR2_ABRMODE_1
482#define LL_USART_AUTOBAUD_DETECT_ON_55_FRAME (USART_CR2_ABRMODE_1 | USART_CR2_ABRMODE_0)
491#define LL_USART_ADDRESS_DETECT_4B 0x00000000U
492#define LL_USART_ADDRESS_DETECT_7B USART_CR2_ADDM7
501#define LL_USART_HWCONTROL_NONE 0x00000000U
502#define LL_USART_HWCONTROL_RTS USART_CR3_RTSE
503#define LL_USART_HWCONTROL_CTS USART_CR3_CTSE
504#define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE)
513#define LL_USART_WAKEUP_ON_ADDRESS 0x00000000U
514#define LL_USART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1
515#define LL_USART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1)
524#define LL_USART_IRDA_POWER_NORMAL 0x00000000U
525#define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP
534#define LL_USART_LINBREAK_DETECT_10B 0x00000000U
535#define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL
544#define LL_USART_DE_POLARITY_HIGH 0x00000000U
545#define LL_USART_DE_POLARITY_LOW USART_CR3_DEP
554#define LL_USART_DMA_REG_DATA_TRANSMIT 0x00000000U
555#define LL_USART_DMA_REG_DATA_RECEIVE 0x00000001U
564/* Exported macro ------------------------------------------------------------*/
582#define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
583
590#define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
620#define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) \
621 (((((__PERIPHCLK__)/(USART_PRESCALER_TAB[(__PRESCALER__)]))*2U)\
622 + ((__BAUDRATE__)/2U))/(__BAUDRATE__))
623
644#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) \
645 ((((__PERIPHCLK__)/(USART_PRESCALER_TAB[(__PRESCALER__)]))\
646 + ((__BAUDRATE__)/2U))/(__BAUDRATE__))
647
656/* Exported functions --------------------------------------------------------*/
657
674__STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
675{
676 SET_BIT(USARTx->CR1, USART_CR1_UE);
677}
678
688__STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
689{
690 CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
691}
692
699__STATIC_INLINE uint32_t LL_USART_IsEnabled(const USART_TypeDef *USARTx)
700{
701 return ((READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL);
702}
703
712__STATIC_INLINE void LL_USART_EnableFIFO(USART_TypeDef *USARTx)
713{
714 SET_BIT(USARTx->CR1, USART_CR1_FIFOEN);
715}
716
725__STATIC_INLINE void LL_USART_DisableFIFO(USART_TypeDef *USARTx)
726{
727 CLEAR_BIT(USARTx->CR1, USART_CR1_FIFOEN);
728}
729
738__STATIC_INLINE uint32_t LL_USART_IsEnabledFIFO(const USART_TypeDef *USARTx)
739{
740 return ((READ_BIT(USARTx->CR1, USART_CR1_FIFOEN) == (USART_CR1_FIFOEN)) ? 1UL : 0UL);
741}
742
758__STATIC_INLINE void LL_USART_SetTXFIFOThreshold(USART_TypeDef *USARTx, uint32_t Threshold)
759{
760 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos);
761}
762
777__STATIC_INLINE uint32_t LL_USART_GetTXFIFOThreshold(const USART_TypeDef *USARTx)
778{
779 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
780}
781
797__STATIC_INLINE void LL_USART_SetRXFIFOThreshold(USART_TypeDef *USARTx, uint32_t Threshold)
798{
799 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos);
800}
801
816__STATIC_INLINE uint32_t LL_USART_GetRXFIFOThreshold(const USART_TypeDef *USARTx)
817{
818 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
819}
820
844__STATIC_INLINE void LL_USART_ConfigFIFOsThreshold(USART_TypeDef *USARTx, uint32_t TXThreshold, uint32_t RXThreshold)
845{
846 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) |
847 (RXThreshold << USART_CR3_RXFTCFG_Pos));
848}
849
860__STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx)
861{
862 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_UESM);
863}
864
874__STATIC_INLINE void LL_USART_DisableInStopMode(USART_TypeDef *USARTx)
875{
876 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_UESM);
877}
878
887__STATIC_INLINE uint32_t LL_USART_IsEnabledInStopMode(const USART_TypeDef *USARTx)
888{
889 return ((READ_BIT(USARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM)) ? 1UL : 0UL);
890}
891
898__STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
899{
900 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE);
901}
902
909__STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
910{
911 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
912}
913
920__STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
921{
922 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TE);
923}
924
931__STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
932{
933 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
934}
935
949__STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
950{
951 ATOMIC_MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
952}
953
965__STATIC_INLINE uint32_t LL_USART_GetTransferDirection(const USART_TypeDef *USARTx)
966{
967 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
968}
969
984__STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
985{
986 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
987}
988
999__STATIC_INLINE uint32_t LL_USART_GetParity(const USART_TypeDef *USARTx)
1000{
1001 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
1002}
1003
1013__STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
1014{
1015 MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
1016}
1017
1026__STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(const USART_TypeDef *USARTx)
1027{
1028 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
1029}
1030
1042__STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
1043{
1044 MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
1045}
1046
1057__STATIC_INLINE uint32_t LL_USART_GetDataWidth(const USART_TypeDef *USARTx)
1058{
1059 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
1060}
1061
1068__STATIC_INLINE void LL_USART_EnableMuteMode(USART_TypeDef *USARTx)
1069{
1070 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_MME);
1071}
1072
1079__STATIC_INLINE void LL_USART_DisableMuteMode(USART_TypeDef *USARTx)
1080{
1081 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_MME);
1082}
1083
1090__STATIC_INLINE uint32_t LL_USART_IsEnabledMuteMode(const USART_TypeDef *USARTx)
1091{
1092 return ((READ_BIT(USARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL);
1093}
1094
1104__STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
1105{
1106 MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
1107}
1108
1117__STATIC_INLINE uint32_t LL_USART_GetOverSampling(const USART_TypeDef *USARTx)
1118{
1119 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
1120}
1121
1133__STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
1134{
1135 MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
1136}
1137
1149__STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(const USART_TypeDef *USARTx)
1150{
1151 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
1152}
1153
1165__STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
1166{
1167 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
1168}
1169
1180__STATIC_INLINE uint32_t LL_USART_GetClockPhase(const USART_TypeDef *USARTx)
1181{
1182 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
1183}
1184
1196__STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
1197{
1198 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
1199}
1200
1211__STATIC_INLINE uint32_t LL_USART_GetClockPolarity(const USART_TypeDef *USARTx)
1212{
1213 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
1214}
1215
1239__STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
1240{
1241 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput);
1242}
1243
1265__STATIC_INLINE void LL_USART_SetPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
1266{
1267 MODIFY_REG(USARTx->PRESC, USART_PRESC_PRESCALER, (uint16_t)PrescalerValue);
1268}
1269
1290__STATIC_INLINE uint32_t LL_USART_GetPrescaler(const USART_TypeDef *USARTx)
1291{
1292 return (uint32_t)(READ_BIT(USARTx->PRESC, USART_PRESC_PRESCALER));
1293}
1294
1303__STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
1304{
1305 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
1306}
1307
1316__STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
1317{
1318 CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
1319}
1320
1329__STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(const USART_TypeDef *USARTx)
1330{
1331 return ((READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN)) ? 1UL : 0UL);
1332}
1333
1345__STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
1346{
1347 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
1348}
1349
1360__STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(const USART_TypeDef *USARTx)
1361{
1362 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
1363}
1364
1392__STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
1393 uint32_t StopBits)
1394{
1395 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
1396 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
1397}
1398
1408__STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig)
1409{
1410 MODIFY_REG(USARTx->CR2, USART_CR2_SWAP, SwapConfig);
1411}
1412
1421__STATIC_INLINE uint32_t LL_USART_GetTXRXSwap(const USART_TypeDef *USARTx)
1422{
1423 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_SWAP));
1424}
1425
1435__STATIC_INLINE void LL_USART_SetRXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
1436{
1437 MODIFY_REG(USARTx->CR2, USART_CR2_RXINV, PinInvMethod);
1438}
1439
1448__STATIC_INLINE uint32_t LL_USART_GetRXPinLevel(const USART_TypeDef *USARTx)
1449{
1450 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_RXINV));
1451}
1452
1462__STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
1463{
1464 MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod);
1465}
1466
1475__STATIC_INLINE uint32_t LL_USART_GetTXPinLevel(const USART_TypeDef *USARTx)
1476{
1477 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_TXINV));
1478}
1479
1491__STATIC_INLINE void LL_USART_SetBinaryDataLogic(USART_TypeDef *USARTx, uint32_t DataLogic)
1492{
1493 MODIFY_REG(USARTx->CR2, USART_CR2_DATAINV, DataLogic);
1494}
1495
1504__STATIC_INLINE uint32_t LL_USART_GetBinaryDataLogic(const USART_TypeDef *USARTx)
1505{
1506 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_DATAINV));
1507}
1508
1520__STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder)
1521{
1522 MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
1523}
1524
1535__STATIC_INLINE uint32_t LL_USART_GetTransferBitOrder(const USART_TypeDef *USARTx)
1536{
1537 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_MSBFIRST));
1538}
1539
1548__STATIC_INLINE void LL_USART_EnableAutoBaudRate(USART_TypeDef *USARTx)
1549{
1550 SET_BIT(USARTx->CR2, USART_CR2_ABREN);
1551}
1552
1561__STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx)
1562{
1563 CLEAR_BIT(USARTx->CR2, USART_CR2_ABREN);
1564}
1565
1574__STATIC_INLINE uint32_t LL_USART_IsEnabledAutoBaud(const USART_TypeDef *USARTx)
1575{
1576 return ((READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN)) ? 1UL : 0UL);
1577}
1578
1592__STATIC_INLINE void LL_USART_SetAutoBaudRateMode(USART_TypeDef *USARTx, uint32_t AutoBaudRateMode)
1593{
1594 MODIFY_REG(USARTx->CR2, USART_CR2_ABRMODE, AutoBaudRateMode);
1595}
1596
1609__STATIC_INLINE uint32_t LL_USART_GetAutoBaudRateMode(const USART_TypeDef *USARTx)
1610{
1611 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE));
1612}
1613
1620__STATIC_INLINE void LL_USART_EnableRxTimeout(USART_TypeDef *USARTx)
1621{
1622 SET_BIT(USARTx->CR2, USART_CR2_RTOEN);
1623}
1624
1631__STATIC_INLINE void LL_USART_DisableRxTimeout(USART_TypeDef *USARTx)
1632{
1633 CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN);
1634}
1635
1642__STATIC_INLINE uint32_t LL_USART_IsEnabledRxTimeout(const USART_TypeDef *USARTx)
1643{
1644 return ((READ_BIT(USARTx->CR2, USART_CR2_RTOEN) == (USART_CR2_RTOEN)) ? 1UL : 0UL);
1645}
1646
1670__STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_t NodeAddress)
1671{
1672 MODIFY_REG(USARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
1673 (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos)));
1674}
1675
1686__STATIC_INLINE uint32_t LL_USART_GetNodeAddress(const USART_TypeDef *USARTx)
1687{
1688 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos);
1689}
1690
1699__STATIC_INLINE uint32_t LL_USART_GetNodeAddressLen(const USART_TypeDef *USARTx)
1700{
1701 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADDM7));
1702}
1703
1712__STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
1713{
1714 SET_BIT(USARTx->CR3, USART_CR3_RTSE);
1715}
1716
1725__STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
1726{
1727 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
1728}
1729
1738__STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
1739{
1740 SET_BIT(USARTx->CR3, USART_CR3_CTSE);
1741}
1742
1751__STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
1752{
1753 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
1754}
1755
1770__STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
1771{
1772 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
1773}
1774
1788__STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(const USART_TypeDef *USARTx)
1789{
1790 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
1791}
1792
1799__STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
1800{
1801 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
1802}
1803
1810__STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
1811{
1812 CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
1813}
1814
1821__STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(const USART_TypeDef *USARTx)
1822{
1823 return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL);
1824}
1825
1832__STATIC_INLINE void LL_USART_EnableOverrunDetect(USART_TypeDef *USARTx)
1833{
1834 CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS);
1835}
1836
1843__STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx)
1844{
1845 SET_BIT(USARTx->CR3, USART_CR3_OVRDIS);
1846}
1847
1854__STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(const USART_TypeDef *USARTx)
1855{
1856 return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);
1857}
1858
1871__STATIC_INLINE void LL_USART_SetWKUPType(USART_TypeDef *USARTx, uint32_t Type)
1872{
1873 MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type);
1874}
1875
1887__STATIC_INLINE uint32_t LL_USART_GetWKUPType(const USART_TypeDef *USARTx)
1888{
1889 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_WUS));
1890}
1891
1921__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t PrescalerValue,
1922 uint32_t OverSampling,
1923 uint32_t BaudRate)
1924{
1925 uint32_t usartdiv;
1926 uint32_t brrtemp;
1927
1928 if (PrescalerValue > LL_USART_PRESCALER_DIV256)
1929 {
1930 /* Do not overstep the size of USART_PRESCALER_TAB */
1931 }
1932 else if (BaudRate == 0U)
1933 {
1934 /* Can Not divide per 0 */
1935 }
1936 else if (OverSampling == LL_USART_OVERSAMPLING_8)
1937 {
1938 usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, (uint8_t)PrescalerValue, BaudRate));
1939 brrtemp = usartdiv & 0xFFF0U;
1940 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
1941 USARTx->BRR = brrtemp;
1942 }
1943 else
1944 {
1945 USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, (uint8_t)PrescalerValue, BaudRate));
1946 }
1947}
1948
1975__STATIC_INLINE uint32_t LL_USART_GetBaudRate(const USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t PrescalerValue,
1976 uint32_t OverSampling)
1977{
1978 uint32_t usartdiv;
1979 uint32_t brrresult = 0x0U;
1980 uint32_t periphclkpresc = (uint32_t)(PeriphClk / (USART_PRESCALER_TAB[(uint8_t)PrescalerValue]));
1981
1982 usartdiv = USARTx->BRR;
1983
1984 if (usartdiv == 0U)
1985 {
1986 /* Do not perform a division by 0 */
1987 }
1988 else if (OverSampling == LL_USART_OVERSAMPLING_8)
1989 {
1990 usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
1991 if (usartdiv != 0U)
1992 {
1993 brrresult = (periphclkpresc * 2U) / usartdiv;
1994 }
1995 }
1996 else
1997 {
1998 if ((usartdiv & 0xFFFFU) != 0U)
1999 {
2000 brrresult = periphclkpresc / usartdiv;
2001 }
2002 }
2003 return (brrresult);
2004}
2005
2013__STATIC_INLINE void LL_USART_SetRxTimeout(USART_TypeDef *USARTx, uint32_t Timeout)
2014{
2015 MODIFY_REG(USARTx->RTOR, USART_RTOR_RTO, Timeout);
2016}
2017
2024__STATIC_INLINE uint32_t LL_USART_GetRxTimeout(const USART_TypeDef *USARTx)
2025{
2026 return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_RTO));
2027}
2028
2036__STATIC_INLINE void LL_USART_SetBlockLength(USART_TypeDef *USARTx, uint32_t BlockLength)
2037{
2038 MODIFY_REG(USARTx->RTOR, USART_RTOR_BLEN, BlockLength << USART_RTOR_BLEN_Pos);
2039}
2040
2047__STATIC_INLINE uint32_t LL_USART_GetBlockLength(const USART_TypeDef *USARTx)
2048{
2049 return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_BLEN) >> USART_RTOR_BLEN_Pos);
2050}
2051
2069__STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
2070{
2071 SET_BIT(USARTx->CR3, USART_CR3_IREN);
2072}
2073
2082__STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
2083{
2084 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);
2085}
2086
2095__STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(const USART_TypeDef *USARTx)
2096{
2097 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL);
2098}
2099
2111__STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
2112{
2113 MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
2114}
2115
2126__STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(const USART_TypeDef *USARTx)
2127{
2128 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
2129}
2130
2141__STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
2142{
2143 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, (uint16_t)PrescalerValue);
2144}
2145
2155__STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(const USART_TypeDef *USARTx)
2156{
2157 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
2158}
2159
2177__STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
2178{
2179 SET_BIT(USARTx->CR3, USART_CR3_NACK);
2180}
2181
2190__STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
2191{
2192 CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);
2193}
2194
2203__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(const USART_TypeDef *USARTx)
2204{
2205 return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL);
2206}
2207
2216__STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
2217{
2218 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
2219}
2220
2229__STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
2230{
2231 CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
2232}
2233
2242__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(const USART_TypeDef *USARTx)
2243{
2244 return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL);
2245}
2246
2261__STATIC_INLINE void LL_USART_SetSmartcardAutoRetryCount(USART_TypeDef *USARTx, uint32_t AutoRetryCount)
2262{
2263 MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos);
2264}
2265
2274__STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(const USART_TypeDef *USARTx)
2275{
2276 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos);
2277}
2278
2289__STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
2290{
2291 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, (uint16_t)PrescalerValue);
2292}
2293
2303__STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(const USART_TypeDef *USARTx)
2304{
2305 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
2306}
2307
2318__STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
2319{
2320 MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, (uint16_t)(GuardTime << USART_GTPR_GT_Pos));
2321}
2322
2332__STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(const USART_TypeDef *USARTx)
2333{
2334 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos);
2335}
2336
2354__STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
2355{
2356 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
2357}
2358
2367__STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
2368{
2369 CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
2370}
2371
2380__STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(const USART_TypeDef *USARTx)
2381{
2382 return ((READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL);
2383}
2384
2401__STATIC_INLINE void LL_USART_EnableSPISlave(USART_TypeDef *USARTx)
2402{
2403 SET_BIT(USARTx->CR2, USART_CR2_SLVEN);
2404}
2405
2414__STATIC_INLINE void LL_USART_DisableSPISlave(USART_TypeDef *USARTx)
2415{
2416 CLEAR_BIT(USARTx->CR2, USART_CR2_SLVEN);
2417}
2418
2427__STATIC_INLINE uint32_t LL_USART_IsEnabledSPISlave(const USART_TypeDef *USARTx)
2428{
2429 return ((READ_BIT(USARTx->CR2, USART_CR2_SLVEN) == (USART_CR2_SLVEN)) ? 1UL : 0UL);
2430}
2431
2442__STATIC_INLINE void LL_USART_EnableSPISlaveSelect(USART_TypeDef *USARTx)
2443{
2444 CLEAR_BIT(USARTx->CR2, USART_CR2_DIS_NSS);
2445}
2446
2456__STATIC_INLINE void LL_USART_DisableSPISlaveSelect(USART_TypeDef *USARTx)
2457{
2458 SET_BIT(USARTx->CR2, USART_CR2_DIS_NSS);
2459}
2460
2469__STATIC_INLINE uint32_t LL_USART_IsEnabledSPISlaveSelect(const USART_TypeDef *USARTx)
2470{
2471 return ((READ_BIT(USARTx->CR2, USART_CR2_DIS_NSS) != (USART_CR2_DIS_NSS)) ? 1UL : 0UL);
2472}
2473
2494__STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
2495{
2496 MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
2497}
2498
2509__STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(const USART_TypeDef *USARTx)
2510{
2511 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
2512}
2513
2522__STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
2523{
2524 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
2525}
2526
2535__STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
2536{
2537 CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
2538}
2539
2548__STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(const USART_TypeDef *USARTx)
2549{
2550 return ((READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN)) ? 1UL : 0UL);
2551}
2552
2571__STATIC_INLINE void LL_USART_SetDEDeassertionTime(USART_TypeDef *USARTx, uint32_t Time)
2572{
2573 MODIFY_REG(USARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos);
2574}
2575
2584__STATIC_INLINE uint32_t LL_USART_GetDEDeassertionTime(const USART_TypeDef *USARTx)
2585{
2586 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos);
2587}
2588
2598__STATIC_INLINE void LL_USART_SetDEAssertionTime(USART_TypeDef *USARTx, uint32_t Time)
2599{
2600 MODIFY_REG(USARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos);
2601}
2602
2611__STATIC_INLINE uint32_t LL_USART_GetDEAssertionTime(const USART_TypeDef *USARTx)
2612{
2613 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos);
2614}
2615
2624__STATIC_INLINE void LL_USART_EnableDEMode(USART_TypeDef *USARTx)
2625{
2626 SET_BIT(USARTx->CR3, USART_CR3_DEM);
2627}
2628
2637__STATIC_INLINE void LL_USART_DisableDEMode(USART_TypeDef *USARTx)
2638{
2639 CLEAR_BIT(USARTx->CR3, USART_CR3_DEM);
2640}
2641
2650__STATIC_INLINE uint32_t LL_USART_IsEnabledDEMode(const USART_TypeDef *USARTx)
2651{
2652 return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);
2653}
2654
2666__STATIC_INLINE void LL_USART_SetDESignalPolarity(USART_TypeDef *USARTx, uint32_t Polarity)
2667{
2668 MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity);
2669}
2670
2681__STATIC_INLINE uint32_t LL_USART_GetDESignalPolarity(const USART_TypeDef *USARTx)
2682{
2683 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP));
2684}
2685
2720__STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
2721{
2722 /* In Asynchronous mode, the following bits must be kept cleared:
2723 - LINEN, CLKEN bits in the USART_CR2 register,
2724 - SCEN, IREN and HDSEL bits in the USART_CR3 register.
2725 */
2726 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
2727 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
2728}
2729
2757__STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
2758{
2759 /* In Synchronous mode, the following bits must be kept cleared:
2760 - LINEN bit in the USART_CR2 register,
2761 - SCEN, IREN and HDSEL bits in the USART_CR3 register.
2762 */
2763 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
2764 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
2765 /* set the UART/USART in Synchronous mode */
2766 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
2767}
2768
2798__STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
2799{
2800 /* In LIN mode, the following bits must be kept cleared:
2801 - STOP and CLKEN bits in the USART_CR2 register,
2802 - IREN, SCEN and HDSEL bits in the USART_CR3 register.
2803 */
2804 CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP));
2805 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));
2806 /* Set the UART/USART in LIN mode */
2807 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
2808}
2809
2837__STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
2838{
2839 /* In Half Duplex mode, the following bits must be kept cleared:
2840 - LINEN and CLKEN bits in the USART_CR2 register,
2841 - SCEN and IREN bits in the USART_CR3 register.
2842 */
2843 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
2844 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
2845 /* set the UART/USART in Half Duplex mode */
2846 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
2847}
2848
2878__STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
2879{
2880 /* In Smartcard mode, the following bits must be kept cleared:
2881 - LINEN bit in the USART_CR2 register,
2882 - IREN and HDSEL bits in the USART_CR3 register.
2883 */
2884 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
2885 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
2886 /* Configure Stop bits to 1.5 bits */
2887 /* Synchronous mode is activated by default */
2888 SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN));
2889 /* set the UART/USART in Smartcard mode */
2890 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
2891}
2892
2922__STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
2923{
2924 /* In IRDA mode, the following bits must be kept cleared:
2925 - LINEN, STOP and CLKEN bits in the USART_CR2 register,
2926 - SCEN and HDSEL bits in the USART_CR3 register.
2927 */
2928 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
2929 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
2930 /* set the UART/USART in IRDA mode */
2931 SET_BIT(USARTx->CR3, USART_CR3_IREN);
2932}
2933
2961__STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
2962{
2963 /* In Multi Processor mode, the following bits must be kept cleared:
2964 - LINEN and CLKEN bits in the USART_CR2 register,
2965 - IREN, SCEN and HDSEL bits in the USART_CR3 register.
2966 */
2967 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
2968 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
2969}
2970
2986__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(const USART_TypeDef *USARTx)
2987{
2988 return ((READ_BIT(USARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL);
2989}
2990
2997__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(const USART_TypeDef *USARTx)
2998{
2999 return ((READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL);
3000}
3001
3008__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(const USART_TypeDef *USARTx)
3009{
3010 return ((READ_BIT(USARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL);
3011}
3012
3019__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(const USART_TypeDef *USARTx)
3020{
3021 return ((READ_BIT(USARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL);
3022}
3023
3030__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(const USART_TypeDef *USARTx)
3031{
3032 return ((READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL);
3033}
3034
3035#define LL_USART_IsActiveFlag_RXNE LL_USART_IsActiveFlag_RXNE_RXFNE /* Redefinition for legacy purpose */
3036
3045__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE_RXFNE(const USART_TypeDef *USARTx)
3046{
3047 return ((READ_BIT(USARTx->ISR, USART_ISR_RXNE_RXFNE) == (USART_ISR_RXNE_RXFNE)) ? 1UL : 0UL);
3048}
3049
3056__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(const USART_TypeDef *USARTx)
3057{
3058 return ((READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL);
3059}
3060
3061#define LL_USART_IsActiveFlag_TXE LL_USART_IsActiveFlag_TXE_TXFNF /* Redefinition for legacy purpose */
3062
3071__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE_TXFNF(const USART_TypeDef *USARTx)
3072{
3073 return ((READ_BIT(USARTx->ISR, USART_ISR_TXE_TXFNF) == (USART_ISR_TXE_TXFNF)) ? 1UL : 0UL);
3074}
3075
3084__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(const USART_TypeDef *USARTx)
3085{
3086 return ((READ_BIT(USARTx->ISR, USART_ISR_LBDF) == (USART_ISR_LBDF)) ? 1UL : 0UL);
3087}
3088
3097__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(const USART_TypeDef *USARTx)
3098{
3099 return ((READ_BIT(USARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)) ? 1UL : 0UL);
3100}
3101
3110__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CTS(const USART_TypeDef *USARTx)
3111{
3112 return ((READ_BIT(USARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)) ? 1UL : 0UL);
3113}
3114
3121__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(const USART_TypeDef *USARTx)
3122{
3123 return ((READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF)) ? 1UL : 0UL);
3124}
3125
3134__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_EOB(const USART_TypeDef *USARTx)
3135{
3136 return ((READ_BIT(USARTx->ISR, USART_ISR_EOBF) == (USART_ISR_EOBF)) ? 1UL : 0UL);
3137}
3138
3147__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_UDR(const USART_TypeDef *USARTx)
3148{
3149 return ((READ_BIT(USARTx->ISR, USART_ISR_UDR) == (USART_ISR_UDR)) ? 1UL : 0UL);
3150}
3151
3160__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABRE(const USART_TypeDef *USARTx)
3161{
3162 return ((READ_BIT(USARTx->ISR, USART_ISR_ABRE) == (USART_ISR_ABRE)) ? 1UL : 0UL);
3163}
3164
3173__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABR(const USART_TypeDef *USARTx)
3174{
3175 return ((READ_BIT(USARTx->ISR, USART_ISR_ABRF) == (USART_ISR_ABRF)) ? 1UL : 0UL);
3176}
3177
3184__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_BUSY(const USART_TypeDef *USARTx)
3185{
3186 return ((READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL);
3187}
3188
3195__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(const USART_TypeDef *USARTx)
3196{
3197 return ((READ_BIT(USARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL);
3198}
3199
3206__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(const USART_TypeDef *USARTx)
3207{
3208 return ((READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL);
3209}
3210
3217__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(const USART_TypeDef *USARTx)
3218{
3219 return ((READ_BIT(USARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL);
3220}
3221
3230__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_WKUP(const USART_TypeDef *USARTx)
3231{
3232 return ((READ_BIT(USARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL);
3233}
3234
3241__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(const USART_TypeDef *USARTx)
3242{
3243 return ((READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL);
3244}
3245
3252__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_REACK(const USART_TypeDef *USARTx)
3253{
3254 return ((READ_BIT(USARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL);
3255}
3256
3265__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXFE(const USART_TypeDef *USARTx)
3266{
3267 return ((READ_BIT(USARTx->ISR, USART_ISR_TXFE) == (USART_ISR_TXFE)) ? 1UL : 0UL);
3268}
3269
3278__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXFF(const USART_TypeDef *USARTx)
3279{
3280 return ((READ_BIT(USARTx->ISR, USART_ISR_RXFF) == (USART_ISR_RXFF)) ? 1UL : 0UL);
3281}
3282
3289__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TCBGT(const USART_TypeDef *USARTx)
3290{
3291 return ((READ_BIT(USARTx->ISR, USART_ISR_TCBGT) == (USART_ISR_TCBGT)) ? 1UL : 0UL);
3292}
3293
3302__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXFT(const USART_TypeDef *USARTx)
3303{
3304 return ((READ_BIT(USARTx->ISR, USART_ISR_TXFT) == (USART_ISR_TXFT)) ? 1UL : 0UL);
3305}
3306
3315__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXFT(const USART_TypeDef *USARTx)
3316{
3317 return ((READ_BIT(USARTx->ISR, USART_ISR_RXFT) == (USART_ISR_RXFT)) ? 1UL : 0UL);
3318}
3319
3326__STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
3327{
3328 WRITE_REG(USARTx->ICR, USART_ICR_PECF);
3329}
3330
3337__STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
3338{
3339 WRITE_REG(USARTx->ICR, USART_ICR_FECF);
3340}
3341
3348__STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
3349{
3350 WRITE_REG(USARTx->ICR, USART_ICR_NECF);
3351}
3352
3359__STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
3360{
3361 WRITE_REG(USARTx->ICR, USART_ICR_ORECF);
3362}
3363
3370__STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
3371{
3372 WRITE_REG(USARTx->ICR, USART_ICR_IDLECF);
3373}
3374
3383__STATIC_INLINE void LL_USART_ClearFlag_TXFE(USART_TypeDef *USARTx)
3384{
3385 WRITE_REG(USARTx->ICR, USART_ICR_TXFECF);
3386}
3387
3394__STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
3395{
3396 WRITE_REG(USARTx->ICR, USART_ICR_TCCF);
3397}
3398
3405__STATIC_INLINE void LL_USART_ClearFlag_TCBGT(USART_TypeDef *USARTx)
3406{
3407 WRITE_REG(USARTx->ICR, USART_ICR_TCBGTCF);
3408}
3409
3418__STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
3419{
3420 WRITE_REG(USARTx->ICR, USART_ICR_LBDCF);
3421}
3422
3431__STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
3432{
3433 WRITE_REG(USARTx->ICR, USART_ICR_CTSCF);
3434}
3435
3442__STATIC_INLINE void LL_USART_ClearFlag_RTO(USART_TypeDef *USARTx)
3443{
3444 WRITE_REG(USARTx->ICR, USART_ICR_RTOCF);
3445}
3446
3455__STATIC_INLINE void LL_USART_ClearFlag_EOB(USART_TypeDef *USARTx)
3456{
3457 WRITE_REG(USARTx->ICR, USART_ICR_EOBCF);
3458}
3459
3468__STATIC_INLINE void LL_USART_ClearFlag_UDR(USART_TypeDef *USARTx)
3469{
3470 WRITE_REG(USARTx->ICR, USART_ICR_UDRCF);
3471}
3472
3479__STATIC_INLINE void LL_USART_ClearFlag_CM(USART_TypeDef *USARTx)
3480{
3481 WRITE_REG(USARTx->ICR, USART_ICR_CMCF);
3482}
3483
3492__STATIC_INLINE void LL_USART_ClearFlag_WKUP(USART_TypeDef *USARTx)
3493{
3494 WRITE_REG(USARTx->ICR, USART_ICR_WUCF);
3495}
3496
3512__STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
3513{
3514 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
3515}
3516
3517#define LL_USART_EnableIT_RXNE LL_USART_EnableIT_RXNE_RXFNE /* Redefinition for legacy purpose */
3518
3527__STATIC_INLINE void LL_USART_EnableIT_RXNE_RXFNE(USART_TypeDef *USARTx)
3528{
3529 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
3530}
3531
3538__STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
3539{
3540 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TCIE);
3541}
3542
3543#define LL_USART_EnableIT_TXE LL_USART_EnableIT_TXE_TXFNF /* Redefinition for legacy purpose */
3544
3553__STATIC_INLINE void LL_USART_EnableIT_TXE_TXFNF(USART_TypeDef *USARTx)
3554{
3555 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
3556}
3557
3564__STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
3565{
3566 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE);
3567}
3568
3575__STATIC_INLINE void LL_USART_EnableIT_CM(USART_TypeDef *USARTx)
3576{
3577 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_CMIE);
3578}
3579
3586__STATIC_INLINE void LL_USART_EnableIT_RTO(USART_TypeDef *USARTx)
3587{
3588 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RTOIE);
3589}
3590
3599__STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx)
3600{
3601 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_EOBIE);
3602}
3603
3612__STATIC_INLINE void LL_USART_EnableIT_TXFE(USART_TypeDef *USARTx)
3613{
3614 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXFEIE);
3615}
3616
3623__STATIC_INLINE void LL_USART_EnableIT_RXFF(USART_TypeDef *USARTx)
3624{
3625 ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXFFIE);
3626}
3627
3636__STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
3637{
3638 SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
3639}
3640
3651__STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
3652{
3653 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE);
3654}
3655
3664__STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
3665{
3666 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
3667}
3668
3677__STATIC_INLINE void LL_USART_EnableIT_WKUP(USART_TypeDef *USARTx)
3678{
3679 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_WUFIE);
3680}
3681
3690__STATIC_INLINE void LL_USART_EnableIT_TXFT(USART_TypeDef *USARTx)
3691{
3692 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TXFTIE);
3693}
3694
3703__STATIC_INLINE void LL_USART_EnableIT_TCBGT(USART_TypeDef *USARTx)
3704{
3705 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE);
3706}
3707
3716__STATIC_INLINE void LL_USART_EnableIT_RXFT(USART_TypeDef *USARTx)
3717{
3718 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_RXFTIE);
3719}
3720
3727__STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
3728{
3729 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
3730}
3731
3732#define LL_USART_DisableIT_RXNE LL_USART_DisableIT_RXNE_RXFNE /* Redefinition for legacy purpose */
3733
3742__STATIC_INLINE void LL_USART_DisableIT_RXNE_RXFNE(USART_TypeDef *USARTx)
3743{
3744 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
3745}
3746
3753__STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
3754{
3755 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
3756}
3757
3758#define LL_USART_DisableIT_TXE LL_USART_DisableIT_TXE_TXFNF /* Redefinition for legacy purpose */
3759
3768__STATIC_INLINE void LL_USART_DisableIT_TXE_TXFNF(USART_TypeDef *USARTx)
3769{
3770 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
3771}
3772
3779__STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
3780{
3781 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
3782}
3783
3790__STATIC_INLINE void LL_USART_DisableIT_CM(USART_TypeDef *USARTx)
3791{
3792 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_CMIE);
3793}
3794
3801__STATIC_INLINE void LL_USART_DisableIT_RTO(USART_TypeDef *USARTx)
3802{
3803 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RTOIE);
3804}
3805
3814__STATIC_INLINE void LL_USART_DisableIT_EOB(USART_TypeDef *USARTx)
3815{
3816 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_EOBIE);
3817}
3818
3827__STATIC_INLINE void LL_USART_DisableIT_TXFE(USART_TypeDef *USARTx)
3828{
3829 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXFEIE);
3830}
3831
3840__STATIC_INLINE void LL_USART_DisableIT_RXFF(USART_TypeDef *USARTx)
3841{
3842 ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RXFFIE);
3843}
3844
3853__STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
3854{
3855 CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
3856}
3857
3868__STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
3869{
3870 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
3871}
3872
3881__STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
3882{
3883 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
3884}
3885
3894__STATIC_INLINE void LL_USART_DisableIT_WKUP(USART_TypeDef *USARTx)
3895{
3896 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_WUFIE);
3897}
3898
3907__STATIC_INLINE void LL_USART_DisableIT_TXFT(USART_TypeDef *USARTx)
3908{
3909 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TXFTIE);
3910}
3911
3920__STATIC_INLINE void LL_USART_DisableIT_TCBGT(USART_TypeDef *USARTx)
3921{
3922 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE);
3923}
3924
3933__STATIC_INLINE void LL_USART_DisableIT_RXFT(USART_TypeDef *USARTx)
3934{
3935 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_RXFTIE);
3936}
3937
3944__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(const USART_TypeDef *USARTx)
3945{
3946 return ((READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL);
3947}
3948
3949#define LL_USART_IsEnabledIT_RXNE LL_USART_IsEnabledIT_RXNE_RXFNE /* Redefinition for legacy purpose */
3950
3959__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE_RXFNE(const USART_TypeDef *USARTx)
3960{
3961 return ((READ_BIT(USARTx->CR1, USART_CR1_RXNEIE_RXFNEIE) == (USART_CR1_RXNEIE_RXFNEIE)) ? 1UL : 0UL);
3962}
3963
3970__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(const USART_TypeDef *USARTx)
3971{
3972 return ((READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL);
3973}
3974
3975#define LL_USART_IsEnabledIT_TXE LL_USART_IsEnabledIT_TXE_TXFNF /* Redefinition for legacy purpose */
3976
3985__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE_TXFNF(const USART_TypeDef *USARTx)
3986{
3987 return ((READ_BIT(USARTx->CR1, USART_CR1_TXEIE_TXFNFIE) == (USART_CR1_TXEIE_TXFNFIE)) ? 1UL : 0UL);
3988}
3989
3996__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(const USART_TypeDef *USARTx)
3997{
3998 return ((READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL);
3999}
4000
4007__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CM(const USART_TypeDef *USARTx)
4008{
4009 return ((READ_BIT(USARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)) ? 1UL : 0UL);
4010}
4011
4018__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RTO(const USART_TypeDef *USARTx)
4019{
4020 return ((READ_BIT(USARTx->CR1, USART_CR1_RTOIE) == (USART_CR1_RTOIE)) ? 1UL : 0UL);
4021}
4022
4031__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(const USART_TypeDef *USARTx)
4032{
4033 return ((READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE)) ? 1UL : 0UL);
4034}
4035
4044__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXFE(const USART_TypeDef *USARTx)
4045{
4046 return ((READ_BIT(USARTx->CR1, USART_CR1_TXFEIE) == (USART_CR1_TXFEIE)) ? 1UL : 0UL);
4047}
4048
4057__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXFF(const USART_TypeDef *USARTx)
4058{
4059 return ((READ_BIT(USARTx->CR1, USART_CR1_RXFFIE) == (USART_CR1_RXFFIE)) ? 1UL : 0UL);
4060}
4061
4070__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(const USART_TypeDef *USARTx)
4071{
4072 return ((READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE)) ? 1UL : 0UL);
4073}
4074
4081__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(const USART_TypeDef *USARTx)
4082{
4083 return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);
4084}
4085
4094__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(const USART_TypeDef *USARTx)
4095{
4096 return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);
4097}
4098
4107__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_WKUP(const USART_TypeDef *USARTx)
4108{
4109 return ((READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);
4110}
4111
4120__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXFT(const USART_TypeDef *USARTx)
4121{
4122 return ((READ_BIT(USARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL);
4123}
4124
4133__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TCBGT(const USART_TypeDef *USARTx)
4134{
4135 return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL);
4136}
4137
4146__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXFT(const USART_TypeDef *USARTx)
4147{
4148 return ((READ_BIT(USARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL);
4149}
4150
4166__STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
4167{
4168 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR);
4169}
4170
4177__STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
4178{
4179 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
4180}
4181
4188__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(const USART_TypeDef *USARTx)
4189{
4190 return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);
4191}
4192
4199__STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
4200{
4201 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT);
4202}
4203
4210__STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
4211{
4212 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
4213}
4214
4221__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(const USART_TypeDef *USARTx)
4222{
4223 return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);
4224}
4225
4232__STATIC_INLINE void LL_USART_EnableDMADeactOnRxErr(USART_TypeDef *USARTx)
4233{
4234 SET_BIT(USARTx->CR3, USART_CR3_DDRE);
4235}
4236
4243__STATIC_INLINE void LL_USART_DisableDMADeactOnRxErr(USART_TypeDef *USARTx)
4244{
4245 CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE);
4246}
4247
4254__STATIC_INLINE uint32_t LL_USART_IsEnabledDMADeactOnRxErr(const USART_TypeDef *USARTx)
4255{
4256 return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);
4257}
4258
4269__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(const USART_TypeDef *USARTx, uint32_t Direction)
4270{
4271 uint32_t data_reg_addr;
4272
4273 if (Direction == LL_USART_DMA_REG_DATA_TRANSMIT)
4274 {
4275 /* return address of TDR register */
4276 data_reg_addr = (uint32_t) &(USARTx->TDR);
4277 }
4278 else
4279 {
4280 /* return address of RDR register */
4281 data_reg_addr = (uint32_t) &(USARTx->RDR);
4282 }
4283
4284 return data_reg_addr;
4285}
4286
4302__STATIC_INLINE uint8_t LL_USART_ReceiveData8(const USART_TypeDef *USARTx)
4303{
4304 return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR) & 0xFFU);
4305}
4306
4313__STATIC_INLINE uint16_t LL_USART_ReceiveData9(const USART_TypeDef *USARTx)
4314{
4315 return (uint16_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR));
4316}
4317
4325__STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
4326{
4327 USARTx->TDR = Value;
4328}
4329
4337__STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
4338{
4339 USARTx->TDR = (uint16_t)(Value & 0x1FFUL);
4340}
4341
4359__STATIC_INLINE void LL_USART_RequestAutoBaudRate(USART_TypeDef *USARTx)
4360{
4361 SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_ABRRQ);
4362}
4363
4370__STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
4371{
4372 SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_SBKRQ);
4373}
4374
4381__STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
4382{
4383 SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_MMRQ);
4384}
4385
4396__STATIC_INLINE void LL_USART_RequestRxDataFlush(USART_TypeDef *USARTx)
4397{
4398 SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_RXFRQ);
4399}
4400
4409__STATIC_INLINE void LL_USART_RequestTxDataFlush(USART_TypeDef *USARTx)
4410{
4411 SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_TXFRQ);
4412}
4413
4418#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
4423ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx);
4424ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct);
4425void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
4426ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
4427void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
4431#endif /* USE_FULL_LL_DRIVER */
4432
4441#endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 || UART9 || USART10 */
4442
4447#ifdef __cplusplus
4448}
4449#endif
4450
4451#endif /* STM32H7xx_LL_USART_H */
4452
#define USART_ICR_WUCF
Definition: stm32h723xx.h:21318
#define USART_ISR_NE
Definition: stm32h723xx.h:21196
#define USART_ISR_RTOF
Definition: stm32h723xx.h:21223
#define USART_ISR_RWU
Definition: stm32h723xx.h:21247
#define USART_CR3_TCBGTIE
Definition: stm32h723xx.h:21129
#define USART_CR2_SLVEN
Definition: stm32h723xx.h:20998
#define USART_RTOR_BLEN
Definition: stm32h723xx.h:21168
#define USART_ISR_TXE_TXFNF
Definition: stm32h723xx.h:21211
#define USART_ISR_TXFT
Definition: stm32h723xx.h:21271
#define USART_CR1_UESM
Definition: stm32h723xx.h:20910
#define USART_CR3_DEP
Definition: stm32h723xx.h:21109
#define USART_CR3_IRLP
Definition: stm32h723xx.h:21070
#define USART_PRESC_PRESCALER
Definition: stm32h723xx.h:21333
#define USART_CR1_PEIE
Definition: stm32h723xx.h:20931
#define USART_ISR_FE
Definition: stm32h723xx.h:21193
#define USART_RQR_MMRQ
Definition: stm32h723xx.h:21179
#define USART_CR2_STOP_1
Definition: stm32h723xx.h:21027
#define USART_CR1_UE
Definition: stm32h723xx.h:20907
#define USART_RQR_SBKRQ
Definition: stm32h723xx.h:21176
#define USART_CR2_ADDM7
Definition: stm32h723xx.h:21004
#define USART_CR1_PS
Definition: stm32h723xx.h:20934
#define USART_CR3_IREN
Definition: stm32h723xx.h:21067
#define USART_ISR_EOBF
Definition: stm32h723xx.h:21226
#define USART_CR3_OVRDIS
Definition: stm32h723xx.h:21100
#define USART_CR2_CPHA
Definition: stm32h723xx.h:21016
#define USART_ICR_ORECF
Definition: stm32h723xx.h:21285
#define USART_ICR_RTOCF
Definition: stm32h723xx.h:21306
#define USART_CR2_ADD
Definition: stm32h723xx.h:21059
#define USART_CR3_NACK
Definition: stm32h723xx.h:21076
#define USART_CR3_TXFTCFG
Definition: stm32h723xx.h:21141
#define USART_ICR_PECF
Definition: stm32h723xx.h:21276
#define USART_CR2_CLKEN
Definition: stm32h723xx.h:21022
#define USART_ICR_EOBCF
Definition: stm32h723xx.h:21309
#define USART_ICR_TCBGTCF
Definition: stm32h723xx.h:21297
#define USART_ICR_TXFECF
Definition: stm32h723xx.h:21291
#define USART_CR3_RXFTIE
Definition: stm32h723xx.h:21138
#define USART_CR2_LBCL
Definition: stm32h723xx.h:21013
#define USART_CR1_MME
Definition: stm32h723xx.h:20949
#define USART_CR2_SWAP
Definition: stm32h723xx.h:21033
#define USART_CR1_IDLEIE
Definition: stm32h723xx.h:20919
#define USART_ICR_CMCF
Definition: stm32h723xx.h:21315
#define USART_CR3_TXFTIE
Definition: stm32h723xx.h:21126
#define USART_CR3_DMAT
Definition: stm32h723xx.h:21085
#define USART_RTOR_RTO
Definition: stm32h723xx.h:21165
#define USART_CR1_PCE
Definition: stm32h723xx.h:20937
#define USART_CR3_CTSIE
Definition: stm32h723xx.h:21094
#define USART_CR1_DEAT
Definition: stm32h723xx.h:20966
#define USART_CR1_RXFFIE
Definition: stm32h723xx.h:20989
#define USART_CR2_MSBFIRST
Definition: stm32h723xx.h:21045
#define USART_ISR_SBKF
Definition: stm32h723xx.h:21244
#define USART_CR3_WUS
Definition: stm32h723xx.h:21118
#define USART_CR2_ABRMODE
Definition: stm32h723xx.h:21051
#define USART_RQR_RXFRQ
Definition: stm32h723xx.h:21182
#define USART_CR3_RTSE
Definition: stm32h723xx.h:21088
#define USART_CR2_LBDL
Definition: stm32h723xx.h:21007
#define USART_CR3_WUFIE
Definition: stm32h723xx.h:21123
#define USART_ISR_CMF
Definition: stm32h723xx.h:21241
#define USART_CR1_RXNEIE_RXFNEIE
Definition: stm32h723xx.h:20922
#define USART_ICR_FECF
Definition: stm32h723xx.h:21279
#define USART_ISR_CTS
Definition: stm32h723xx.h:21220
#define USART_ICR_CTSCF
Definition: stm32h723xx.h:21303
#define USART_GTPR_GT
Definition: stm32h723xx.h:21160
#define USART_CR2_DATAINV
Definition: stm32h723xx.h:21042
#define USART_CR3_SCEN
Definition: stm32h723xx.h:21079
#define USART_CR1_TXEIE_TXFNFIE
Definition: stm32h723xx.h:20928
#define USART_CR1_M
Definition: stm32h723xx.h:20943
#define USART_CR3_ONEBIT
Definition: stm32h723xx.h:21097
#define USART_ICR_IDLECF
Definition: stm32h723xx.h:21288
#define USART_ISR_ORE
Definition: stm32h723xx.h:21199
#define USART_ISR_CTSIF
Definition: stm32h723xx.h:21217
#define USART_CR2_LBDIE
Definition: stm32h723xx.h:21010
#define USART_GTPR_PSC
Definition: stm32h723xx.h:21157
#define USART_ISR_PE
Definition: stm32h723xx.h:21190
#define USART_CR3_CTSE
Definition: stm32h723xx.h:21091
#define USART_CR1_TCIE
Definition: stm32h723xx.h:20925
#define USART_RQR_TXFRQ
Definition: stm32h723xx.h:21185
#define USART_ISR_TC
Definition: stm32h723xx.h:21208
#define USART_ISR_REACK
Definition: stm32h723xx.h:21256
#define USART_CR2_ABREN
Definition: stm32h723xx.h:21048
#define USART_ISR_RXFF
Definition: stm32h723xx.h:21262
#define USART_CR1_CMIE
Definition: stm32h723xx.h:20952
#define USART_ICR_LBDCF
Definition: stm32h723xx.h:21300
#define USART_CR3_EIE
Definition: stm32h723xx.h:21064
#define USART_CR1_DEDT
Definition: stm32h723xx.h:20958
#define USART_CR1_TXFEIE
Definition: stm32h723xx.h:20986
#define USART_CR2_RTOEN
Definition: stm32h723xx.h:21056
#define USART_CR3_RXFTCFG
Definition: stm32h723xx.h:21132
#define USART_ISR_RXNE_RXFNE
Definition: stm32h723xx.h:21205
#define USART_CR1_RTOIE
Definition: stm32h723xx.h:20974
#define USART_ICR_UDRCF
Definition: stm32h723xx.h:21312
#define USART_CR3_SCARCNT
Definition: stm32h723xx.h:21112
#define USART_CR3_HDSEL
Definition: stm32h723xx.h:21073
#define USART_CR2_LINEN
Definition: stm32h723xx.h:21030
#define USART_ICR_NECF
Definition: stm32h723xx.h:21282
#define USART_CR3_DEM
Definition: stm32h723xx.h:21106
#define USART_ISR_IDLE
Definition: stm32h723xx.h:21202
#define USART_ICR_TCCF
Definition: stm32h723xx.h:21294
#define USART_RQR_ABRRQ
Definition: stm32h723xx.h:21173
#define USART_CR2_DIS_NSS
Definition: stm32h723xx.h:21001
#define USART_CR1_WAKE
Definition: stm32h723xx.h:20940
#define USART_ISR_WUF
Definition: stm32h723xx.h:21250
#define USART_CR1_RE
Definition: stm32h723xx.h:20913
#define USART_CR2_TXINV
Definition: stm32h723xx.h:21039
#define USART_CR1_TE
Definition: stm32h723xx.h:20916
#define USART_CR3_DDRE
Definition: stm32h723xx.h:21103
#define USART_CR1_EOBIE
Definition: stm32h723xx.h:20977
#define USART_ISR_ABRE
Definition: stm32h723xx.h:21232
#define USART_ISR_RXFT
Definition: stm32h723xx.h:21268
#define USART_ISR_TCBGT
Definition: stm32h723xx.h:21265
#define USART_RDR_RDR
Definition: stm32h723xx.h:21323
#define USART_CR1_OVER8
Definition: stm32h723xx.h:20955
#define USART_CR2_STOP_0
Definition: stm32h723xx.h:21026
#define USART_ISR_UDR
Definition: stm32h723xx.h:21229
#define USART_ISR_LBDF
Definition: stm32h723xx.h:21214
#define USART_ISR_TEACK
Definition: stm32h723xx.h:21253
#define USART_ISR_TXFE
Definition: stm32h723xx.h:21259
#define USART_CR2_STOP
Definition: stm32h723xx.h:21025
#define USART_CR1_FIFOEN
Definition: stm32h723xx.h:20983
#define USART_ISR_BUSY
Definition: stm32h723xx.h:21238
#define USART_CR2_CPOL
Definition: stm32h723xx.h:21019
#define USART_ISR_ABRF
Definition: stm32h723xx.h:21235
#define USART_CR3_DMAR
Definition: stm32h723xx.h:21082
#define USART_CR2_RXINV
Definition: stm32h723xx.h:21036
CMSIS STM32H7xx Device Peripheral Access Layer Header File.
Universal Synchronous Asynchronous Receiver Transmitter.
Definition: stm32h723xx.h:1596
__IO uint32_t TDR
Definition: stm32h723xx.h:1607
__IO uint32_t RTOR
Definition: stm32h723xx.h:1602
__IO uint32_t CR1
Definition: stm32h723xx.h:1597
__IO uint32_t BRR
Definition: stm32h723xx.h:1600
__IO uint32_t ISR
Definition: stm32h723xx.h:1604
__IO uint32_t RDR
Definition: stm32h723xx.h:1606
__IO uint32_t CR2
Definition: stm32h723xx.h:1598
__IO uint32_t ICR
Definition: stm32h723xx.h:1605
__IO uint32_t PRESC
Definition: stm32h723xx.h:1608
__IO uint32_t RQR
Definition: stm32h723xx.h:1603
__IO uint32_t GTPR
Definition: stm32h723xx.h:1601
__IO uint32_t CR3
Definition: stm32h723xx.h:1599