RTEMS 6.1-rc5
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stm32h7xx_ll_rng.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_LL_RNG_H
21#define STM32H7xx_LL_RNG_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx.h"
29
34#if defined (RNG)
35
41/* Private types -------------------------------------------------------------*/
42/* Private defines -----------------------------------------------------------*/
47/* Health test control register information to use in CCM algorithm */
48#define LL_RNG_HTCFG 0x17590ABCU
52/* Private variables ---------------------------------------------------------*/
53/* Private constants ---------------------------------------------------------*/
54/* Private macros ------------------------------------------------------------*/
55
56/* Exported types ------------------------------------------------------------*/
57#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
67typedef struct
68{
69 uint32_t ClockErrorDetection;
73} LL_RNG_InitTypeDef;
74
78#endif /* USE_FULL_LL_DRIVER */
79/* Exported constants --------------------------------------------------------*/
89#define LL_RNG_CED_ENABLE 0x00000000U
90#define LL_RNG_CED_DISABLE RNG_CR_CED
95#if defined(RNG_CR_CONDRST)
101#define LL_RNG_CLKDIV_BY_1 (0x00000000UL)
102#define LL_RNG_CLKDIV_BY_2 (RNG_CR_CLKDIV_0)
103#define LL_RNG_CLKDIV_BY_4 (RNG_CR_CLKDIV_1)
104#define LL_RNG_CLKDIV_BY_8 (RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0)
105#define LL_RNG_CLKDIV_BY_16 (RNG_CR_CLKDIV_2)
106#define LL_RNG_CLKDIV_BY_32 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_0)
107#define LL_RNG_CLKDIV_BY_64 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1)
108#define LL_RNG_CLKDIV_BY_128 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0)
109#define LL_RNG_CLKDIV_BY_256 (RNG_CR_CLKDIV_3)
110#define LL_RNG_CLKDIV_BY_512 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_0)
111#define LL_RNG_CLKDIV_BY_1024 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_1)
112#define LL_RNG_CLKDIV_BY_2048 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0)
113#define LL_RNG_CLKDIV_BY_4096 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2)
114#define LL_RNG_CLKDIV_BY_8192 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_0)
115#define LL_RNG_CLKDIV_BY_16384 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1)
116#define LL_RNG_CLKDIV_BY_32768 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0)
125#define LL_RNG_NIST_COMPLIANT (0x00000000UL)
126#define LL_RNG_CUSTOM_NIST (RNG_CR_NISTC)
132#endif /* RNG_CR_CONDRST */
138#define LL_RNG_SR_DRDY RNG_SR_DRDY
139#define LL_RNG_SR_CECS RNG_SR_CECS
140#define LL_RNG_SR_SECS RNG_SR_SECS
141#define LL_RNG_SR_CEIS RNG_SR_CEIS
142#define LL_RNG_SR_SEIS RNG_SR_SEIS
152#define LL_RNG_CR_IE RNG_CR_IE
161/* Exported macro ------------------------------------------------------------*/
179#define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
180
187#define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
197/* Exported functions --------------------------------------------------------*/
213__STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)
214{
215 SET_BIT(RNGx->CR, RNG_CR_RNGEN);
216}
217
224__STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)
225{
226 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN);
227}
228
235__STATIC_INLINE uint32_t LL_RNG_IsEnabled(const RNG_TypeDef *RNGx)
236{
237 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL);
238}
239
246__STATIC_INLINE void LL_RNG_EnableClkErrorDetect(RNG_TypeDef *RNGx)
247{
248#if defined(RNG_CR_CONDRST)
249 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_ENABLE | RNG_CR_CONDRST);
250 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
251#else
252 CLEAR_BIT(RNGx->CR, RNG_CR_CED);
253#endif /* RNG_CR_CONDRST*/
254}
255
262__STATIC_INLINE void LL_RNG_DisableClkErrorDetect(RNG_TypeDef *RNGx)
263{
264#if defined(RNG_CR_CONDRST)
265 MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, LL_RNG_CED_DISABLE | RNG_CR_CONDRST);
266 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
267#else
268 SET_BIT(RNGx->CR, RNG_CR_CED);
269#endif /* RNG_CR_CONDRST*/
270}
271
278__STATIC_INLINE uint32_t LL_RNG_IsEnabledClkErrorDetect(const RNG_TypeDef *RNGx)
279{
280 return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL);
281}
282
283#if defined(RNG_CR_CONDRST)
290__STATIC_INLINE void LL_RNG_EnableCondReset(RNG_TypeDef *RNGx)
291{
292 SET_BIT(RNGx->CR, RNG_CR_CONDRST);
293}
294
301__STATIC_INLINE void LL_RNG_DisableCondReset(RNG_TypeDef *RNGx)
302{
303 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
304}
305
312__STATIC_INLINE uint32_t LL_RNG_IsEnabledCondReset(const RNG_TypeDef *RNGx)
313{
314 return ((READ_BIT(RNGx->CR, RNG_CR_CONDRST) == (RNG_CR_CONDRST)) ? 1UL : 0UL);
315}
316
323__STATIC_INLINE void LL_RNG_ConfigLock(RNG_TypeDef *RNGx)
324{
325 SET_BIT(RNGx->CR, RNG_CR_CONFIGLOCK);
326}
327
334__STATIC_INLINE uint32_t LL_RNG_IsConfigLocked(const RNG_TypeDef *RNGx)
335{
336 return ((READ_BIT(RNGx->CR, RNG_CR_CONFIGLOCK) == (RNG_CR_CONFIGLOCK)) ? 1UL : 0UL);
337}
338
345__STATIC_INLINE void LL_RNG_EnableNistCompliance(RNG_TypeDef *RNGx)
346{
347 MODIFY_REG(RNGx->CR, RNG_CR_NISTC | RNG_CR_CONDRST, LL_RNG_NIST_COMPLIANT | RNG_CR_CONDRST);
348 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
349}
350
357__STATIC_INLINE void LL_RNG_DisableNistCompliance(RNG_TypeDef *RNGx)
358{
359 MODIFY_REG(RNGx->CR, RNG_CR_NISTC | RNG_CR_CONDRST, LL_RNG_CUSTOM_NIST | RNG_CR_CONDRST);
360 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
361}
362
369__STATIC_INLINE uint32_t LL_RNG_IsEnabledNistCompliance(const RNG_TypeDef *RNGx)
370{
371 return ((READ_BIT(RNGx->CR, RNG_CR_NISTC) != (RNG_CR_NISTC)) ? 1UL : 0UL);
372}
373
381__STATIC_INLINE void LL_RNG_SetConfig1(RNG_TypeDef *RNGx, uint32_t Config1)
382{
383 MODIFY_REG(RNGx->CR, RNG_CR_RNG_CONFIG1 | RNG_CR_CONDRST, (Config1 << RNG_CR_RNG_CONFIG1_Pos) | RNG_CR_CONDRST);
384 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
385}
386
393__STATIC_INLINE uint32_t LL_RNG_GetConfig1(const RNG_TypeDef *RNGx)
394{
395 return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_RNG_CONFIG1) >> RNG_CR_RNG_CONFIG1_Pos);
396}
397
405__STATIC_INLINE void LL_RNG_SetConfig2(RNG_TypeDef *RNGx, uint32_t Config2)
406{
407 MODIFY_REG(RNGx->CR, RNG_CR_RNG_CONFIG2 | RNG_CR_CONDRST, (Config2 << RNG_CR_RNG_CONFIG2_Pos) | RNG_CR_CONDRST);
408 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
409}
410
417__STATIC_INLINE uint32_t LL_RNG_GetConfig2(const RNG_TypeDef *RNGx)
418{
419 return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_RNG_CONFIG2) >> RNG_CR_RNG_CONFIG2_Pos);
420}
421
429__STATIC_INLINE void LL_RNG_SetConfig3(RNG_TypeDef *RNGx, uint32_t Config3)
430{
431 MODIFY_REG(RNGx->CR, RNG_CR_RNG_CONFIG3 | RNG_CR_CONDRST, (Config3 << RNG_CR_RNG_CONFIG3_Pos) | RNG_CR_CONDRST);
432 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
433}
434
441__STATIC_INLINE uint32_t LL_RNG_GetConfig3(const RNG_TypeDef *RNGx)
442{
443 return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_RNG_CONFIG3) >> RNG_CR_RNG_CONFIG3_Pos);
444}
445
469__STATIC_INLINE void LL_RNG_SetClockDivider(RNG_TypeDef *RNGx, uint32_t Divider)
470{
471 MODIFY_REG(RNGx->CR, RNG_CR_CLKDIV | RNG_CR_CONDRST, Divider | RNG_CR_CONDRST);
472 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
473}
474
497__STATIC_INLINE uint32_t LL_RNG_GetClockDivider(const RNG_TypeDef *RNGx)
498{
499 return (uint32_t)READ_BIT(RNGx->CR, RNG_CR_CLKDIV);
500}
501#endif /* RNG_CR_CONDRST */
517__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(const RNG_TypeDef *RNGx)
518{
519 return ((READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY)) ? 1UL : 0UL);
520}
521
528__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(const RNG_TypeDef *RNGx)
529{
530 return ((READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS)) ? 1UL : 0UL);
531}
532
539__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(const RNG_TypeDef *RNGx)
540{
541 return ((READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS)) ? 1UL : 0UL);
542}
543
550__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(const RNG_TypeDef *RNGx)
551{
552 return ((READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS)) ? 1UL : 0UL);
553}
554
561__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(const RNG_TypeDef *RNGx)
562{
563 return ((READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS)) ? 1UL : 0UL);
564}
565
572__STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx)
573{
574 WRITE_REG(RNGx->SR, ~RNG_SR_CEIS);
575}
576
583__STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx)
584{
585 WRITE_REG(RNGx->SR, ~RNG_SR_SEIS);
586}
587
604__STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx)
605{
606 SET_BIT(RNGx->CR, RNG_CR_IE);
607}
608
616__STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx)
617{
618 CLEAR_BIT(RNGx->CR, RNG_CR_IE);
619}
620
628__STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(const RNG_TypeDef *RNGx)
629{
630 return ((READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE)) ? 1UL : 0UL);
631}
632
648__STATIC_INLINE uint32_t LL_RNG_ReadRandData32(const RNG_TypeDef *RNGx)
649{
650 return (uint32_t)(READ_REG(RNGx->DR));
651}
652
657#if defined(RNG_VER_3_2) || defined(RNG_VER_3_1) || defined(RNG_VER_3_0)
670__STATIC_INLINE void LL_RNG_SetHealthConfig(RNG_TypeDef *RNGx, uint32_t HTCFG)
671{
673 WRITE_REG(RNGx->HTCR, LL_RNG_HTCFG);
674
675 WRITE_REG(RNGx->HTCR, HTCFG);
676}
677
684__STATIC_INLINE uint32_t LL_RNG_GetHealthConfig(RNG_TypeDef *RNGx)
685{
687 WRITE_REG(RNGx->HTCR, LL_RNG_HTCFG);
688
689 return (uint32_t)READ_REG(RNGx->HTCR);
690}
691
695#endif /* RNG_VER_3_2, RNG_VER_3_1 or RNG_VER_3_0 */
696#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
701ErrorStatus LL_RNG_Init(RNG_TypeDef *RNGx, LL_RNG_InitTypeDef *RNG_InitStruct);
702void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct);
703ErrorStatus LL_RNG_DeInit(const RNG_TypeDef *RNGx);
704
708#endif /* USE_FULL_LL_DRIVER */
709
718#endif /* RNG */
719
724#ifdef __cplusplus
725}
726#endif
727
728#endif /* __STM32H7xx_LL_RNG_H */
729
stm32h7xx.h
CMSIS STM32H7xx Device Peripheral Access Layer Header File.
RNG_TypeDef
RNG.
Definition: stm32h723xx.h:1668
RNG_TypeDef::SR
__IO uint32_t SR
Definition: stm32h723xx.h:1670
RNG_TypeDef::DR
__IO uint32_t DR
Definition: stm32h723xx.h:1671
RNG_TypeDef::HTCR
__IO uint32_t HTCR
Definition: stm32h723xx.h:1673
RNG_TypeDef::CR
__IO uint32_t CR
Definition: stm32h723xx.h:1669
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