RTEMS 6.1-rc5
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stm32h7xx_ll_fmac.h
Go to the documentation of this file.
1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_LL_FMAC_H
21#define STM32H7xx_LL_FMAC_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx.h"
29
34#if defined(FMAC)
35
41/* Exported types ------------------------------------------------------------*/
42
43/* Exported constants --------------------------------------------------------*/
54#define LL_FMAC_SR_SAT FMAC_SR_SAT
56#define LL_FMAC_SR_UNFL FMAC_SR_UNFL
57#define LL_FMAC_SR_OVFL FMAC_SR_OVFL
58#define LL_FMAC_SR_X1FULL FMAC_SR_X1FULL
59#define LL_FMAC_SR_YEMPTY FMAC_SR_YEMPTY
69#define LL_FMAC_CR_SATIEN FMAC_CR_SATIEN
71#define LL_FMAC_CR_UNFLIEN FMAC_CR_UNFLIEN
72#define LL_FMAC_CR_OVFLIEN FMAC_CR_OVFLIEN
73#define LL_FMAC_CR_WIEN FMAC_CR_WIEN
74#define LL_FMAC_CR_RIEN FMAC_CR_RIEN
84#define LL_FMAC_WM_0_THRESHOLD_1 0x00000000U
86#define LL_FMAC_WM_1_THRESHOLD_2 0x01000000U
88#define LL_FMAC_WM_2_THRESHOLD_4 0x02000000U
90#define LL_FMAC_WM_3_THRESHOLD_8 0x03000000U
100#define LL_FMAC_FUNC_LOAD_X1 (FMAC_PARAM_FUNC_0)
101#define LL_FMAC_FUNC_LOAD_X2 (FMAC_PARAM_FUNC_1)
102#define LL_FMAC_FUNC_LOAD_Y (FMAC_PARAM_FUNC_1 | FMAC_PARAM_FUNC_0)
103#define LL_FMAC_FUNC_CONVO_FIR (FMAC_PARAM_FUNC_3)
104#define LL_FMAC_FUNC_IIR_DIRECT_FORM_1 (FMAC_PARAM_FUNC_3 | FMAC_PARAM_FUNC_0)
113#define LL_FMAC_PROCESSING_STOP 0x00U
114#define LL_FMAC_PROCESSING_START 0x01U
123/* External variables --------------------------------------------------------*/
124/* Exported macros -----------------------------------------------------------*/
142#define LL_FMAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
143
150#define LL_FMAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
160/* Exported functions --------------------------------------------------------*/
161
183__STATIC_INLINE void LL_FMAC_SetX1FullWatermark(FMAC_TypeDef *FMACx, uint32_t Watermark)
184{
185 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM, Watermark);
186}
187
198__STATIC_INLINE uint32_t LL_FMAC_GetX1FullWatermark(const FMAC_TypeDef *FMACx)
199{
200 return (uint32_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM));
201}
202
211__STATIC_INLINE void LL_FMAC_SetX1BufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
212{
213 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_X1BUFCFG_X1_BUF_SIZE_Pos);
214}
215
223__STATIC_INLINE uint8_t LL_FMAC_GetX1BufferSize(const FMAC_TypeDef *FMACx)
224{
225 return (uint8_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BUF_SIZE) >> FMAC_X1BUFCFG_X1_BUF_SIZE_Pos);
226}
227
236__STATIC_INLINE void LL_FMAC_SetX1Base(FMAC_TypeDef *FMACx, uint8_t Base)
237{
238 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BASE, ((uint32_t)Base) << FMAC_X1BUFCFG_X1_BASE_Pos);
239}
240
248__STATIC_INLINE uint8_t LL_FMAC_GetX1Base(const FMAC_TypeDef *FMACx)
249{
250 return (uint8_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BASE) >> FMAC_X1BUFCFG_X1_BASE_Pos);
251}
252
261__STATIC_INLINE void LL_FMAC_SetX2BufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
262{
263 MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_X2BUFCFG_X2_BUF_SIZE_Pos);
264}
265
273__STATIC_INLINE uint8_t LL_FMAC_GetX2BufferSize(const FMAC_TypeDef *FMACx)
274{
275 return (uint8_t)(READ_BIT(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BUF_SIZE) >> FMAC_X2BUFCFG_X2_BUF_SIZE_Pos);
276}
277
286__STATIC_INLINE void LL_FMAC_SetX2Base(FMAC_TypeDef *FMACx, uint8_t Base)
287{
288 MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE, ((uint32_t)Base) << FMAC_X2BUFCFG_X2_BASE_Pos);
289}
290
298__STATIC_INLINE uint8_t LL_FMAC_GetX2Base(const FMAC_TypeDef *FMACx)
299{
300 return (uint8_t)(READ_BIT(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE) >> FMAC_X2BUFCFG_X2_BASE_Pos);
301}
302
314__STATIC_INLINE void LL_FMAC_SetYEmptyWatermark(FMAC_TypeDef *FMACx, uint32_t Watermark)
315{
316 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM, Watermark);
317}
318
329__STATIC_INLINE uint32_t LL_FMAC_GetYEmptyWatermark(const FMAC_TypeDef *FMACx)
330{
331 return (uint32_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM));
332}
333
342__STATIC_INLINE void LL_FMAC_SetYBufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
343{
344 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_YBUFCFG_Y_BUF_SIZE_Pos);
345}
346
354__STATIC_INLINE uint8_t LL_FMAC_GetYBufferSize(const FMAC_TypeDef *FMACx)
355{
356 return (uint8_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BUF_SIZE) >> FMAC_YBUFCFG_Y_BUF_SIZE_Pos);
357}
358
367__STATIC_INLINE void LL_FMAC_SetYBase(FMAC_TypeDef *FMACx, uint8_t Base)
368{
369 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BASE, ((uint32_t)Base) << FMAC_YBUFCFG_Y_BASE_Pos);
370}
371
379__STATIC_INLINE uint8_t LL_FMAC_GetYBase(const FMAC_TypeDef *FMACx)
380{
381 return (uint8_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BASE) >> FMAC_YBUFCFG_Y_BASE_Pos);
382}
383
390__STATIC_INLINE void LL_FMAC_EnableStart(FMAC_TypeDef *FMACx)
391{
392 SET_BIT(FMACx->PARAM, FMAC_PARAM_START);
393}
394
401__STATIC_INLINE void LL_FMAC_DisableStart(FMAC_TypeDef *FMACx)
402{
403 CLEAR_BIT(FMACx->PARAM, FMAC_PARAM_START);
404}
405
412__STATIC_INLINE uint32_t LL_FMAC_IsEnabledStart(const FMAC_TypeDef *FMACx)
413{
414 return ((READ_BIT(FMACx->PARAM, FMAC_PARAM_START) == (FMAC_PARAM_START)) ? 1UL : 0UL);
415}
416
429__STATIC_INLINE void LL_FMAC_SetFunction(FMAC_TypeDef *FMACx, uint32_t Function)
430{
431 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_FUNC, Function);
432}
433
445__STATIC_INLINE uint32_t LL_FMAC_GetFunction(const FMAC_TypeDef *FMACx)
446{
447 return (uint32_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_FUNC));
448}
449
458__STATIC_INLINE void LL_FMAC_SetParamR(FMAC_TypeDef *FMACx, uint8_t Param)
459{
460 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_R, ((uint32_t)Param) << FMAC_PARAM_R_Pos);
461}
462
469__STATIC_INLINE uint8_t LL_FMAC_GetParamR(const FMAC_TypeDef *FMACx)
470{
471 return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_R) >> FMAC_PARAM_R_Pos);
472}
473
482__STATIC_INLINE void LL_FMAC_SetParamQ(FMAC_TypeDef *FMACx, uint8_t Param)
483{
484 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_Q, ((uint32_t)Param) << FMAC_PARAM_Q_Pos);
485}
486
493__STATIC_INLINE uint8_t LL_FMAC_GetParamQ(const FMAC_TypeDef *FMACx)
494{
495 return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_Q) >> FMAC_PARAM_Q_Pos);
496}
497
506__STATIC_INLINE void LL_FMAC_SetParamP(FMAC_TypeDef *FMACx, uint8_t Param)
507{
508 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_P, ((uint32_t)Param));
509}
510
518__STATIC_INLINE uint8_t LL_FMAC_GetParamP(const FMAC_TypeDef *FMACx)
519{
520 return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_P));
521}
522
538__STATIC_INLINE void LL_FMAC_EnableReset(FMAC_TypeDef *FMACx)
539{
540 SET_BIT(FMACx->CR, FMAC_CR_RESET);
541}
542
549__STATIC_INLINE uint32_t LL_FMAC_IsEnabledReset(const FMAC_TypeDef *FMACx)
550{
551 return ((READ_BIT(FMACx->CR, FMAC_CR_RESET) == (FMAC_CR_RESET)) ? 1UL : 0UL);
552}
553
569__STATIC_INLINE void LL_FMAC_EnableClipping(FMAC_TypeDef *FMACx)
570{
571 SET_BIT(FMACx->CR, FMAC_CR_CLIPEN);
572}
573
580__STATIC_INLINE void LL_FMAC_DisableClipping(FMAC_TypeDef *FMACx)
581{
582 CLEAR_BIT(FMACx->CR, FMAC_CR_CLIPEN);
583}
584
591__STATIC_INLINE uint32_t LL_FMAC_IsEnabledClipping(const FMAC_TypeDef *FMACx)
592{
593 return ((READ_BIT(FMACx->CR, FMAC_CR_CLIPEN) == (FMAC_CR_CLIPEN)) ? 1UL : 0UL);
594}
595
611__STATIC_INLINE void LL_FMAC_EnableDMAReq_WRITE(FMAC_TypeDef *FMACx)
612{
613 SET_BIT(FMACx->CR, FMAC_CR_DMAWEN);
614}
615
622__STATIC_INLINE void LL_FMAC_DisableDMAReq_WRITE(FMAC_TypeDef *FMACx)
623{
624 CLEAR_BIT(FMACx->CR, FMAC_CR_DMAWEN);
625}
626
633__STATIC_INLINE uint32_t LL_FMAC_IsEnabledDMAReq_WRITE(const FMAC_TypeDef *FMACx)
634{
635 return ((READ_BIT(FMACx->CR, FMAC_CR_DMAWEN) == (FMAC_CR_DMAWEN)) ? 1UL : 0UL);
636}
637
644__STATIC_INLINE void LL_FMAC_EnableDMAReq_READ(FMAC_TypeDef *FMACx)
645{
646 SET_BIT(FMACx->CR, FMAC_CR_DMAREN);
647}
648
655__STATIC_INLINE void LL_FMAC_DisableDMAReq_READ(FMAC_TypeDef *FMACx)
656{
657 CLEAR_BIT(FMACx->CR, FMAC_CR_DMAREN);
658}
659
666__STATIC_INLINE uint32_t LL_FMAC_IsEnabledDMAReq_READ(const FMAC_TypeDef *FMACx)
667{
668 return ((READ_BIT(FMACx->CR, FMAC_CR_DMAREN) == (FMAC_CR_DMAREN)) ? 1UL : 0UL);
669}
670
686__STATIC_INLINE void LL_FMAC_EnableIT_SAT(FMAC_TypeDef *FMACx)
687{
688 SET_BIT(FMACx->CR, FMAC_CR_SATIEN);
689}
690
697__STATIC_INLINE void LL_FMAC_DisableIT_SAT(FMAC_TypeDef *FMACx)
698{
699 CLEAR_BIT(FMACx->CR, FMAC_CR_SATIEN);
700}
701
708__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_SAT(const FMAC_TypeDef *FMACx)
709{
710 return ((READ_BIT(FMACx->CR, FMAC_CR_SATIEN) == (FMAC_CR_SATIEN)) ? 1UL : 0UL);
711}
712
719__STATIC_INLINE void LL_FMAC_EnableIT_UNFL(FMAC_TypeDef *FMACx)
720{
721 SET_BIT(FMACx->CR, FMAC_CR_UNFLIEN);
722}
723
730__STATIC_INLINE void LL_FMAC_DisableIT_UNFL(FMAC_TypeDef *FMACx)
731{
732 CLEAR_BIT(FMACx->CR, FMAC_CR_UNFLIEN);
733}
734
741__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_UNFL(const FMAC_TypeDef *FMACx)
742{
743 return ((READ_BIT(FMACx->CR, FMAC_CR_UNFLIEN) == (FMAC_CR_UNFLIEN)) ? 1UL : 0UL);
744}
745
752__STATIC_INLINE void LL_FMAC_EnableIT_OVFL(FMAC_TypeDef *FMACx)
753{
754 SET_BIT(FMACx->CR, FMAC_CR_OVFLIEN);
755}
756
763__STATIC_INLINE void LL_FMAC_DisableIT_OVFL(FMAC_TypeDef *FMACx)
764{
765 CLEAR_BIT(FMACx->CR, FMAC_CR_OVFLIEN);
766}
767
774__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_OVFL(const FMAC_TypeDef *FMACx)
775{
776 return ((READ_BIT(FMACx->CR, FMAC_CR_OVFLIEN) == (FMAC_CR_OVFLIEN)) ? 1UL : 0UL);
777}
778
785__STATIC_INLINE void LL_FMAC_EnableIT_WR(FMAC_TypeDef *FMACx)
786{
787 SET_BIT(FMACx->CR, FMAC_CR_WIEN);
788}
789
796__STATIC_INLINE void LL_FMAC_DisableIT_WR(FMAC_TypeDef *FMACx)
797{
798 CLEAR_BIT(FMACx->CR, FMAC_CR_WIEN);
799}
800
807__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_WR(const FMAC_TypeDef *FMACx)
808{
809 return ((READ_BIT(FMACx->CR, FMAC_CR_WIEN) == (FMAC_CR_WIEN)) ? 1UL : 0UL);
810}
811
818__STATIC_INLINE void LL_FMAC_EnableIT_RD(FMAC_TypeDef *FMACx)
819{
820 SET_BIT(FMACx->CR, FMAC_CR_RIEN);
821}
822
829__STATIC_INLINE void LL_FMAC_DisableIT_RD(FMAC_TypeDef *FMACx)
830{
831 CLEAR_BIT(FMACx->CR, FMAC_CR_RIEN);
832}
833
840__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_RD(const FMAC_TypeDef *FMACx)
841{
842 return ((READ_BIT(FMACx->CR, FMAC_CR_RIEN) == (FMAC_CR_RIEN)) ? 1UL : 0UL);
843}
844
860__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_SAT(const FMAC_TypeDef *FMACx)
861{
862 return ((READ_BIT(FMACx->SR, FMAC_SR_SAT) == (FMAC_SR_SAT)) ? 1UL : 0UL);
863}
864
871__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_UNFL(const FMAC_TypeDef *FMACx)
872{
873 return ((READ_BIT(FMACx->SR, FMAC_SR_UNFL) == (FMAC_SR_UNFL)) ? 1UL : 0UL);
874}
875
882__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_OVFL(const FMAC_TypeDef *FMACx)
883{
884 return ((READ_BIT(FMACx->SR, FMAC_SR_OVFL) == (FMAC_SR_OVFL)) ? 1UL : 0UL);
885}
886
893__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_X1FULL(const FMAC_TypeDef *FMACx)
894{
895 return ((READ_BIT(FMACx->SR, FMAC_SR_X1FULL) == (FMAC_SR_X1FULL)) ? 1UL : 0UL);
896}
897
904__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_YEMPTY(const FMAC_TypeDef *FMACx)
905{
906 return ((READ_BIT(FMACx->SR, FMAC_SR_YEMPTY) == (FMAC_SR_YEMPTY)) ? 1UL : 0UL);
907}
908
926__STATIC_INLINE void LL_FMAC_WriteData(FMAC_TypeDef *FMACx, uint16_t InData)
927{
928 WRITE_REG(FMACx->WDATA, InData);
929}
930
937__STATIC_INLINE uint16_t LL_FMAC_ReadData(const FMAC_TypeDef *FMACx)
938{
939 return (uint16_t)(READ_REG(FMACx->RDATA));
940}
941
968__STATIC_INLINE void LL_FMAC_ConfigX1(FMAC_TypeDef *FMACx, uint32_t Watermark, uint8_t Base, uint8_t BufferSize)
969{
971 Watermark | (((uint32_t)Base) << FMAC_X1BUFCFG_X1_BASE_Pos) |
972 (((uint32_t)BufferSize) << FMAC_X1BUFCFG_X1_BUF_SIZE_Pos));
973}
974
986__STATIC_INLINE void LL_FMAC_ConfigX2(FMAC_TypeDef *FMACx, uint8_t Base, uint8_t BufferSize)
987{
989 (((uint32_t)Base) << FMAC_X2BUFCFG_X2_BASE_Pos) |
990 (((uint32_t)BufferSize) << FMAC_X2BUFCFG_X2_BUF_SIZE_Pos));
991}
992
1010__STATIC_INLINE void LL_FMAC_ConfigY(FMAC_TypeDef *FMACx, uint32_t Watermark, uint8_t Base, uint8_t BufferSize)
1011{
1013 Watermark | (((uint32_t)Base) << FMAC_YBUFCFG_Y_BASE_Pos) |
1014 (((uint32_t)BufferSize) << FMAC_YBUFCFG_Y_BUF_SIZE_Pos));
1015}
1016
1042__STATIC_INLINE void LL_FMAC_ConfigFunc(FMAC_TypeDef *FMACx, uint8_t Start, uint32_t Function, uint8_t ParamP,
1043 uint8_t ParamQ, uint8_t ParamR)
1044{
1046 (((uint32_t)Start) << FMAC_PARAM_START_Pos) | Function | (((uint32_t)ParamP) << FMAC_PARAM_P_Pos) |
1047 (((uint32_t)ParamQ) << FMAC_PARAM_Q_Pos) | (((uint32_t)ParamR) << FMAC_PARAM_R_Pos));
1048}
1049
1056#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
1061ErrorStatus LL_FMAC_Init(FMAC_TypeDef *FMACx);
1062ErrorStatus LL_FMAC_DeInit(const FMAC_TypeDef *FMACx);
1063
1064
1068#endif /* USE_FULL_LL_DRIVER */
1069
1078#endif /* defined(FMAC) */
1079
1084#ifdef __cplusplus
1085}
1086#endif
1087
1088#endif /* STM32H7xx_LL_FMAC_H */
#define FMAC_X2BUFCFG_X2_BUF_SIZE
Definition: stm32h723xx.h:11188
#define FMAC_YBUFCFG_Y_BASE
Definition: stm32h723xx.h:11192
#define FMAC_SR_UNFL
Definition: stm32h723xx.h:11262
#define FMAC_PARAM_P
Definition: stm32h723xx.h:11202
#define FMAC_CR_OVFLIEN
Definition: stm32h723xx.h:11231
#define FMAC_SR_SAT
Definition: stm32h723xx.h:11265
#define FMAC_CR_RESET
Definition: stm32h723xx.h:11249
#define FMAC_CR_UNFLIEN
Definition: stm32h723xx.h:11234
#define FMAC_X1BUFCFG_FULL_WM
Definition: stm32h723xx.h:11181
#define FMAC_PARAM_Q
Definition: stm32h723xx.h:11205
#define FMAC_SR_YEMPTY
Definition: stm32h723xx.h:11253
#define FMAC_CR_DMAREN
Definition: stm32h723xx.h:11240
#define FMAC_X1BUFCFG_X1_BASE
Definition: stm32h723xx.h:11175
#define FMAC_X2BUFCFG_X2_BASE
Definition: stm32h723xx.h:11185
#define FMAC_SR_X1FULL
Definition: stm32h723xx.h:11256
#define FMAC_YBUFCFG_Y_BUF_SIZE
Definition: stm32h723xx.h:11195
#define FMAC_CR_DMAWEN
Definition: stm32h723xx.h:11243
#define FMAC_PARAM_START
Definition: stm32h723xx.h:11221
#define FMAC_SR_OVFL
Definition: stm32h723xx.h:11259
#define FMAC_CR_WIEN
Definition: stm32h723xx.h:11228
#define FMAC_PARAM_R
Definition: stm32h723xx.h:11208
#define FMAC_CR_SATIEN
Definition: stm32h723xx.h:11237
#define FMAC_YBUFCFG_EMPTY_WM
Definition: stm32h723xx.h:11198
#define FMAC_X1BUFCFG_X1_BUF_SIZE
Definition: stm32h723xx.h:11178
#define FMAC_CR_CLIPEN
Definition: stm32h723xx.h:11246
#define FMAC_PARAM_FUNC
Definition: stm32h723xx.h:11211
#define FMAC_CR_RIEN
Definition: stm32h723xx.h:11225
CMSIS STM32H7xx Device Peripheral Access Layer Header File.
Filter and Mathematical ACcelerator.
Definition: stm32h723xx.h:990
__IO uint32_t PARAM
Definition: stm32h723xx.h:994
__IO uint32_t X2BUFCFG
Definition: stm32h723xx.h:992
__IO uint32_t SR
Definition: stm32h723xx.h:996
__IO uint32_t YBUFCFG
Definition: stm32h723xx.h:993
__IO uint32_t RDATA
Definition: stm32h723xx.h:998
__IO uint32_t X1BUFCFG
Definition: stm32h723xx.h:991
__IO uint32_t WDATA
Definition: stm32h723xx.h:997
__IO uint32_t CR
Definition: stm32h723xx.h:995