RTEMS 6.1-rc5
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stm32h7xx_ll_comp.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef __STM32H7xx_LL_COMP_H
21#define __STM32H7xx_LL_COMP_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx.h"
29
34#if defined (COMP1) || defined (COMP2)
35
41/* Private types -------------------------------------------------------------*/
42/* Private variables ---------------------------------------------------------*/
43/* Private constants ---------------------------------------------------------*/
49/* COMP registers bits positions */
50#define LL_COMP_OUTPUT_LEVEL_BITOFFSET_POS (30U) /* Value equivalent to POSITION_VAL(COMP_CSR_VALUE) */
51
56/* Private macros ------------------------------------------------------------*/
64/* Exported types ------------------------------------------------------------*/
65#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
74typedef struct
75{
76 uint32_t PowerMode;
81 uint32_t InputPlus;
86 uint32_t InputMinus;
91 uint32_t InputHysteresis;
96 uint32_t OutputPolarity;
101 uint32_t OutputBlankingSource;
106} LL_COMP_InitTypeDef;
107
111#endif /* USE_FULL_LL_DRIVER */
112
113/* Exported constants --------------------------------------------------------*/
123#define LL_COMP_WINDOWMODE_DISABLE (0x00000000UL)
124#define LL_COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON (COMP_CFGRx_WINMODE)
133#define LL_COMP_POWERMODE_HIGHSPEED (0x00000000UL)
134#define LL_COMP_POWERMODE_MEDIUMSPEED (COMP_CFGRx_PWRMODE_0)
135#define LL_COMP_POWERMODE_ULTRALOWPOWER (COMP_CFGRx_PWRMODE_1 | COMP_CFGRx_PWRMODE_0)
144#define LL_COMP_INPUT_PLUS_IO1 (0x00000000UL)
145#define LL_COMP_INPUT_PLUS_IO2 (COMP_CFGRx_INPSEL)
146#if defined (COMP_CFGRx_INP2SEL)
147#define LL_COMP_INPUT_PLUS_DAC2_CH1 (COMP_CFGRx_INP2SEL)
148#endif
157#define LL_COMP_INPUT_MINUS_1_4VREFINT ( COMP_CFGRx_SCALEN | COMP_CFGRx_BRGEN)
158#define LL_COMP_INPUT_MINUS_1_2VREFINT ( COMP_CFGRx_INMSEL_0 | COMP_CFGRx_SCALEN | COMP_CFGRx_BRGEN)
159#define LL_COMP_INPUT_MINUS_3_4VREFINT ( COMP_CFGRx_INMSEL_1 | COMP_CFGRx_SCALEN | COMP_CFGRx_BRGEN)
160#define LL_COMP_INPUT_MINUS_VREFINT ( COMP_CFGRx_INMSEL_1 | COMP_CFGRx_INMSEL_0 | COMP_CFGRx_SCALEN )
161#define LL_COMP_INPUT_MINUS_DAC1_CH1 ( COMP_CFGRx_INMSEL_2 )
162#define LL_COMP_INPUT_MINUS_DAC1_CH2 ( COMP_CFGRx_INMSEL_2 | COMP_CFGRx_INMSEL_0 )
163#define LL_COMP_INPUT_MINUS_IO1 ( COMP_CFGRx_INMSEL_2 | COMP_CFGRx_INMSEL_1 )
164#define LL_COMP_INPUT_MINUS_IO2 ( COMP_CFGRx_INMSEL_2 | COMP_CFGRx_INMSEL_1 | COMP_CFGRx_INMSEL_0 )
165#if defined (COMP_CFGRx_INMSEL_3)
166#define LL_COMP_INPUT_MINUS_TPSENS_DAC2CH1 (COMP_CFGRx_INMSEL_3 )
167#define LL_COMP_INPUT_MINUS_VBAT_VDDAP (COMP_CFGRx_INMSEL_3 | COMP_CFGRx_INMSEL_0 )
168#endif
177#define LL_COMP_HYSTERESIS_NONE (0x00000000UL)
178#define LL_COMP_HYSTERESIS_LOW ( COMP_CFGRx_HYST_0)
179#define LL_COMP_HYSTERESIS_MEDIUM (COMP_CFGRx_HYST_1 )
180#define LL_COMP_HYSTERESIS_HIGH (COMP_CFGRx_HYST_1 | COMP_CFGRx_HYST_0)
189#define LL_COMP_OUTPUTPOL_NONINVERTED (0x00000000UL)
190#define LL_COMP_OUTPUTPOL_INVERTED (COMP_CFGRx_POLARITY)
199#define LL_COMP_BLANKINGSRC_NONE (0x00000000UL)
200#define LL_COMP_BLANKINGSRC_TIM1_OC5 (COMP_CFGRx_BLANKING_0)
201#define LL_COMP_BLANKINGSRC_TIM2_OC3 (COMP_CFGRx_BLANKING_1)
202#define LL_COMP_BLANKINGSRC_TIM3_OC3 (COMP_CFGRx_BLANKING_0 |COMP_CFGRx_BLANKING_1)
203#define LL_COMP_BLANKINGSRC_TIM3_OC4 (COMP_CFGRx_BLANKING_2)
204#define LL_COMP_BLANKINGSRC_TIM8_OC5 (COMP_CFGRx_BLANKING_2|COMP_CFGRx_BLANKING_0)
205#define LL_COMP_BLANKINGSRC_TIM15_OC1 (COMP_CFGRx_BLANKING_2|COMP_CFGRx_BLANKING_1)
214#define LL_COMP_OUTPUT_LEVEL_LOW (0x00000000UL)
215#define LL_COMP_OUTPUT_LEVEL_HIGH (0x00000001UL)
223#define LL_COMP_AF_PA6 COMP_OR_AFOPA6
224#define LL_COMP_AF_PA8 COMP_OR_AFOPA8
225#define LL_COMP_AF_PB12 COMP_OR_AFOPB12
226#define LL_COMP_AF_PE6 COMP_OR_AFOPE6
227#define LL_COMP_AF_PE15 COMP_OR_AFOPE15
228#define LL_COMP_AF_PG2 COMP_OR_AFOPG2
229#define LL_COMP_AF_PG3 COMP_OR_AFOPG3
230#define LL_COMP_AF_PG4 COMP_OR_AFOPG4
231#define LL_COMP_AF_PI1 COMP_OR_AFOPI1
232#define LL_COMP_AF_PI4 COMP_OR_AFOPI4
233#define LL_COMP_AF_PK2 COMP_OR_AFOPK2
247/* Delay for comparator startup time. */
248/* Note: Delay required to reach propagation delay specification. */
249/* Literal set to maximum value (refer to device datasheet, */
250/* parameter "tSTART"). */
251/* Unit: us */
252#define LL_COMP_DELAY_STARTUP_US ( 80UL)
254/* Delay for comparator voltage scaler stabilization time. */
255/* Note: Voltage scaler is used when selecting comparator input */
256/* based on VrefInt: VrefInt or subdivision of VrefInt. */
257/* Literal set to maximum value (refer to device datasheet, */
258/* parameter "tSTART_SCALER"). */
259/* Unit: us */
260#define LL_COMP_DELAY_VOLTAGE_SCALER_STAB_US ( 200UL)
270/* Exported macro ------------------------------------------------------------*/
287#define LL_COMP_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
288
295#define LL_COMP_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
314#define __LL_COMP_COMMON_INSTANCE(__COMPx__) \
315 (COMP12_COMMON)
316
325/* Exported functions --------------------------------------------------------*/
347__STATIC_INLINE void LL_COMP_SetCommonWindowMode(COMP_Common_TypeDef *COMPxy_COMMON, uint32_t WindowMode)
348{
349 /* Note: On this STM32 series, window mode can be set only */
350 /* from COMP instance: COMP2. */
351 MODIFY_REG(COMPxy_COMMON->CFGR, COMP_CFGRx_WINMODE, WindowMode);
352}
353
364__STATIC_INLINE uint32_t LL_COMP_GetCommonWindowMode(COMP_Common_TypeDef *COMPxy_COMMON)
365{
366 return (uint32_t)(READ_BIT(COMPxy_COMMON->CFGR, COMP_CFGRx_WINMODE));
367}
368
388__STATIC_INLINE void LL_COMP_SetPowerMode(COMP_TypeDef *COMPx, uint32_t PowerMode)
389{
390 MODIFY_REG(COMPx->CFGR, COMP_CFGRx_PWRMODE, PowerMode);
391}
392
402__STATIC_INLINE uint32_t LL_COMP_GetPowerMode(COMP_TypeDef *COMPx)
403{
404 return (uint32_t)(READ_BIT(COMPx->CFGR, COMP_CFGRx_PWRMODE));
405}
406
455__STATIC_INLINE void LL_COMP_ConfigInputs(COMP_TypeDef *COMPx, uint32_t InputMinus, uint32_t InputPlus)
456{
457#if defined (COMP_CFGRx_INP2SEL)
458 MODIFY_REG(COMPx->CFGR,
459 COMP_CFGRx_INMSEL | COMP_CFGRx_INPSEL |
460 COMP_CFGRx_INP2SEL |
461 COMP_CFGRx_SCALEN | COMP_CFGRx_BRGEN,
462 InputMinus | InputPlus);
463#else
464 MODIFY_REG(COMPx->CFGR,
465 COMP_CFGRx_INMSEL | COMP_CFGRx_INPSEL |
466 COMP_CFGRx_SCALEN | COMP_CFGRx_BRGEN,
467 InputMinus | InputPlus);
468#endif
469}
470
484__STATIC_INLINE void LL_COMP_SetInputPlus(COMP_TypeDef *COMPx, uint32_t InputPlus)
485{
486#if defined (COMP_CFGRx_INP2SEL)
487 MODIFY_REG(COMPx->CFGR, COMP_CFGRx_INPSEL | COMP_CFGRx_INP2SEL , InputPlus);
488#else
489 MODIFY_REG(COMPx->CFGR, COMP_CFGRx_INPSEL , InputPlus);
490#endif
491}
492
505__STATIC_INLINE uint32_t LL_COMP_GetInputPlus(COMP_TypeDef *COMPx)
506{
507#if defined (COMP_CFGRx_INP2SEL)
508 return (uint32_t)(READ_BIT(COMPx->CFGR, COMP_CFGRx_INPSEL | COMP_CFGRx_INP2SEL));
509#else
510 return (uint32_t)(READ_BIT(COMPx->CFGR, COMP_CFGRx_INPSEL));
511#endif
512}
513
548__STATIC_INLINE void LL_COMP_SetInputMinus(COMP_TypeDef *COMPx, uint32_t InputMinus)
549{
550 MODIFY_REG(COMPx->CFGR, COMP_CFGRx_INMSEL | COMP_CFGRx_SCALEN | COMP_CFGRx_BRGEN, InputMinus);
551}
552
574__STATIC_INLINE uint32_t LL_COMP_GetInputMinus(COMP_TypeDef *COMPx)
575{
576 return (uint32_t)(READ_BIT(COMPx->CFGR, COMP_CFGRx_INMSEL | COMP_CFGRx_SCALEN | COMP_CFGRx_BRGEN));
577}
578
590__STATIC_INLINE void LL_COMP_SetInputHysteresis(COMP_TypeDef *COMPx, uint32_t InputHysteresis)
591{
592 MODIFY_REG(COMPx->CFGR, COMP_CFGRx_HYST, InputHysteresis);
593}
594
605__STATIC_INLINE uint32_t LL_COMP_GetInputHysteresis(COMP_TypeDef *COMPx)
606{
607 return (uint32_t)(READ_BIT(COMPx->CFGR, COMP_CFGRx_HYST));
608}
609
628__STATIC_INLINE void LL_COMP_SetOutputPolarity(COMP_TypeDef *COMPx, uint32_t OutputPolarity)
629{
630 MODIFY_REG(COMPx->CFGR, COMP_CFGRx_POLARITY, OutputPolarity);
631}
632
641__STATIC_INLINE uint32_t LL_COMP_GetOutputPolarity(COMP_TypeDef *COMPx)
642{
643 return (uint32_t)(READ_BIT(COMPx->CFGR, COMP_CFGRx_POLARITY));
644}
645
664__STATIC_INLINE void LL_COMP_SetOutputBlankingSource(COMP_TypeDef *COMPx, uint32_t BlankingSource)
665{
666 MODIFY_REG(COMPx->CFGR, COMP_CFGRx_BLANKING, BlankingSource);
667}
668
686__STATIC_INLINE uint32_t LL_COMP_GetOutputBlankingSource(COMP_TypeDef *COMPx)
687{
688 return (uint32_t)(READ_BIT(COMPx->CFGR, COMP_CFGRx_BLANKING));
689}
690
711__STATIC_INLINE void LL_COMP_SetOutputAlternateFunction(COMP_TypeDef *COMPx, uint32_t CompAFx)
712{
713 MODIFY_REG(COMP12->OR, 0x7FFUL, (COMPx == COMP1) ? ((~CompAFx) & 0x7FFUL) : CompAFx);
714}
715
732__STATIC_INLINE uint32_t LL_COMP_GetOutputAlternateFunction(COMP_TypeDef *COMPx )
733{
734 return (uint32_t) ((COMPx == COMP1) ? ((~COMP12->OR) & 0x7FFUL) : (COMP12->OR & 0x7FFUL));
735}
736
755__STATIC_INLINE void LL_COMP_Enable(COMP_TypeDef *COMPx)
756{
757 SET_BIT(COMPx->CFGR, COMP_CFGRx_EN);
758}
759
766__STATIC_INLINE void LL_COMP_Disable(COMP_TypeDef *COMPx)
767{
768 CLEAR_BIT(COMPx->CFGR, COMP_CFGRx_EN);
769}
770
778__STATIC_INLINE uint32_t LL_COMP_IsEnabled(COMP_TypeDef *COMPx)
779{
780 return ((READ_BIT(COMPx->CFGR, COMP_CFGRx_EN) == (COMP_CFGRx_EN)) ? 1UL : 0UL);
781}
782
791__STATIC_INLINE void LL_COMP_Lock(COMP_TypeDef *COMPx)
792{
793 SET_BIT(COMPx->CFGR, COMP_CFGRx_LOCK);
794}
795
805__STATIC_INLINE uint32_t LL_COMP_IsLocked(COMP_TypeDef *COMPx)
806{
807 return ((READ_BIT(COMPx->CFGR, COMP_CFGRx_LOCK) == (COMP_CFGRx_LOCK)) ? 1UL : 0UL);
808}
809
830__STATIC_INLINE uint32_t LL_COMP_ReadOutputLevel(COMP_TypeDef *COMPx)
831{
832 if (COMPx == COMP1)
833 {
834 return (uint32_t)(READ_BIT(COMP12->SR, COMP_SR_C1VAL));
835 }
836 else
837 {
838 return (uint32_t)((READ_BIT(COMP12->SR, COMP_SR_C2VAL))>> 1);
839 }
840}
841
857__STATIC_INLINE uint32_t LL_COMP_IsActiveFlag_OutputTrig(COMP_TypeDef *COMPx)
858{
859 if (COMPx == COMP1)
860 {
861 return ((READ_BIT(COMP12->SR, COMP_SR_C1IF) == (COMP_SR_C1IF)) ? 1UL : 0UL);
862 }
863 else
864 {
865 return ((READ_BIT(COMP12->SR, COMP_SR_C2IF) == (COMP_SR_C2IF)) ? 1UL : 0UL);
866 }
867}
868
875__STATIC_INLINE void LL_COMP_ClearFlag_OutputTrig(COMP_TypeDef *COMPx)
876{
877 if (COMPx == COMP1)
878 {
879 SET_BIT(COMP12->ICFR, COMP_ICFR_C1IF);
880 }
881 else
882 {
883 SET_BIT(COMP12->ICFR, COMP_ICFR_C2IF);
884 }
885}
886
902__STATIC_INLINE void LL_COMP_EnableIT_OutputTrig(COMP_TypeDef *COMPx)
903{
904 SET_BIT(COMPx->CFGR, COMP_CFGRx_ITEN);
905}
906
913__STATIC_INLINE void LL_COMP_DisableIT_OutputTrig(COMP_TypeDef *COMPx)
914{
915 CLEAR_BIT(COMPx->CFGR, COMP_CFGRx_ITEN);
916}
917
924__STATIC_INLINE uint32_t LL_COMP_IsEnabledIT_OutputTrig(COMP_TypeDef *COMPx)
925{
926 return ((READ_BIT(COMPx->CFGR, COMP_CFGRx_ITEN) == (COMP_CFGRx_ITEN)) ? 1UL : 0UL);
927}
928
933#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
939ErrorStatus LL_COMP_DeInit(COMP_TypeDef *COMPx);
940ErrorStatus LL_COMP_Init(COMP_TypeDef *COMPx, LL_COMP_InitTypeDef *COMP_InitStruct);
941void LL_COMP_StructInit(LL_COMP_InitTypeDef *COMP_InitStruct);
942
946#endif /* USE_FULL_LL_DRIVER */
947
956#endif /* COMP1 || COMP2 */
957
962#ifdef __cplusplus
963}
964#endif
965
966#endif /* __STM32H7xx_LL_COMP_H */
967
968
COMP_CFGRx_PWRMODE
#define COMP_CFGRx_PWRMODE
Definition: stm32h723xx.h:20876
COMP_CFGRx_INPSEL
#define COMP_CFGRx_INPSEL
Definition: stm32h723xx.h:20887
COMP_CFGRx_SCALEN
#define COMP_CFGRx_SCALEN
Definition: stm32h723xx.h:20859
COMP_CFGRx_INP2SEL
#define COMP_CFGRx_INP2SEL
Definition: stm32h7a3xx.h:19210
COMP_CFGRx_INMSEL
#define COMP_CFGRx_INMSEL
Definition: stm32h723xx.h:20881
COMP_CFGRx_WINMODE
#define COMP_CFGRx_WINMODE
Definition: stm32h723xx.h:20865
COMP_CFGRx_LOCK
#define COMP_CFGRx_LOCK
Definition: stm32h723xx.h:20896
COMP_CFGRx_BLANKING
#define COMP_CFGRx_BLANKING
Definition: stm32h723xx.h:20890
COMP_CFGRx_EN
#define COMP_CFGRx_EN
Definition: stm32h723xx.h:20853
COMP_CFGRx_BRGEN
#define COMP_CFGRx_BRGEN
Definition: stm32h723xx.h:20856
COMP_CFGRx_POLARITY
#define COMP_CFGRx_POLARITY
Definition: stm32h723xx.h:20862
COMP_CFGRx_ITEN
#define COMP_CFGRx_ITEN
Definition: stm32h723xx.h:20868
COMP_CFGRx_HYST
#define COMP_CFGRx_HYST
Definition: stm32h723xx.h:20871
stm32h7xx.h
CMSIS STM32H7xx Device Peripheral Access Layer Header File.
COMP_Common_TypeDef
Definition: stm32h723xx.h:1588
COMP_Common_TypeDef::CFGR
__IO uint32_t CFGR
Definition: stm32h723xx.h:1589
COMP_TypeDef
Definition: stm32h723xx.h:1583
COMP_TypeDef::CFGR
__IO uint32_t CFGR
Definition: stm32h723xx.h:1584
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