RTEMS 6.1-rc5
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stm32h7xx_hal_ramecc.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_RAMECC_H
21#define STM32H7xx_HAL_RAMECC_H
22
23#ifdef __cplusplus
24 extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
38/* Exported types ------------------------------------------------------------*/
39
49typedef enum
50{
51 HAL_RAMECC_STATE_RESET = 0x00U,
52 HAL_RAMECC_STATE_READY = 0x01U,
53 HAL_RAMECC_STATE_BUSY = 0x02U,
54 HAL_RAMECC_STATE_ERROR = 0x03U,
55}HAL_RAMECC_StateTypeDef;
56
57
61#if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1)
62typedef struct __RAMECC_HandleTypeDef
63#else
64typedef struct
65#endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */
66{
67 RAMECC_MonitorTypeDef *Instance;
68 __IO HAL_RAMECC_StateTypeDef State;
69 __IO uint32_t ErrorCode;
70 __IO uint32_t RAMECCErrorCode;
71#if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1)
72 void (* DetectErrorCallback)( struct __RAMECC_HandleTypeDef *hramecc);
73#endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */
74}RAMECC_HandleTypeDef;
75
81/* Exported constants --------------------------------------------------------*/
90#define HAL_RAMECC_ERROR_NONE 0x00000000U
91#define HAL_RAMECC_ERROR_TIMEOUT 0x00000001U
92#define HAL_RAMECC_ERROR_BUSY 0x00000002U
93#if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1)
94#define HAL_RAMECC_ERROR_INVALID_CALLBACK 0x00000003U
95#endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */
96
104#define HAL_RAMECC_NO_ERROR 0x00000000U
105#define HAL_RAMECC_SINGLEERROR_DETECTED 0x00000001U
106#define HAL_RAMECC_DOUBLEERROR_DETECTED 0x00000002U
115#define RAMECC_IT_GLOBAL_ID 0x10000000UL
116#define RAMECC_IT_MONITOR_ID 0x20000000UL
117
118#define RAMECC_IT_GLOBAL_ENABLE (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GIE)
119#define RAMECC_IT_GLOBAL_SINGLEERR_R (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCSEIE)
120#define RAMECC_IT_GLOBAL_DOUBLEERR_R (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEIE)
121#define RAMECC_IT_GLOBAL_DOUBLEERR_W (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEBWIE)
122#define RAMECC_IT_GLOBAL_ALL (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GIE | RAMECC_IER_GECCSEIE | RAMECC_IER_GECCDEIE | RAMECC_IER_GECCDEBWIE)
123
124
125#define RAMECC_IT_MONITOR_SINGLEERR_R (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCSEIE)
126#define RAMECC_IT_MONITOR_DOUBLEERR_R (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEIE)
127#define RAMECC_IT_MONITOR_DOUBLEERR_W (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE)
128#define RAMECC_IT_MONITOR_ALL (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE | RAMECC_CR_ECCDEIE | RAMECC_CR_ECCSEIE)
137#define RAMECC_FLAG_SINGLEERR_R RAMECC_SR_SEDCF
138#define RAMECC_FLAG_DOUBLEERR_R RAMECC_SR_DEDF
139#define RAMECC_FLAG_DOUBLEERR_W RAMECC_SR_DEBWDF
140#define RAMECC_FLAGS_ALL (RAMECC_SR_SEDCF | RAMECC_SR_DEDF | RAMECC_SR_DEBWDF)
141
149/* Exported macro ------------------------------------------------------------*/
155#define __HAL_RAMECC_ENABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) |= ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID))
156#define __HAL_RAMECC_ENABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= ((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID))
157
174#define __HAL_RAMECC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ( \
175(IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_ENABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\
176(__HAL_RAMECC_ENABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__))))
177
178
179#define __HAL_RAMECC_DISABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) &= ~((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID))
180#define __HAL_RAMECC_DISABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID))
181
198#define __HAL_RAMECC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ( \
199(IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_DISABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\
200(__HAL_RAMECC_DISABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__))))
201
202
203#define __HAL_RAMECC_GET_GLOBAL_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) & ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) ? SET : RESET)
204#define __HAL_RAMECC_GET_MONITOR_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR) & ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) ? SET : RESET)
205
222#define __HAL_RAMECC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ( \
223(IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_GET_GLOBAL_IT_SOURCE((__HANDLE__), (__INTERRUPT__))) :\
224(__HAL_RAMECC_GET_MONITOR_IT_SOURCE((__HANDLE__), (__INTERRUPT__))))
225
226
238#define __HAL_RAMECC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= (__FLAG__))
239
240
252#define __HAL_RAMECC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__))
253
259#define __HAL_RAMECC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RAMECC_STATE_RESET)
264/* Exported functions --------------------------------------------------------*/
265
277HAL_StatusTypeDef HAL_RAMECC_Init(RAMECC_HandleTypeDef *hramecc);
278HAL_StatusTypeDef HAL_RAMECC_DeInit(RAMECC_HandleTypeDef *hramecc);
288HAL_StatusTypeDef HAL_RAMECC_StartMonitor(RAMECC_HandleTypeDef *hramecc);
289HAL_StatusTypeDef HAL_RAMECC_StopMonitor(RAMECC_HandleTypeDef *hramecc);
290HAL_StatusTypeDef HAL_RAMECC_EnableNotification(RAMECC_HandleTypeDef *hramecc, uint32_t Notifications);
291HAL_StatusTypeDef HAL_RAMECC_DisableNotification(RAMECC_HandleTypeDef *hramecc, uint32_t Notifications);
292
302void HAL_RAMECC_IRQHandler(RAMECC_HandleTypeDef *hramecc);
303void HAL_RAMECC_DetectErrorCallback(RAMECC_HandleTypeDef *hramecc);
304#if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1)
305HAL_StatusTypeDef HAL_RAMECC_RegisterCallback(RAMECC_HandleTypeDef *hramecc, void (* pCallback)(RAMECC_HandleTypeDef *_hramecc));
306HAL_StatusTypeDef HAL_RAMECC_UnRegisterCallback(RAMECC_HandleTypeDef *hramecc);
307#endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */
317uint32_t HAL_RAMECC_GetFailingAddress(RAMECC_HandleTypeDef *hramecc);
318uint32_t HAL_RAMECC_GetFailingDataLow(RAMECC_HandleTypeDef *hramecc);
319uint32_t HAL_RAMECC_GetFailingDataHigh(RAMECC_HandleTypeDef *hramecc);
320uint32_t HAL_RAMECC_GetHammingErrorCode(RAMECC_HandleTypeDef *hramecc);
321uint32_t HAL_RAMECC_IsECCSingleErrorDetected(RAMECC_HandleTypeDef *hramecc);
322uint32_t HAL_RAMECC_IsECCDoubleErrorDetected(RAMECC_HandleTypeDef *hramecc);
332HAL_RAMECC_StateTypeDef HAL_RAMECC_GetState(RAMECC_HandleTypeDef *hramecc);
333uint32_t HAL_RAMECC_GetError(RAMECC_HandleTypeDef *hramecc);
334uint32_t HAL_RAMECC_GetRAMECCError(RAMECC_HandleTypeDef *hramecc);
342/* Private Constants -------------------------------------------------------------*/
352/* Private macros ------------------------------------------------------------*/
359#define IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_GLOBAL_ENABLE) || \
360 ((INTERRUPT) == RAMECC_IT_GLOBAL_SINGLEERR_R) || \
361 ((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_R) || \
362 ((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_W) || \
363 ((INTERRUPT) == RAMECC_IT_GLOBAL_ALL))
364
365
366#define IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_MONITOR_SINGLEERR_R) || \
367 ((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_R) || \
368 ((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_W) || \
369 ((INTERRUPT) == RAMECC_IT_MONITOR_ALL))
370
371#define IS_RAMECC_INTERRUPT(INTERRUPT) ((IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT)) || \
372 (IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT)))
373
378/* Private functions ---------------------------------------------------------*/
395#ifdef __cplusplus
396}
397#endif
398
399#endif /* STM32H7xx_HAL_RAMECC_H */
__IO
#define __IO
Definition: core_cm4.h:239
HAL_RAMECC_StateTypeDef
HAL_RAMECC_StateTypeDef
HAL RAMECC State structures definition.
Definition: stm32h7xx_hal_ramecc.h:50
HAL_RAMECC_STATE_RESET
@ HAL_RAMECC_STATE_RESET
Definition: stm32h7xx_hal_ramecc.h:51
HAL_RAMECC_STATE_READY
@ HAL_RAMECC_STATE_READY
Definition: stm32h7xx_hal_ramecc.h:52
HAL_RAMECC_STATE_ERROR
@ HAL_RAMECC_STATE_ERROR
Definition: stm32h7xx_hal_ramecc.h:54
HAL_RAMECC_STATE_BUSY
@ HAL_RAMECC_STATE_BUSY
Definition: stm32h7xx_hal_ramecc.h:53
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
RAMECC_HandleTypeDef
RAMECC handle Structure definition.
Definition: stm32h7xx_hal_ramecc.h:66
RAMECC_HandleTypeDef::RAMECCErrorCode
__IO uint32_t RAMECCErrorCode
Definition: stm32h7xx_hal_ramecc.h:70
RAMECC_HandleTypeDef::Instance
RAMECC_MonitorTypeDef * Instance
Definition: stm32h7xx_hal_ramecc.h:67
RAMECC_HandleTypeDef::State
__IO HAL_RAMECC_StateTypeDef State
Definition: stm32h7xx_hal_ramecc.h:68
RAMECC_HandleTypeDef::ErrorCode
__IO uint32_t ErrorCode
Definition: stm32h7xx_hal_ramecc.h:69
RAMECC_MonitorTypeDef
RAM_ECC_Specific_Registers.
Definition: stm32h723xx.h:1644
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