RTEMS 6.1-rc5
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Header file of NAND HAL module. More...
#include "stm32h7xx_ll_fmc.h"
Go to the source code of this file.
Data Structures | |
struct | NAND_IDTypeDef |
NAND Memory electronic signature Structure definition. More... | |
struct | NAND_AddressTypeDef |
NAND Memory address Structure definition. More... | |
struct | NAND_DeviceConfigTypeDef |
NAND Memory info Structure definition. More... | |
struct | NAND_HandleTypeDef |
NAND handle Structure definition. More... | |
Macros | |
#define | __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET) |
Reset NAND handle state. | |
#define | NAND_DEVICE 0x80000000UL |
#define | NAND_WRITE_TIMEOUT 0x01000000UL |
#define | CMD_AREA (1UL<<16U) /* A16 = CLE high */ |
#define | ADDR_AREA (1UL<<17U) /* A17 = ALE high */ |
#define | NAND_CMD_AREA_A ((uint8_t)0x00) |
#define | NAND_CMD_AREA_B ((uint8_t)0x01) |
#define | NAND_CMD_AREA_C ((uint8_t)0x50) |
#define | NAND_CMD_AREA_TRUE1 ((uint8_t)0x30) |
#define | NAND_CMD_WRITE0 ((uint8_t)0x80) |
#define | NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10) |
#define | NAND_CMD_ERASE0 ((uint8_t)0x60) |
#define | NAND_CMD_ERASE1 ((uint8_t)0xD0) |
#define | NAND_CMD_READID ((uint8_t)0x90) |
#define | NAND_CMD_STATUS ((uint8_t)0x70) |
#define | NAND_CMD_LOCK_STATUS ((uint8_t)0x7A) |
#define | NAND_CMD_RESET ((uint8_t)0xFF) |
#define | NAND_VALID_ADDRESS 0x00000100UL |
#define | NAND_INVALID_ADDRESS 0x00000200UL |
#define | NAND_TIMEOUT_ERROR 0x00000400UL |
#define | NAND_BUSY 0x00000000UL |
#define | NAND_ERROR 0x00000001UL |
#define | NAND_READY 0x00000040UL |
#define | ARRAY_ADDRESS(__ADDRESS__, __HANDLE__) |
NAND memory address computation. | |
#define | COLUMN_ADDRESS(__HANDLE__) ((__HANDLE__)->Config.PageSize) |
NAND memory Column address computation. | |
#define | ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */ |
NAND memory address cycling. | |
#define | ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */ |
#define | ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */ |
#define | ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */ |
#define | COLUMN_1ST_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) & 0xFFU) /* 1st Column addressing cycle */ |
NAND memory Columns cycling. | |
#define | COLUMN_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd Column addressing cycle */ |
Enumerations | |
enum | HAL_NAND_StateTypeDef { HAL_NAND_STATE_RESET = 0x00U , HAL_NAND_STATE_READY = 0x01U , HAL_NAND_STATE_BUSY = 0x02U , HAL_NAND_STATE_ERROR = 0x03U } |
HAL NAND State structures definition. More... | |
Functions | |
HAL_StatusTypeDef | HAL_NAND_Init (NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing) |
HAL_StatusTypeDef | HAL_NAND_DeInit (NAND_HandleTypeDef *hnand) |
HAL_StatusTypeDef | HAL_NAND_ConfigDevice (NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig) |
HAL_StatusTypeDef | HAL_NAND_Read_ID (NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID) |
void | HAL_NAND_MspInit (NAND_HandleTypeDef *hnand) |
void | HAL_NAND_MspDeInit (NAND_HandleTypeDef *hnand) |
void | HAL_NAND_IRQHandler (NAND_HandleTypeDef *hnand) |
void | HAL_NAND_ITCallback (NAND_HandleTypeDef *hnand) |
HAL_StatusTypeDef | HAL_NAND_Reset (NAND_HandleTypeDef *hnand) |
HAL_StatusTypeDef | HAL_NAND_Read_Page_8b (NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead) |
HAL_StatusTypeDef | HAL_NAND_Write_Page_8b (NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, const uint8_t *pBuffer, uint32_t NumPageToWrite) |
HAL_StatusTypeDef | HAL_NAND_Read_SpareArea_8b (NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead) |
HAL_StatusTypeDef | HAL_NAND_Write_SpareArea_8b (NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, const uint8_t *pBuffer, uint32_t NumSpareAreaTowrite) |
HAL_StatusTypeDef | HAL_NAND_Read_Page_16b (NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToRead) |
HAL_StatusTypeDef | HAL_NAND_Write_Page_16b (NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, const uint16_t *pBuffer, uint32_t NumPageToWrite) |
HAL_StatusTypeDef | HAL_NAND_Read_SpareArea_16b (NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaToRead) |
HAL_StatusTypeDef | HAL_NAND_Write_SpareArea_16b (NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, const uint16_t *pBuffer, uint32_t NumSpareAreaTowrite) |
HAL_StatusTypeDef | HAL_NAND_Erase_Block (NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress) |
uint32_t | HAL_NAND_Address_Inc (const NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress) |
HAL_StatusTypeDef | HAL_NAND_ECC_Enable (NAND_HandleTypeDef *hnand) |
HAL_StatusTypeDef | HAL_NAND_ECC_Disable (NAND_HandleTypeDef *hnand) |
HAL_StatusTypeDef | HAL_NAND_GetECC (NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout) |
HAL_NAND_StateTypeDef | HAL_NAND_GetState (const NAND_HandleTypeDef *hnand) |
uint32_t | HAL_NAND_Read_Status (const NAND_HandleTypeDef *hnand) |
Header file of NAND HAL module.
Copyright (c) 2017 STMicroelectronics. All rights reserved.
This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.