RTEMS 6.1-rc5
Loading...
Searching...
No Matches
Macros
tm27.h File Reference

Implementations for interrupt mechanisms for Time Test 27. More...

Go to the source code of this file.

Macros

#define ERC32_BSP_USE_SYNCHRONOUS_TRAP   0
 
#define TEST_INTERRUPT_SOURCE   ERC32_INTERRUPT_EXTERNAL_1
 
#define TEST_INTERRUPT_SOURCE2   (ERC32_INTERRUPT_EXTERNAL_1+1)
 
#define MUST_WAIT_FOR_INTERRUPT   1
 
#define Cause_tm27_intr()
 
#define Clear_tm27_intr()    ERC32_Clear_interrupt( TEST_INTERRUPT_SOURCE )
 
#define Lower_tm27_intr()   /* empty */
 

Detailed Description

Implementations for interrupt mechanisms for Time Test 27.

Macro Definition Documentation

◆ Cause_tm27_intr

#define Cause_tm27_intr (   void)
Value:
do { \
ERC32_Force_interrupt( TEST_INTERRUPT_SOURCE+(Interrupt_nest>>1) ); \
nop(); \
nop(); \
nop(); \
} while (0)