Data Structures
struct	_gpc_tran_step_config
	Configuration for GPC transition step. More...

Macros
#define	GPC_RESERVED_USE_MACRO 0xFFFFFFFFU

#define	GPC_CM_SLEEP_SSAR_CTRL_OFFSET (0x200)

#define	GPC_CM_SLEEP_LPCG_CTRL_OFFSET (0x208)

#define	GPC_CM_SLEEP_PLL_CTRL_OFFSET (0x210)

#define	GPC_CM_SLEEP_ISO_CTRL_OFFSET (0x218)

#define	GPC_CM_SLEEP_RESET_CTRL_OFFSET (0x220)

#define	GPC_CM_SLEEP_POWER_CTRL_OFFSET (0x228)

#define	GPC_CM_WAKEUP_POWER_CTRL_OFFSET (0x290)

#define	GPC_CM_WAKEUP_RESET_CTRL_OFFSET (0x298)

#define	GPC_CM_WAKEUP_ISO_CTRL_OFFSET (0x2A0)

#define	GPC_CM_WAKEUP_PLL_CTRL_OFFSET (0x2A8)

#define	GPC_CM_WAKEUP_LPCG_CTRL_OFFSET (0x2B0)

#define	GPC_CM_WAKEUP_SSAR_CTRL_OFFSET (0x2B8)

#define	GPC_SP_SSAR_SAVE_CTRL_OFFSET (0x100)

#define	GPC_SP_LPCG_OFF_CTRL_OFFSET (0x110)

#define	GPC_SP_GROUP_DOWN_CTRL_OFFSET (0x120)

#define	GPC_SP_ROOT_DOWN_CTRL_OFFSET (0x130)

#define	GPC_SP_PLL_OFF_CTRL_OFFSET (0x140)

#define	GPC_SP_ISO_ON_CTRL_OFFSET (0x150)

#define	GPC_SP_RESET_EARLY_CTRL_OFFSET (0x160)

#define	GPC_SP_POWER_OFF_CTRL_OFFSET (0x170)

#define	GPC_SP_BIAS_OFF_CTRL_OFFSET (0x180)

#define	GPC_SP_BG_PLDO_OFF_CTRL_OFFSET (0x190)

#define	GPC_SP_LDO_PRE_CTRL_OFFSET (0x1A0)

#define	GPC_SP_DCDC_DOWN_CTRL_OFFSET (0x1B0)

#define	GPC_SP_DCDC_UP_CTRL_OFFSET (0x2B0)

#define	GPC_SP_LDO_POST_CTRL_OFFSET (0x210)

#define	GPC_SP_BG_PLDO_ON_CTRL_OFFSET (0x220)

#define	GPC_SP_BIAS_ON_CTRL_OFFSET (0x230)

#define	GPC_SP_POWER_ON_CTRL_OFFSET (0x240)

#define	GPC_SP_RESET_LATE_CTRL_OFFSET (0x250)

#define	GPC_SP_ISO_OFF_CTRL_OFFSET (0x260)

#define	GPC_SP_PLL_ON_CTRL_OFFSET (0x270)

#define	GPC_SP_ROOT_UP_CTRL_OFFSET (0x280)

#define	GPC_SP_GROUP_UP_CTRL_OFFSET (0x290)

#define	GPC_SP_LPCG_ON_CTRL_OFFSET (0x2A0)

#define	GPC_SP_SSAR_RESTORE_CTRL_OFFSET (0x2B0)

#define	GPC_STBY_LPCG_IN_CTRL_OFFSET (0xF0)

#define	GPC_STBY_PLL_IN_CTRL_OFFSET (0x100)

#define	GPC_STBY_BIAS_IN_CTRL_OFFSET (0x110)

#define	GPC_STBY_PLDO_IN_CTRL_OFFSET (0x120)

#define	GPC_STBY_BANDGAP_IN_CTRL_OFFSET (0x128)

#define	GPC_STBY_LDO_IN_CTRL_OFFSET (0x130)

#define	GPC_STBY_DCDC_IN_CTRL_OFFSET (0x140)

#define	GPC_STBY_PMIC_IN_CTRL_OFFSET (0x150)

#define	GPC_STBY_PMIC_OUT_CTRL_OFFSET (0x200)

#define	GPC_STBY_DCDC_OUT_CTRL_OFFSET (0x210)

#define	GPC_STBY_LDO_OUT_CTRL_OFFSET (0x220)

#define	GPC_STBY_BANDGAP_OUT_CTRL_OFFSET (0x238)

#define	GPC_STBY_PLDO_OUT_CTRL_OFFSET (0x238)

#define	GPC_STBY_BIAS_OUT_CTRL_OFFSET (0x240)

#define	GPC_STBY_PLL_OUT_CTRL_OFFSET (0x250)

#define	GPC_STBY_LPCG_OUT_CTRL_OFFSET (0x260)

#define	GPC_CM_STEP_REG_OFFSET

#define	GPC_SP_STEP_REG_OFFSET

#define	GPC_STBY_STEP_REG_OFFSET

#define	GPC_STAT(mask, shift) (uint32_t)(((uint32_t)(shift) << 16UL) + ((uint32_t)(mask) >> (uint32_t)(shift)))

#define	GPC_CM_ALL_INTERRUPT_STATUS

Typedefs
typedef enum _gpc_cm_standby_mode_status	gpc_cm_standby_mode_status_t
	CPU standby mode status.

typedef enum _gpc_cm_tran_step	gpc_cm_tran_step_t
	CPU mode transition step in sleep/wakeup sequence.

typedef enum _gpc_tran_step_counter_mode	gpc_tran_step_counter_mode_t
	Step counter work mode.

typedef enum _gpc_sp_tran_step	gpc_sp_tran_step_t
	GPC set point transition steps.

typedef enum _gpc_cpu_mode	gpc_cpu_mode_t
	CPU mode.

typedef struct _gpc_tran_step_config	gpc_tran_step_config_t
	Configuration for GPC transition step.

typedef enum _gpc_cm_wakeup_sp_sel	gpc_cm_wakeup_sp_sel_t
	CPU wakeup sequence setpoint options.

typedef enum _gpc_stby_tran_step	gpc_stby_tran_step_t
	GPC standby mode transition steps.

Enumerations
enum	{ kGPC_CM_EventWakeupRequest , kGPC_CM_DebugWakeupRequest }
	_gpc_cm_non_irq_wakeup_request GPC Non-IRQ wakeup request. More...

enum	{ kGPC_SetPoint0 = 1UL << 0UL , kGPC_SetPoint1 = 1UL << 1UL , kGPC_SetPoint2 = 1UL << 2UL , kGPC_SetPoint3 = 1UL << 3UL , kGPC_SetPoint4 = 1UL << 4UL , kGPC_SetPoint5 = 1UL << 5UL , kGPC_SetPoint6 = 1UL << 6UL , kGPC_SetPoint7 = 1UL << 7UL , kGPC_SetPoint8 = 1UL << 8UL , kGPC_SetPoint9 = 1UL << 9UL , kGPC_SetPoint10 = 1UL << 10UL , kGPC_SetPoint11 = 1UL << 11UL , kGPC_SetPoint12 = 1UL << 12UL , kGPC_SetPoint13 = 1UL << 13UL , kGPC_SetPoint14 = 1UL << 14UL , kGPC_SetPoint15 = 1UL << 15UL }

enum	{ kGPC_CM_SoftSPNotAllowedStatusFlag = GPC_CPU_MODE_CTRL_CM_INT_CTRL_SP_REQ_NOT_ALLOWED_SOFT_INT_MASK , kGPC_CM_WaitSPNotAllowedStatusFlag = GPC_CPU_MODE_CTRL_CM_INT_CTRL_SP_REQ_NOT_ALLOWED_WAKEUP_INT_MASK , kGPC_CM_SleepSPNotAllowedStatusFlag = GPC_CPU_MODE_CTRL_CM_INT_CTRL_SP_REQ_NOT_ALLOWED_SLEEP_INT_MASK }
	_gpc_cm_interrupt_status_flag

enum	_gpc_cm_standby_mode_status { kGPC_CM_SleepBusy , kGPC_CM_WakeupBusy }
	CPU standby mode status. More...

enum	_gpc_cm_tran_step { kGPC_CM_SleepSsar = 0UL , kGPC_CM_SleepLpcg = 1UL , kGPC_CM_SleepPll = 2UL , kGPC_CM_SleepIso = 3UL , kGPC_CM_SleepReset = 4UL , kGPC_CM_SleepPower = 5UL , kGPC_CM_SleepSP = 6UL , kGPC_CM_SleepSTBY = 7UL , kGPC_CM_WakeupSTBY = 8UL , kGPC_CM_WakeupSP = 9UL , kGPC_CM_WakeupPower = 10UL , kGPC_CM_WakeupReset = 11UL , kGPC_CM_WakeupIso = 12UL , kGPC_CM_WakeupPll = 13UL , kGPC_CM_WakeupLpcg = 14UL , kGPC_CM_WakeupSsar = 15UL }
	CPU mode transition step in sleep/wakeup sequence. More...

enum	_gpc_tran_step_counter_mode { kGPC_StepCounterDisableMode , kGPC_StepCounterDelayMode , kGPC_StepCounterIgnoreResponseMode = 2UL , kGPC_StepCounterTimeOutMode = 3UL }
	Step counter work mode. More...

enum	_gpc_sp_tran_step { kGPC_SP_SsarSave = 0UL , kGPC_SP_LpcgOff = 1UL , kGPC_SP_GroupDown = 2UL , kGPC_SP_RootDown = 3UL , kGPC_SP_PllOff = 4UL , kGPC_SP_IsoOn = 5UL , kGPC_SP_ResetEarly = 6UL , kGPC_SP_PowerOff = 7UL , kGPC_SP_BiasOff = 8UL , kGPC_SP_BandgapPllLdoOff = 9UL , kGPC_SP_LdoPre = 10UL , kGPC_SP_DcdcDown = 11UL , kGPC_SP_DcdcUp = 12UL , kGPC_SP_LdoPost = 13UL , kGPC_SP_BandgapPllLdoOn = 14UL , kGPC_SP_BiasOn = 15UL , kGPC_SP_PowerOn = 16UL , kGPC_SP_ResetLate = 17UL , kGPC_SP_IsoOff = 18UL , kGPC_SP_PllOn = 19UL , kGPC_SP_RootUp = 20UL , kGPC_SP_GroupUp = 21UL , kGPC_SP_LpcgOn = 22UL , kGPC_SP_SsarRestore = 23UL }
	GPC set point transition steps. More...

enum	_gpc_cpu_mode { kGPC_RunMode = 0x0UL , kGPC_WaitMode = 0x1UL , kGPC_StopMode = 0x2UL , kGPC_SuspendMode = 0x3UL }
	CPU mode. More...

enum	_gpc_cm_wakeup_sp_sel { kGPC_CM_WakeupSetpoint , kGPC_CM_RequestPreviousSetpoint = 1UL }
	CPU wakeup sequence setpoint options. More...

enum	_gpc_stby_tran_step { kGPC_STBY_LpcgIn = 0UL , kGPC_STBY_PllIn = 1UL , kGPC_STBY_BiasIn = 2UL , kGPC_STBY_PldoIn = 3UL , kGPC_STBY_BandgapIn = 4UL , kGPC_STBY_LdoIn = 5UL , kGPC_STBY_DcdcIn = 6UL , kGPC_STBY_PmicIn = 7UL , kGPC_STBY_PmicOut = 8UL , kGPC_STBY_DcdcOut = 9UL , kGPC_STBY_LdoOut = 10UL , kGPC_STBY_BandgapOut = 11UL , kGPC_STBY_PldoOut = 12UL , kGPC_STBY_BiasOut = 13UL , kGPC_STBY_PllOut = 14UL , kGPC_STBY_LpcgOut = 15UL }
	GPC standby mode transition steps. More...

CPU mode control
void	GPC_CM_EnableIrqWakeup (GPC_CPU_MODE_CTRL_Type *base, uint32_t irqId, bool enable)
	Enable IRQ wakeup request.

bool	GPC_CM_GetIrqWakeupStatus (GPC_CPU_MODE_CTRL_Type *base, uint32_t irqId)
	Get the status of the IRQ wakeup request.

void	GPC_CM_ConfigCpuModeTransitionStep (GPC_CPU_MODE_CTRL_Type base, gpc_cm_tran_step_t step, const gpc_tran_step_config_t config)
	Config the cpu mode transition step.

void	GPC_CM_RequestSleepModeSetPointTransition (GPC_CPU_MODE_CTRL_Type *base, uint8_t setPointSleep, uint8_t setPointWakeup, gpc_cm_wakeup_sp_sel_t wakeupSel)
	Request a set point transition before the CPU transfers into a sleep mode.

void	GPC_CM_RequestRunModeSetPointTransition (GPC_CPU_MODE_CTRL_Type *base, uint8_t setPointRun)
	Request a set point transition during run mode.

void	GPC_CM_SetCpuModeSetPointMapping (GPC_CPU_MODE_CTRL_Type *base, gpc_cpu_mode_t mode, uint32_t map)
	Set the set point mapping value for each cpu mode.

void	GPC_CM_RequestStandbyMode (GPC_CPU_MODE_CTRL_Type *base, const gpc_cpu_mode_t mode)
	Request the chip into standby mode.

void	GPC_CM_ClearStandbyModeRequest (GPC_CPU_MODE_CTRL_Type *base, const gpc_cpu_mode_t mode)
	Clear the standby mode request.

void	GPC_CM_ClearInterruptStatusFlags (GPC_CPU_MODE_CTRL_Type *base, uint32_t mask)
	Clears CPU module interrut status flags.

Set point request control
void	GPC_SP_ConfigSetPointTransitionStep (GPC_SET_POINT_CTRL_Type base, gpc_sp_tran_step_t step, const gpc_tran_step_config_t config)
	Config the set point transition step.

Standby mode control
void	GPC_STBY_ConfigStandbyTransitionStep (GPC_STBY_CTRL_Type base, gpc_stby_tran_step_t step, const gpc_tran_step_config_t config)
	Config the standby transition step.

Driver version
void	GPC_EnableIRQ (GPC_Type *base, uint32_t irqId)
	Enable the IRQ.

void	GPC_DisableIRQ (GPC_Type *base, uint32_t irqId)
	Disable the IRQ.

bool	GPC_GetIRQStatusFlag (GPC_Type *base, uint32_t irqId)
	Get the IRQ/Event flag.

#define	FSL_GPC_DRIVER_VERSION (MAKE_VERSION(2, 1, 1))
	GPC driver version 2.1.1.

Driver version
#define	FSL_GPC_RIVER_VERSION (MAKE_VERSION(2, 2, 0))
	GPC driver version 2.2.0.

Detailed Description

Macro Definition Documentation

◆ GPC_CM_ALL_INTERRUPT_STATUS

#define GPC_CM_ALL_INTERRUPT_STATUS

Value:

    (GPC_CPU_MODE_CTRL_CM_INT_CTRL_SP_REQ_NOT_ALLOWED_SLEEP_INT_MASK |  \
     GPC_CPU_MODE_CTRL_CM_INT_CTRL_SP_REQ_NOT_ALLOWED_WAKEUP_INT_MASK | \
     GPC_CPU_MODE_CTRL_CM_INT_CTRL_SP_REQ_NOT_ALLOWED_SOFT_INT_MASK)

◆ GPC_CM_STEP_REG_OFFSET

#define GPC_CM_STEP_REG_OFFSET

Value:

    {                                                                                                        \
        GPC_CM_SLEEP_SSAR_CTRL_OFFSET, GPC_CM_SLEEP_LPCG_CTRL_OFFSET, GPC_CM_SLEEP_PLL_CTRL_OFFSET,          \
            GPC_CM_SLEEP_ISO_CTRL_OFFSET, GPC_CM_SLEEP_RESET_CTRL_OFFSET, GPC_CM_SLEEP_POWER_CTRL_OFFSET,    \
            GPC_RESERVED_USE_MACRO, GPC_RESERVED_USE_MACRO, GPC_RESERVED_USE_MACRO, GPC_RESERVED_USE_MACRO,  \
            GPC_CM_WAKEUP_POWER_CTRL_OFFSET, GPC_CM_WAKEUP_RESET_CTRL_OFFSET, GPC_CM_WAKEUP_ISO_CTRL_OFFSET, \
            GPC_CM_WAKEUP_PLL_CTRL_OFFSET, GPC_CM_WAKEUP_LPCG_CTRL_OFFSET, GPC_CM_WAKEUP_SSAR_CTRL_OFFSET,   \
    }

◆ GPC_SP_STEP_REG_OFFSET

#define GPC_SP_STEP_REG_OFFSET

Value:

    {                                                                                                  \
        GPC_SP_SSAR_SAVE_CTRL_OFFSET, GPC_SP_LPCG_OFF_CTRL_OFFSET, GPC_SP_GROUP_DOWN_CTRL_OFFSET,      \
            GPC_SP_ROOT_DOWN_CTRL_OFFSET, GPC_SP_PLL_OFF_CTRL_OFFSET, GPC_SP_ISO_ON_CTRL_OFFSET,       \
            GPC_SP_RESET_EARLY_CTRL_OFFSET, GPC_SP_POWER_OFF_CTRL_OFFSET, GPC_SP_BIAS_OFF_CTRL_OFFSET, \
            GPC_SP_BG_PLDO_OFF_CTRL_OFFSET, GPC_SP_LDO_PRE_CTRL_OFFSET, GPC_SP_DCDC_DOWN_CTRL_OFFSET,  \
            GPC_SP_DCDC_UP_CTRL_OFFSET, GPC_SP_LDO_POST_CTRL_OFFSET, GPC_SP_BG_PLDO_ON_CTRL_OFFSET,    \
            GPC_SP_BIAS_ON_CTRL_OFFSET, GPC_SP_POWER_ON_CTRL_OFFSET, GPC_SP_RESET_LATE_CTRL_OFFSET,    \
            GPC_SP_ISO_OFF_CTRL_OFFSET, GPC_SP_PLL_ON_CTRL_OFFSET, GPC_SP_ROOT_UP_CTRL_OFFSET,         \
            GPC_SP_GROUP_UP_CTRL_OFFSET, GPC_SP_LPCG_ON_CTRL_OFFSET, GPC_SP_SSAR_RESTORE_CTRL_OFFSET,  \
    }

◆ GPC_STBY_STEP_REG_OFFSET

#define GPC_STBY_STEP_REG_OFFSET

Value:

    {                                                                                                      \
        GPC_STBY_LPCG_IN_CTRL_OFFSET, GPC_STBY_PLL_IN_CTRL_OFFSET, GPC_STBY_BIAS_IN_CTRL_OFFSET,           \
            GPC_STBY_PLDO_IN_CTRL_OFFSET, GPC_STBY_BANDGAP_IN_CTRL_OFFSET, GPC_STBY_LDO_IN_CTRL_OFFSET,    \
            GPC_STBY_DCDC_IN_CTRL_OFFSET, GPC_STBY_PMIC_IN_CTRL_OFFSET, GPC_STBY_PMIC_OUT_CTRL_OFFSET,     \
            GPC_STBY_DCDC_OUT_CTRL_OFFSET, GPC_STBY_LDO_OUT_CTRL_OFFSET, GPC_STBY_BANDGAP_OUT_CTRL_OFFSET, \
            GPC_STBY_PLDO_OUT_CTRL_OFFSET, GPC_STBY_BIAS_OUT_CTRL_OFFSET, GPC_STBY_PLL_OUT_CTRL_OFFSET,    \
            GPC_STBY_LPCG_OUT_CTRL_OFFSET,                                                                 \
    }

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

_gpc_cm_non_irq_wakeup_request GPC Non-IRQ wakeup request.

Enumerator
kGPC_CM_EventWakeupRequest	Event wakeup request.
kGPC_CM_DebugWakeupRequest	Debug wakeup request.

◆ anonymous enum

anonymous enum

Enumerator
kGPC_SetPoint0	GPC set point 0.
kGPC_SetPoint1	GPC set point 1.
kGPC_SetPoint2	GPC set point 2.
kGPC_SetPoint3	GPC set point 3.
kGPC_SetPoint4	GPC set point 4.
kGPC_SetPoint5	GPC set point 5.
kGPC_SetPoint6	GPC set point 6.
kGPC_SetPoint7	GPC set point 7.
kGPC_SetPoint8	GPC set point 8.
kGPC_SetPoint9	GPC set point 9.
kGPC_SetPoint10	GPC set point 10.
kGPC_SetPoint11	GPC set point 11.
kGPC_SetPoint12	GPC set point 12.
kGPC_SetPoint13	GPC set point 13.
kGPC_SetPoint14	GPC set point 14.
kGPC_SetPoint15	GPC set point 15.

◆ _gpc_cm_standby_mode_status

enum _gpc_cm_standby_mode_status

CPU standby mode status.

Enumerator
kGPC_CM_SleepBusy	Indicate the CPU is busy entering standby mode.
kGPC_CM_WakeupBusy	Indicate the CPU is busy exiting standby mode.

◆ _gpc_cm_tran_step

enum _gpc_cm_tran_step

CPU mode transition step in sleep/wakeup sequence.

Enumerator
kGPC_CM_SleepSsar	SSAR (State Save And Restore) sleep step.
kGPC_CM_SleepLpcg	LPCG (Low Power Clock Gating) sleep step.
kGPC_CM_SleepPll	PLL sleep step.
kGPC_CM_SleepIso	ISO (Isolation) sleep step.
kGPC_CM_SleepReset	Reset sleep step.
kGPC_CM_SleepPower	Power sleep step.
kGPC_CM_SleepSP	Setpoint sleep step. Note that this step is controlled by setpoint controller.
kGPC_CM_SleepSTBY	Standby sleep step. Note that this step is controlled by standby controller.
kGPC_CM_WakeupSTBY	Standby wakeup step. Note that this step is controlled by standby controller.
kGPC_CM_WakeupSP	Setpoint wakeup step. Note that this step is controlled by setpoint countroller.
kGPC_CM_WakeupPower	Power wakeup step.
kGPC_CM_WakeupReset	Reset wakeup step.
kGPC_CM_WakeupIso	ISO wakeup step.
kGPC_CM_WakeupPll	PLL wakeup step.
kGPC_CM_WakeupLpcg	LPCG wakeup step.
kGPC_CM_WakeupSsar	SSAR wakeup step.

◆ _gpc_cm_wakeup_sp_sel

enum _gpc_cm_wakeup_sp_sel

CPU wakeup sequence setpoint options.

Enumerator
kGPC_CM_WakeupSetpoint	Request SP transition to CPU_SP_WAKEUP (param "setPointWakeup" in gpc_cm_sleep_sp_tran_config_t).
kGPC_CM_RequestPreviousSetpoint	Request SP transition to the set point when the sleep event happens.

◆ _gpc_cpu_mode

enum _gpc_cpu_mode

CPU mode.

Enumerator
kGPC_RunMode	Stay in RUN mode.
kGPC_WaitMode	Transit to WAIT mode.
kGPC_StopMode	Transit to STOP mode.
kGPC_SuspendMode	Transit to SUSPEND mode.

◆ _gpc_sp_tran_step

enum _gpc_sp_tran_step

GPC set point transition steps.

Enumerator
kGPC_SP_SsarSave	SSAR save step.
kGPC_SP_LpcgOff	LPCG off step.
kGPC_SP_GroupDown	Group down step.
kGPC_SP_RootDown	Root down step.
kGPC_SP_PllOff	PLL off step.
kGPC_SP_IsoOn	ISO on.
kGPC_SP_ResetEarly	Reset early step.
kGPC_SP_PowerOff	Power off step.
kGPC_SP_BiasOff	Bias off step.
kGPC_SP_BandgapPllLdoOff	Bandgap and PLL_LDO off step.
kGPC_SP_LdoPre	LDO (Low-Dropout) pre step.
kGPC_SP_DcdcDown	DCDC down step.
kGPC_SP_DcdcUp	DCDC up step.
kGPC_SP_LdoPost	LDO post step.
kGPC_SP_BandgapPllLdoOn	Bandgap and PLL_LDO on step.
kGPC_SP_BiasOn	Bias on step.
kGPC_SP_PowerOn	Power on step.
kGPC_SP_ResetLate	Reset late step.
kGPC_SP_IsoOff	ISO off step.
kGPC_SP_PllOn	PLL on step
kGPC_SP_RootUp	Root up step.
kGPC_SP_GroupUp	Group up step.
kGPC_SP_LpcgOn	LPCG on step.
kGPC_SP_SsarRestore	SSAR restore step.

◆ _gpc_stby_tran_step

enum _gpc_stby_tran_step

GPC standby mode transition steps.

Enumerator
kGPC_STBY_LpcgIn	LPCG in step.
kGPC_STBY_PllIn	PLL in step.
kGPC_STBY_BiasIn	Bias in step.
kGPC_STBY_PldoIn	PLDO in step.
kGPC_STBY_BandgapIn	Bandgap in step.
kGPC_STBY_LdoIn	LDO in step.
kGPC_STBY_DcdcIn	DCDC in step.
kGPC_STBY_PmicIn	PMIC in step.
kGPC_STBY_PmicOut	PMIC out step.
kGPC_STBY_DcdcOut	DCDC out step.
kGPC_STBY_LdoOut	LDO out step.
kGPC_STBY_BandgapOut	Bandgap out step.
kGPC_STBY_PldoOut	PLDO out step.
kGPC_STBY_BiasOut	Bias out step.
kGPC_STBY_PllOut	PLL out step.
kGPC_STBY_LpcgOut	LPCG out step.

◆ _gpc_tran_step_counter_mode

enum _gpc_tran_step_counter_mode

Step counter work mode.

Enumerator
kGPC_StepCounterDisableMode	Counter disable mode: not use step counter, step completes once receiving step_done.
kGPC_StepCounterDelayMode	Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT
kGPC_StepCounterIgnoreResponseMode	Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes.
kGPC_StepCounterTimeOutMode	Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value.

Function Documentation

◆ GPC_CM_ClearInterruptStatusFlags()

void GPC_CM_ClearInterruptStatusFlags	(	GPC_CPU_MODE_CTRL_Type *	base,
		uint32_t	mask
	)

Clears CPU module interrut status flags.

Parameters

base	GPC CPU module base address.
mask	The interrupt status flags to be cleared. Should be the OR'ed value of _gpc_cm_interrupt_status_flag.

brief Clears CPU module interrut status flags.

param base GPC CPU module base address. param mask The interrupt status flags to be cleared. Should be the OR'ed value of _gpc_cm_interrupt_status_flag.

◆ GPC_CM_ClearStandbyModeRequest()

void GPC_CM_ClearStandbyModeRequest	(	GPC_CPU_MODE_CTRL_Type *	base,
		const gpc_cpu_mode_t	mode
	)

Clear the standby mode request.

Parameters

base	GPC CPU module base address.
mode	CPU mode. Refer to "gpc_cpu_mode_t".

◆ GPC_CM_ConfigCpuModeTransitionStep()

void GPC_CM_ConfigCpuModeTransitionStep	(	GPC_CPU_MODE_CTRL_Type *	base,
		gpc_cm_tran_step_t	step,
		const gpc_tran_step_config_t *	config
	)

Config the cpu mode transition step.

Note: This function can not config the setpoint sleep/wakeup operation for those operation is controlled by setpoint control. This funcion can not config the standby sleep/wakeup too, because those operation is controlled by standby controlled.

Parameters

base	GPC CPU module base address.
step	step type, refer to "gpc_cm_tran_step_t".
config	transition step configuration, refer to "gpc_tran_step_config_t".

brief Config the cpu mode transition step.

note This function can not config the setpoint sleep/wakeup operation for those operation is controlled by setpoint control. This funcion can not config the standby sleep/wakeup too, because those operation is controlled by standby controlled.

param base GPC CPU module base address. param step step type, refer to "gpc_cm_tran_step_t". param config transition step configuration, refer to "gpc_tran_step_config_t".

◆ GPC_CM_EnableIrqWakeup()

void GPC_CM_EnableIrqWakeup	(	GPC_CPU_MODE_CTRL_Type *	base,
		uint32_t	irqId,
		bool	enable
	)

Enable IRQ wakeup request.

This function enables the IRQ request which can wakeup the CPU platform.

Parameters

base	GPC CPU module base address.
irqId	ID of the IRQ, accessible range is 0-255.
enable	Enable the IRQ request or not.

brief Enable IRQ wakeup request.

This function enables the IRQ request which can wakeup the CPU platform.

param base GPC CPU module base address. param irqId ID of the IRQ, accessible range is 0-255. param enable Enable the IRQ request or not.

◆ GPC_CM_GetIrqWakeupStatus()

bool GPC_CM_GetIrqWakeupStatus	(	GPC_CPU_MODE_CTRL_Type *	base,
		uint32_t	irqId
	)

Get the status of the IRQ wakeup request.

Parameters

base	GPC CPU module base address.
irqId	ID of the IRQ, accessible range is 0-255.

Returns: Indicate the IRQ request is asserted or not.

brief Get the status of the IRQ wakeup request.

param base GPC CPU module base address. param irqId ID of the IRQ, accessible range is 0-255. return Indicate the IRQ request is asserted or not.

◆ GPC_CM_RequestRunModeSetPointTransition()

void GPC_CM_RequestRunModeSetPointTransition	(	GPC_CPU_MODE_CTRL_Type *	base,
		uint8_t	setPointRun
	)

Request a set point transition during run mode.

This function triggers the set point transition and selects which one the CMC want to transfer to.

Parameters

base	GPC CPU module base address.
setPointRun	The set point CPU want the system to transit in the run mode.

brief Request a set point transition during run mode.

This function triggers the set point transition and selects which one the CMC want to transfer to.

param base GPC CPU module base address. param setPointRun The set point CPU want the system to transit in the run mode.

◆ GPC_CM_RequestSleepModeSetPointTransition()

void GPC_CM_RequestSleepModeSetPointTransition	(	GPC_CPU_MODE_CTRL_Type *	base,
		uint8_t	setPointSleep,
		uint8_t	setPointWakeup,
		gpc_cm_wakeup_sp_sel_t	wakeupSel
	)

Request a set point transition before the CPU transfers into a sleep mode.

This function triggers the set point transition during a CPU Sleep/wakeup event and selects which one the CMC want to transfer to.

Parameters

base	GPC CPU module base address.
setPointSleep	The set point CPU want the system to transit to on next CPU platform sleep sequence.
setPointWakeup	The set point CPU want the system to transit to on next CPU platform wakeup sequence.
wakeupSel	Select the set point transition on the next CPU platform wakeup sequence.

brief Request a set point transition before the CPU transfers into a sleep mode.

This function triggers the set point transition during a CPU Sleep/wakeup event and selects which one the CMC want to transfer to.

param base GPC CPU module base address. param setPointSleep The set point CPU want the system to transit to on next CPU platform sleep sequence. param setPointWakeup The set point CPU want the system to transit to on next CPU platform wakeup sequence. param wakeupSel Select the set point transition on the next CPU platform wakeup sequence.

◆ GPC_CM_RequestStandbyMode()

void GPC_CM_RequestStandbyMode	(	GPC_CPU_MODE_CTRL_Type *	base,
		const gpc_cpu_mode_t	mode
	)

Request the chip into standby mode.

Parameters

base	GPC CPU module base address.
mode	CPU mode. Refer to "gpc_cpu_mode_t".

◆ GPC_CM_SetCpuModeSetPointMapping()

void GPC_CM_SetCpuModeSetPointMapping	(	GPC_CPU_MODE_CTRL_Type *	base,
		gpc_cpu_mode_t	mode,
		uint32_t	map
	)

Set the set point mapping value for each cpu mode.

This function configures which set point is allowed when CPU enters RUN/WAIT/STOP/SUSPEND. If there are multiple setpoints, use:

map = kkGPC_SetPoint0 | kGPC_SetPoint1 | ... | kGPC_SetPoint15;

kGPC_SetPoint15

@ kGPC_SetPoint15

Definition: fsl_gpc.h:159

kGPC_SetPoint1

@ kGPC_SetPoint1

Definition: fsl_gpc.h:145

_map

Definition: mm.c:60

Parameters

base	GPC CPU module base address.
mode	CPU mode. Refer to "gpc_cpu_mode_t".
map	Map value of the set point. Refer to "_gpc_setpoint_map".

◆ GPC_DisableIRQ()

void GPC_DisableIRQ	(	GPC_Type *	base,
		uint32_t	irqId
	)

Disable the IRQ.

Parameters

base	GPC peripheral base address.
irqId	ID number of IRQ to be disabled, available range is 32-159. 0-31 is available in some platforms.

brief Disable the IRQ.

param base GPC peripheral base address. param irqId ID number of IRQ to be disabled, available range is 32-159. 0-31 is available in some platforms.

◆ GPC_EnableIRQ()

void GPC_EnableIRQ	(	GPC_Type *	base,
		uint32_t	irqId
	)

Enable the IRQ.

Parameters

base	GPC peripheral base address.
irqId	ID number of IRQ to be enabled, available range is 32-159. 0-31 is available in some platforms.

brief Enable the IRQ.

param base GPC peripheral base address. param irqId ID number of IRQ to be enabled, available range is 32-159. 0-31 is available in some platforms.

◆ GPC_GetIRQStatusFlag()

bool GPC_GetIRQStatusFlag	(	GPC_Type *	base,
		uint32_t	irqId
	)

Get the IRQ/Event flag.

Parameters

base	GPC peripheral base address.
irqId	ID number of IRQ to be enabled, available range is 32-159. 0-31 is available in some platforms.

Returns: Indicated IRQ/Event is asserted or not.

brief Get the IRQ/Event flag.

param base GPC peripheral base address. param irqId ID number of IRQ to be enabled, available range is 32-159. 0-31 is available in some platforms. return Indicated IRQ/Event is asserted or not.

◆ GPC_SP_ConfigSetPointTransitionStep()

void GPC_SP_ConfigSetPointTransitionStep	(	GPC_SET_POINT_CTRL_Type *	base,
		gpc_sp_tran_step_t	step,
		const gpc_tran_step_config_t *	config
	)

Config the set point transition step.

Parameters

base	GPC Setpoint controller base address.
step	step type, refer to "gpc_sp_tran_step_t".
config	transition step configuration, refer to "gpc_tran_step_config_t".

brief Config the set point transition step.

param base GPC Setpoint controller base address. param step step type, refer to "gpc_sp_tran_step_t". param config transition step configuration, refer to "gpc_tran_step_config_t".

◆ GPC_STBY_ConfigStandbyTransitionStep()

void GPC_STBY_ConfigStandbyTransitionStep	(	GPC_STBY_CTRL_Type *	base,
		gpc_stby_tran_step_t	step,
		const gpc_tran_step_config_t *	config
	)

Config the standby transition step.

Parameters

base	GPC Setpoint controller base address.
step	step type, refer to "gpc_stby_tran_step_t".
config	transition step configuration, refer to "gpc_tran_step_config_t".

brief Config the standby transition step.

param base GPC Setpoint controller base address. param step step type, refer to "gpc_stby_tran_step_t". param config transition step configuration, refer to "gpc_tran_step_config_t".

Data Structures

Macros

Typedefs

Enumerations

CPU mode control

Set point request control

Standby mode control

Driver version

Driver version

Detailed Description

Macro Definition Documentation

◆ GPC_CM_ALL_INTERRUPT_STATUS

◆ GPC_CM_STEP_REG_OFFSET

◆ GPC_SP_STEP_REG_OFFSET

◆ GPC_STBY_STEP_REG_OFFSET

Enumeration Type Documentation

◆ anonymous enum

◆ anonymous enum

◆ _gpc_cm_standby_mode_status

◆ _gpc_cm_tran_step

◆ _gpc_cm_wakeup_sp_sel

◆ _gpc_cpu_mode

◆ _gpc_sp_tran_step

◆ _gpc_stby_tran_step

◆ _gpc_tran_step_counter_mode

Function Documentation

◆ GPC_CM_ClearInterruptStatusFlags()

◆ GPC_CM_ClearStandbyModeRequest()

◆ GPC_CM_ConfigCpuModeTransitionStep()

◆ GPC_CM_EnableIrqWakeup()

◆ GPC_CM_GetIrqWakeupStatus()

◆ GPC_CM_RequestRunModeSetPointTransition()

◆ GPC_CM_RequestSleepModeSetPointTransition()

◆ GPC_CM_RequestStandbyMode()

◆ GPC_CM_SetCpuModeSetPointMapping()

◆ GPC_DisableIRQ()

◆ GPC_EnableIRQ()

◆ GPC_GetIRQStatusFlag()

◆ GPC_SP_ConfigSetPointTransitionStep()

◆ GPC_STBY_ConfigStandbyTransitionStep()