RTEMS 6.1-rc5
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Macros
Interrupt map register n (IRQMAP)

This group contains register bit definitions. More...

Macros

#define IRQAMP_IRQMAP_IRQMAP_4_N_0_SHIFT   24
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_0_MASK   0xff000000U
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_0_GET(_reg)
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_0_SET(_reg, _val)
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_0(_val)
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_1_SHIFT   16
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_1_MASK   0xff0000U
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_1_GET(_reg)
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_1_SET(_reg, _val)
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_1(_val)
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_2_SHIFT   8
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_2_MASK   0xff00U
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_2_GET(_reg)
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_2_SET(_reg, _val)
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_2(_val)
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_3_SHIFT   0
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_3_MASK   0xffU
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_3_GET(_reg)
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_3_SET(_reg, _val)
 
#define IRQAMP_IRQMAP_IRQMAP_4_N_3(_val)
 

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

◆ IRQAMP_IRQMAP_IRQMAP_4_N_0

#define IRQAMP_IRQMAP_IRQMAP_4_N_0 (   _val)
Value:
( ( ( _val ) << IRQAMP_IRQMAP_IRQMAP_4_N_0_SHIFT ) & \
IRQAMP_IRQMAP_IRQMAP_4_N_0_MASK )

◆ IRQAMP_IRQMAP_IRQMAP_4_N_0_GET

#define IRQAMP_IRQMAP_IRQMAP_4_N_0_GET (   _reg)
Value:
( ( ( _reg ) & IRQAMP_IRQMAP_IRQMAP_4_N_0_MASK ) >> \
IRQAMP_IRQMAP_IRQMAP_4_N_0_SHIFT )

◆ IRQAMP_IRQMAP_IRQMAP_4_N_0_SET

#define IRQAMP_IRQMAP_IRQMAP_4_N_0_SET (   _reg,
  _val 
)
Value:
( ( ( _reg ) & ~IRQAMP_IRQMAP_IRQMAP_4_N_0_MASK ) | \
( ( ( _val ) << IRQAMP_IRQMAP_IRQMAP_4_N_0_SHIFT ) & \
IRQAMP_IRQMAP_IRQMAP_4_N_0_MASK ) )

◆ IRQAMP_IRQMAP_IRQMAP_4_N_1

#define IRQAMP_IRQMAP_IRQMAP_4_N_1 (   _val)
Value:
( ( ( _val ) << IRQAMP_IRQMAP_IRQMAP_4_N_1_SHIFT ) & \
IRQAMP_IRQMAP_IRQMAP_4_N_1_MASK )

◆ IRQAMP_IRQMAP_IRQMAP_4_N_1_GET

#define IRQAMP_IRQMAP_IRQMAP_4_N_1_GET (   _reg)
Value:
( ( ( _reg ) & IRQAMP_IRQMAP_IRQMAP_4_N_1_MASK ) >> \
IRQAMP_IRQMAP_IRQMAP_4_N_1_SHIFT )

◆ IRQAMP_IRQMAP_IRQMAP_4_N_1_SET

#define IRQAMP_IRQMAP_IRQMAP_4_N_1_SET (   _reg,
  _val 
)
Value:
( ( ( _reg ) & ~IRQAMP_IRQMAP_IRQMAP_4_N_1_MASK ) | \
( ( ( _val ) << IRQAMP_IRQMAP_IRQMAP_4_N_1_SHIFT ) & \
IRQAMP_IRQMAP_IRQMAP_4_N_1_MASK ) )

◆ IRQAMP_IRQMAP_IRQMAP_4_N_2

#define IRQAMP_IRQMAP_IRQMAP_4_N_2 (   _val)
Value:
( ( ( _val ) << IRQAMP_IRQMAP_IRQMAP_4_N_2_SHIFT ) & \
IRQAMP_IRQMAP_IRQMAP_4_N_2_MASK )

◆ IRQAMP_IRQMAP_IRQMAP_4_N_2_GET

#define IRQAMP_IRQMAP_IRQMAP_4_N_2_GET (   _reg)
Value:
( ( ( _reg ) & IRQAMP_IRQMAP_IRQMAP_4_N_2_MASK ) >> \
IRQAMP_IRQMAP_IRQMAP_4_N_2_SHIFT )

◆ IRQAMP_IRQMAP_IRQMAP_4_N_2_SET

#define IRQAMP_IRQMAP_IRQMAP_4_N_2_SET (   _reg,
  _val 
)
Value:
( ( ( _reg ) & ~IRQAMP_IRQMAP_IRQMAP_4_N_2_MASK ) | \
( ( ( _val ) << IRQAMP_IRQMAP_IRQMAP_4_N_2_SHIFT ) & \
IRQAMP_IRQMAP_IRQMAP_4_N_2_MASK ) )

◆ IRQAMP_IRQMAP_IRQMAP_4_N_3

#define IRQAMP_IRQMAP_IRQMAP_4_N_3 (   _val)
Value:
( ( ( _val ) << IRQAMP_IRQMAP_IRQMAP_4_N_3_SHIFT ) & \
IRQAMP_IRQMAP_IRQMAP_4_N_3_MASK )

◆ IRQAMP_IRQMAP_IRQMAP_4_N_3_GET

#define IRQAMP_IRQMAP_IRQMAP_4_N_3_GET (   _reg)
Value:
( ( ( _reg ) & IRQAMP_IRQMAP_IRQMAP_4_N_3_MASK ) >> \
IRQAMP_IRQMAP_IRQMAP_4_N_3_SHIFT )

◆ IRQAMP_IRQMAP_IRQMAP_4_N_3_SET

#define IRQAMP_IRQMAP_IRQMAP_4_N_3_SET (   _reg,
  _val 
)
Value:
( ( ( _reg ) & ~IRQAMP_IRQMAP_IRQMAP_4_N_3_MASK ) | \
( ( ( _val ) << IRQAMP_IRQMAP_IRQMAP_4_N_3_SHIFT ) & \
IRQAMP_IRQMAP_IRQMAP_4_N_3_MASK ) )