Control register (CTRL)

This group contains register bit definitions. More...

Macros
#define	GR740_THSENS_CTRL_DIV_SHIFT   16
#define	GR740_THSENS_CTRL_DIV_MASK   0x3ff0000U
#define	GR740_THSENS_CTRL_DIV_GET(_reg)
#define	GR740_THSENS_CTRL_DIV_SET(_reg, _val)
#define	GR740_THSENS_CTRL_DIV(_val)
#define	GR740_THSENS_CTRL_ALEN   0x100U
#define	GR740_THSENS_CTRL_PDN   0x80U
#define	GR740_THSENS_CTRL_DCORRECT_SHIFT   2
#define	GR740_THSENS_CTRL_DCORRECT_MASK   0x7cU
#define	GR740_THSENS_CTRL_DCORRECT_GET(_reg)
#define	GR740_THSENS_CTRL_DCORRECT_SET(_reg, _val)
#define	GR740_THSENS_CTRL_DCORRECT(_val)
#define	GR740_THSENS_CTRL_SRSTN   0x2U
#define	GR740_THSENS_CTRL_CLKEN   0x1U

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

GR740_THSENS_CTRL_DCORRECT

#define GR740_THSENS_CTRL_DCORRECT

(

_val

)

Value:

  ( ( ( _val ) << GR740_THSENS_CTRL_DCORRECT_SHIFT ) & \
    GR740_THSENS_CTRL_DCORRECT_MASK )

GR740_THSENS_CTRL_DCORRECT_GET

#define GR740_THSENS_CTRL_DCORRECT_GET

(

_reg

)

Value:

  ( ( ( _reg ) & GR740_THSENS_CTRL_DCORRECT_MASK ) >> \
    GR740_THSENS_CTRL_DCORRECT_SHIFT )

GR740_THSENS_CTRL_DCORRECT_SET

#define GR740_THSENS_CTRL_DCORRECT_SET	(		_reg,
			_val
	)

Value:

  ( ( ( _reg ) & ~GR740_THSENS_CTRL_DCORRECT_MASK ) | \
    ( ( ( _val ) << GR740_THSENS_CTRL_DCORRECT_SHIFT ) & \
      GR740_THSENS_CTRL_DCORRECT_MASK ) )

GR740_THSENS_CTRL_DIV

#define GR740_THSENS_CTRL_DIV

(

_val

)

Value:

  ( ( ( _val ) << GR740_THSENS_CTRL_DIV_SHIFT ) & \
    GR740_THSENS_CTRL_DIV_MASK )

GR740_THSENS_CTRL_DIV_GET

#define GR740_THSENS_CTRL_DIV_GET

(

_reg

)

Value:

  ( ( ( _reg ) & GR740_THSENS_CTRL_DIV_MASK ) >> \
    GR740_THSENS_CTRL_DIV_SHIFT )

GR740_THSENS_CTRL_DIV_SET

#define GR740_THSENS_CTRL_DIV_SET	(		_reg,
			_val
	)

Value:

  ( ( ( _reg ) & ~GR740_THSENS_CTRL_DIV_MASK ) | \
    ( ( ( _val ) << GR740_THSENS_CTRL_DIV_SHIFT ) & \
      GR740_THSENS_CTRL_DIV_MASK ) )