LPSPI Peripheral Access Layer

Modules
	LPSPI Register Masks

Data Structures
struct	LPSPI_Type

Macros
#define	LPSPI1_BASE   (0x40394000u)
#define	LPSPI1   ((LPSPI_Type *)LPSPI1_BASE)
#define	LPSPI2_BASE   (0x40398000u)
#define	LPSPI2   ((LPSPI_Type *)LPSPI2_BASE)
#define	LPSPI3_BASE   (0x4039C000u)
#define	LPSPI3   ((LPSPI_Type *)LPSPI3_BASE)
#define	LPSPI4_BASE   (0x403A0000u)
#define	LPSPI4   ((LPSPI_Type *)LPSPI4_BASE)
#define	LPSPI_BASE_ADDRS   { 0u, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BASE, LPSPI4_BASE }
#define	LPSPI_BASE_PTRS   { (LPSPI_Type *)0u, LPSPI1, LPSPI2, LPSPI3, LPSPI4 }
#define	LPSPI_IRQS   { NotAvail_IRQn, LPSPI1_IRQn, LPSPI2_IRQn, LPSPI3_IRQn, LPSPI4_IRQn }
#define	LPSPI1_BASE   (0x40114000u)
#define	LPSPI1   ((LPSPI_Type *)LPSPI1_BASE)
#define	LPSPI2_BASE   (0x40118000u)
#define	LPSPI2   ((LPSPI_Type *)LPSPI2_BASE)
#define	LPSPI3_BASE   (0x4011C000u)
#define	LPSPI3   ((LPSPI_Type *)LPSPI3_BASE)
#define	LPSPI4_BASE   (0x40120000u)
#define	LPSPI4   ((LPSPI_Type *)LPSPI4_BASE)
#define	LPSPI5_BASE   (0x40C2C000u)
#define	LPSPI5   ((LPSPI_Type *)LPSPI5_BASE)
#define	LPSPI6_BASE   (0x40C30000u)
#define	LPSPI6   ((LPSPI_Type *)LPSPI6_BASE)
#define	LPSPI_BASE_ADDRS   { 0u, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BASE, LPSPI4_BASE, LPSPI5_BASE, LPSPI6_BASE }
#define	LPSPI_BASE_PTRS   { (LPSPI_Type *)0u, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPSPI5, LPSPI6 }
#define	LPSPI_IRQS   { NotAvail_IRQn, LPSPI1_IRQn, LPSPI2_IRQn, LPSPI3_IRQn, LPSPI4_IRQn, LPSPI5_IRQn, LPSPI6_IRQn }
#define	LPSPI1_BASE   (0x40114000u)
#define	LPSPI1   ((LPSPI_Type *)LPSPI1_BASE)
#define	LPSPI2_BASE   (0x40118000u)
#define	LPSPI2   ((LPSPI_Type *)LPSPI2_BASE)
#define	LPSPI3_BASE   (0x4011C000u)
#define	LPSPI3   ((LPSPI_Type *)LPSPI3_BASE)
#define	LPSPI4_BASE   (0x40120000u)
#define	LPSPI4   ((LPSPI_Type *)LPSPI4_BASE)
#define	LPSPI5_BASE   (0x40C2C000u)
#define	LPSPI5   ((LPSPI_Type *)LPSPI5_BASE)
#define	LPSPI6_BASE   (0x40C30000u)
#define	LPSPI6   ((LPSPI_Type *)LPSPI6_BASE)
#define	LPSPI_BASE_ADDRS   { 0u, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BASE, LPSPI4_BASE, LPSPI5_BASE, LPSPI6_BASE }
#define	LPSPI_BASE_PTRS   { (LPSPI_Type *)0u, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPSPI5, LPSPI6 }
#define	LPSPI_IRQS   { NotAvail_IRQn, LPSPI1_IRQn, LPSPI2_IRQn, LPSPI3_IRQn, LPSPI4_IRQn, LPSPI5_IRQn, LPSPI6_IRQn }

Detailed Description

Macro Definition Documentation

LPSPI1 [1/3]

#define LPSPI1   ((LPSPI_Type *)LPSPI1_BASE)

Peripheral LPSPI1 base pointer

LPSPI1 [2/3]

#define LPSPI1   ((LPSPI_Type *)LPSPI1_BASE)

Peripheral LPSPI1 base pointer

LPSPI1 [3/3]

#define LPSPI1   ((LPSPI_Type *)LPSPI1_BASE)

Peripheral LPSPI1 base pointer

LPSPI1_BASE [1/3]

#define LPSPI1_BASE   (0x40394000u)

Peripheral LPSPI1 base address

LPSPI1_BASE [2/3]

#define LPSPI1_BASE   (0x40114000u)

Peripheral LPSPI1 base address

LPSPI1_BASE [3/3]

#define LPSPI1_BASE   (0x40114000u)

Peripheral LPSPI1 base address

LPSPI2 [1/3]

#define LPSPI2   ((LPSPI_Type *)LPSPI2_BASE)

Peripheral LPSPI2 base pointer

LPSPI2 [2/3]

#define LPSPI2   ((LPSPI_Type *)LPSPI2_BASE)

Peripheral LPSPI2 base pointer

LPSPI2 [3/3]

#define LPSPI2   ((LPSPI_Type *)LPSPI2_BASE)

Peripheral LPSPI2 base pointer

LPSPI2_BASE [1/3]

#define LPSPI2_BASE   (0x40398000u)

Peripheral LPSPI2 base address

LPSPI2_BASE [2/3]

#define LPSPI2_BASE   (0x40118000u)

Peripheral LPSPI2 base address

LPSPI2_BASE [3/3]

#define LPSPI2_BASE   (0x40118000u)

Peripheral LPSPI2 base address

LPSPI3 [1/3]

#define LPSPI3   ((LPSPI_Type *)LPSPI3_BASE)

Peripheral LPSPI3 base pointer

LPSPI3 [2/3]

#define LPSPI3   ((LPSPI_Type *)LPSPI3_BASE)

Peripheral LPSPI3 base pointer

LPSPI3 [3/3]

#define LPSPI3   ((LPSPI_Type *)LPSPI3_BASE)

Peripheral LPSPI3 base pointer

LPSPI3_BASE [1/3]

#define LPSPI3_BASE   (0x4039C000u)

Peripheral LPSPI3 base address

LPSPI3_BASE [2/3]

#define LPSPI3_BASE   (0x4011C000u)

Peripheral LPSPI3 base address

LPSPI3_BASE [3/3]

#define LPSPI3_BASE   (0x4011C000u)

Peripheral LPSPI3 base address

LPSPI4 [1/3]

#define LPSPI4   ((LPSPI_Type *)LPSPI4_BASE)

Peripheral LPSPI4 base pointer

LPSPI4 [2/3]

#define LPSPI4   ((LPSPI_Type *)LPSPI4_BASE)

Peripheral LPSPI4 base pointer

LPSPI4 [3/3]

#define LPSPI4   ((LPSPI_Type *)LPSPI4_BASE)

Peripheral LPSPI4 base pointer

LPSPI4_BASE [1/3]

#define LPSPI4_BASE   (0x403A0000u)

Peripheral LPSPI4 base address

LPSPI4_BASE [2/3]

#define LPSPI4_BASE   (0x40120000u)

Peripheral LPSPI4 base address

LPSPI4_BASE [3/3]

#define LPSPI4_BASE   (0x40120000u)

Peripheral LPSPI4 base address

LPSPI5 [1/2]

#define LPSPI5   ((LPSPI_Type *)LPSPI5_BASE)

Peripheral LPSPI5 base pointer

LPSPI5 [2/2]

#define LPSPI5   ((LPSPI_Type *)LPSPI5_BASE)

Peripheral LPSPI5 base pointer

LPSPI5_BASE [1/2]

#define LPSPI5_BASE   (0x40C2C000u)

Peripheral LPSPI5 base address

LPSPI5_BASE [2/2]

#define LPSPI5_BASE   (0x40C2C000u)

Peripheral LPSPI5 base address

LPSPI6 [1/2]

#define LPSPI6   ((LPSPI_Type *)LPSPI6_BASE)

Peripheral LPSPI6 base pointer

LPSPI6 [2/2]

#define LPSPI6   ((LPSPI_Type *)LPSPI6_BASE)

Peripheral LPSPI6 base pointer

LPSPI6_BASE [1/2]

#define LPSPI6_BASE   (0x40C30000u)

Peripheral LPSPI6 base address

LPSPI6_BASE [2/2]

#define LPSPI6_BASE   (0x40C30000u)

Peripheral LPSPI6 base address

LPSPI_BASE_ADDRS [1/3]

#define LPSPI_BASE_ADDRS   { 0u, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BASE, LPSPI4_BASE }

Array initializer of LPSPI peripheral base addresses

LPSPI_BASE_ADDRS [2/3]

#define LPSPI_BASE_ADDRS   { 0u, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BASE, LPSPI4_BASE, LPSPI5_BASE, LPSPI6_BASE }

Array initializer of LPSPI peripheral base addresses

LPSPI_BASE_ADDRS [3/3]

#define LPSPI_BASE_ADDRS   { 0u, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BASE, LPSPI4_BASE, LPSPI5_BASE, LPSPI6_BASE }

Array initializer of LPSPI peripheral base addresses

LPSPI_BASE_PTRS [1/3]

#define LPSPI_BASE_PTRS   { (LPSPI_Type *)0u, LPSPI1, LPSPI2, LPSPI3, LPSPI4 }

Array initializer of LPSPI peripheral base pointers

LPSPI_BASE_PTRS [2/3]

#define LPSPI_BASE_PTRS   { (LPSPI_Type *)0u, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPSPI5, LPSPI6 }

Array initializer of LPSPI peripheral base pointers

LPSPI_BASE_PTRS [3/3]

#define LPSPI_BASE_PTRS   { (LPSPI_Type *)0u, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPSPI5, LPSPI6 }

Array initializer of LPSPI peripheral base pointers

LPSPI_IRQS [1/3]

#define LPSPI_IRQS   { NotAvail_IRQn, LPSPI1_IRQn, LPSPI2_IRQn, LPSPI3_IRQn, LPSPI4_IRQn }

Interrupt vectors for the LPSPI peripheral type

LPSPI_IRQS [2/3]

#define LPSPI_IRQS   { NotAvail_IRQn, LPSPI1_IRQn, LPSPI2_IRQn, LPSPI3_IRQn, LPSPI4_IRQn, LPSPI5_IRQn, LPSPI6_IRQn }

Interrupt vectors for the LPSPI peripheral type

LPSPI_IRQS [3/3]

#define LPSPI_IRQS   { NotAvail_IRQn, LPSPI1_IRQn, LPSPI2_IRQn, LPSPI3_IRQn, LPSPI4_IRQn, LPSPI5_IRQn, LPSPI6_IRQn }

Interrupt vectors for the LPSPI peripheral type