RTEMS 6.1-rc5
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Functions

Functions

ALT_STATUS_CODE alt_l2_addr_filter_cfg_get (uint32_t *addr_filt_start, uint32_t *addr_filt_end)
 
ALT_STATUS_CODE alt_l2_addr_filter_cfg_set (uint32_t addr_filt_start, uint32_t addr_filt_end)
 

Detailed Description

The L2 cache address filter controls where physical addresses within certain ranges of the MPU address space are directed.

The L2 cache has master port connections to the L3 interconnect and the SDRAM controller. A programmable address filter controls which portions of the 32-bit physical address space use each master.

When l2 address filtering is configured and enabled, a physical address will be redirected to one master or the other based upon the address filter configuration.

If address_filter_start <= physical_address < address_filter_end:

See: ARM DDI 0246F, CoreLink Level 2 Cache Controller L2C-310 Technical Reference Manual, Section 3.3.12 Address Filtering for more information.

Function Documentation

◆ alt_l2_addr_filter_cfg_get()

ALT_STATUS_CODE alt_l2_addr_filter_cfg_get ( uint32_t *  addr_filt_start,
uint32_t *  addr_filt_end 
)

Get the L2 cache address filtering configuration settings.

Parameters
addr_filt_start[out] An output parameter variable for the address filtering start address for the range of physical addresses redirected to the SDRAM AXI master port. The value returned is always a 1 MiB aligned address.
addr_filt_end[out] An output parameter variable for the address filtering end address for the range of physical addresses redirected to the SDRAM AXI master port. The value returned is always a 1 MiB aligned address.
Return values
ALT_E_SUCCESSThe operation was successful.
ALT_E_ERRORThe operation failed.
ALT_E_BAD_ARGAn bad argument was passed. Either addr_filt_start or addr_filt_end or both are invalid addresses.

◆ alt_l2_addr_filter_cfg_set()

ALT_STATUS_CODE alt_l2_addr_filter_cfg_set ( uint32_t  addr_filt_start,
uint32_t  addr_filt_end 
)

Set the L2 cache address filtering configuration settings.

Address filtering start and end values must be 1 MiB aligned.

Parameters
addr_filt_startThe address filtering start address for the range of physical addresses redirected to the SDRAM AXI master port. Only bits [31:20] of the address are valid. Any bits outside the range [31:20] are invalid and will cause an error status to be returned.
addr_filt_endThe address filtering end address for the range of physical addresses redirected to the SDRAM AXI master port. Only bits [31:20] of the address are valid. Any bits outside the range [31:20] are invalid and will cause an error status to be returned.
Return values
ALT_E_SUCCESSThe operation was succesful.
ALT_E_ERRORThe operation failed.
ALT_E_ARG_RANGEAn argument violates a range constraint. One or more address arguments do not satisfy the argument constraints.