GPT Peripheral Access Layer

Modules
	GPT Register Masks

Data Structures
struct	GPT_Type

Macros
#define	GPT1_BASE   (0x401EC000u)
#define	GPT1   ((GPT_Type *)GPT1_BASE)
#define	GPT2_BASE   (0x401F0000u)
#define	GPT2   ((GPT_Type *)GPT2_BASE)
#define	GPT_BASE_ADDRS   { 0u, GPT1_BASE, GPT2_BASE }
#define	GPT_BASE_PTRS   { (GPT_Type *)0u, GPT1, GPT2 }
#define	GPT_IRQS   { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
#define	GPT1_BASE   (0x400EC000u)
#define	GPT1   ((GPT_Type *)GPT1_BASE)
#define	GPT2_BASE   (0x400F0000u)
#define	GPT2   ((GPT_Type *)GPT2_BASE)
#define	GPT3_BASE   (0x400F4000u)
#define	GPT3   ((GPT_Type *)GPT3_BASE)
#define	GPT4_BASE   (0x400F8000u)
#define	GPT4   ((GPT_Type *)GPT4_BASE)
#define	GPT5_BASE   (0x400FC000u)
#define	GPT5   ((GPT_Type *)GPT5_BASE)
#define	GPT6_BASE   (0x40100000u)
#define	GPT6   ((GPT_Type *)GPT6_BASE)
#define	GPT_BASE_ADDRS   { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, GPT5_BASE, GPT6_BASE }
#define	GPT_BASE_PTRS   { (GPT_Type *)0u, GPT1, GPT2, GPT3, GPT4, GPT5, GPT6 }
#define	GPT_IRQS   { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn, GPT3_IRQn, GPT4_IRQn, GPT5_IRQn, GPT6_IRQn }
#define	GPT1_BASE   (0x400EC000u)
#define	GPT1   ((GPT_Type *)GPT1_BASE)
#define	GPT2_BASE   (0x400F0000u)
#define	GPT2   ((GPT_Type *)GPT2_BASE)
#define	GPT3_BASE   (0x400F4000u)
#define	GPT3   ((GPT_Type *)GPT3_BASE)
#define	GPT4_BASE   (0x400F8000u)
#define	GPT4   ((GPT_Type *)GPT4_BASE)
#define	GPT5_BASE   (0x400FC000u)
#define	GPT5   ((GPT_Type *)GPT5_BASE)
#define	GPT6_BASE   (0x40100000u)
#define	GPT6   ((GPT_Type *)GPT6_BASE)
#define	GPT_BASE_ADDRS   { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, GPT5_BASE, GPT6_BASE }
#define	GPT_BASE_PTRS   { (GPT_Type *)0u, GPT1, GPT2, GPT3, GPT4, GPT5, GPT6 }
#define	GPT_IRQS   { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn, GPT3_IRQn, GPT4_IRQn, GPT5_IRQn, GPT6_IRQn }

Detailed Description

Macro Definition Documentation

GPT1 [1/3]

#define GPT1   ((GPT_Type *)GPT1_BASE)

Peripheral GPT1 base pointer

GPT1 [2/3]

#define GPT1   ((GPT_Type *)GPT1_BASE)

Peripheral GPT1 base pointer

GPT1 [3/3]

#define GPT1   ((GPT_Type *)GPT1_BASE)

Peripheral GPT1 base pointer

GPT1_BASE [1/3]

#define GPT1_BASE   (0x401EC000u)

Peripheral GPT1 base address

GPT1_BASE [2/3]

#define GPT1_BASE   (0x400EC000u)

Peripheral GPT1 base address

GPT1_BASE [3/3]

#define GPT1_BASE   (0x400EC000u)

Peripheral GPT1 base address

GPT2 [1/3]

#define GPT2   ((GPT_Type *)GPT2_BASE)

Peripheral GPT2 base pointer

GPT2 [2/3]

#define GPT2   ((GPT_Type *)GPT2_BASE)

Peripheral GPT2 base pointer

GPT2 [3/3]

#define GPT2   ((GPT_Type *)GPT2_BASE)

Peripheral GPT2 base pointer

GPT2_BASE [1/3]

#define GPT2_BASE   (0x401F0000u)

Peripheral GPT2 base address

GPT2_BASE [2/3]

#define GPT2_BASE   (0x400F0000u)

Peripheral GPT2 base address

GPT2_BASE [3/3]

#define GPT2_BASE   (0x400F0000u)

Peripheral GPT2 base address

GPT3 [1/2]

#define GPT3   ((GPT_Type *)GPT3_BASE)

Peripheral GPT3 base pointer

GPT3 [2/2]

#define GPT3   ((GPT_Type *)GPT3_BASE)

Peripheral GPT3 base pointer

GPT3_BASE [1/2]

#define GPT3_BASE   (0x400F4000u)

Peripheral GPT3 base address

GPT3_BASE [2/2]

#define GPT3_BASE   (0x400F4000u)

Peripheral GPT3 base address

GPT4 [1/2]

#define GPT4   ((GPT_Type *)GPT4_BASE)

Peripheral GPT4 base pointer

GPT4 [2/2]

#define GPT4   ((GPT_Type *)GPT4_BASE)

Peripheral GPT4 base pointer

GPT4_BASE [1/2]

#define GPT4_BASE   (0x400F8000u)

Peripheral GPT4 base address

GPT4_BASE [2/2]

#define GPT4_BASE   (0x400F8000u)

Peripheral GPT4 base address

GPT5 [1/2]

#define GPT5   ((GPT_Type *)GPT5_BASE)

Peripheral GPT5 base pointer

GPT5 [2/2]

#define GPT5   ((GPT_Type *)GPT5_BASE)

Peripheral GPT5 base pointer

GPT5_BASE [1/2]

#define GPT5_BASE   (0x400FC000u)

Peripheral GPT5 base address

GPT5_BASE [2/2]

#define GPT5_BASE   (0x400FC000u)

Peripheral GPT5 base address

GPT6 [1/2]

#define GPT6   ((GPT_Type *)GPT6_BASE)

Peripheral GPT6 base pointer

GPT6 [2/2]

#define GPT6   ((GPT_Type *)GPT6_BASE)

Peripheral GPT6 base pointer

GPT6_BASE [1/2]

#define GPT6_BASE   (0x40100000u)

Peripheral GPT6 base address

GPT6_BASE [2/2]

#define GPT6_BASE   (0x40100000u)

Peripheral GPT6 base address

GPT_BASE_ADDRS [1/3]

#define GPT_BASE_ADDRS   { 0u, GPT1_BASE, GPT2_BASE }

Array initializer of GPT peripheral base addresses

GPT_BASE_ADDRS [2/3]

#define GPT_BASE_ADDRS   { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, GPT5_BASE, GPT6_BASE }

Array initializer of GPT peripheral base addresses

GPT_BASE_ADDRS [3/3]

#define GPT_BASE_ADDRS   { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, GPT5_BASE, GPT6_BASE }

Array initializer of GPT peripheral base addresses

GPT_BASE_PTRS [1/3]

#define GPT_BASE_PTRS   { (GPT_Type *)0u, GPT1, GPT2 }

Array initializer of GPT peripheral base pointers

GPT_BASE_PTRS [2/3]

#define GPT_BASE_PTRS   { (GPT_Type *)0u, GPT1, GPT2, GPT3, GPT4, GPT5, GPT6 }

Array initializer of GPT peripheral base pointers

GPT_BASE_PTRS [3/3]

#define GPT_BASE_PTRS   { (GPT_Type *)0u, GPT1, GPT2, GPT3, GPT4, GPT5, GPT6 }

Array initializer of GPT peripheral base pointers

GPT_IRQS [1/3]

#define GPT_IRQS   { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }

Interrupt vectors for the GPT peripheral type

GPT_IRQS [2/3]

#define GPT_IRQS   { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn, GPT3_IRQn, GPT4_IRQn, GPT5_IRQn, GPT6_IRQn }

Interrupt vectors for the GPT peripheral type

GPT_IRQS [3/3]

#define GPT_IRQS   { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn, GPT3_IRQn, GPT4_IRQn, GPT5_IRQn, GPT6_IRQn }

Interrupt vectors for the GPT peripheral type