RTEMS 6.1-rc5
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Modules | |
DCIC Register Masks | |
Data Structures | |
struct | DCIC_Type |
Macros | |
#define | DCIC1_BASE (0x40819000u) |
#define | DCIC1 ((DCIC_Type *)DCIC1_BASE) |
#define | DCIC2_BASE (0x4081A000u) |
#define | DCIC2 ((DCIC_Type *)DCIC2_BASE) |
#define | DCIC_BASE_ADDRS { 0u, DCIC1_BASE, DCIC2_BASE } |
#define | DCIC_BASE_PTRS { (DCIC_Type *)0u, DCIC1, DCIC2 } |
#define | DCIC1_BASE (0x40819000u) |
#define | DCIC1 ((DCIC_Type *)DCIC1_BASE) |
#define | DCIC2_BASE (0x4081A000u) |
#define | DCIC2 ((DCIC_Type *)DCIC2_BASE) |
#define | DCIC_BASE_ADDRS { 0u, DCIC1_BASE, DCIC2_BASE } |
#define | DCIC_BASE_PTRS { (DCIC_Type *)0u, DCIC1, DCIC2 } |
#define DCIC1 ((DCIC_Type *)DCIC1_BASE) |
Peripheral DCIC1 base pointer
#define DCIC1 ((DCIC_Type *)DCIC1_BASE) |
Peripheral DCIC1 base pointer
#define DCIC1_BASE (0x40819000u) |
Peripheral DCIC1 base address
#define DCIC1_BASE (0x40819000u) |
Peripheral DCIC1 base address
#define DCIC2 ((DCIC_Type *)DCIC2_BASE) |
Peripheral DCIC2 base pointer
#define DCIC2 ((DCIC_Type *)DCIC2_BASE) |
Peripheral DCIC2 base pointer
#define DCIC2_BASE (0x4081A000u) |
Peripheral DCIC2 base address
#define DCIC2_BASE (0x4081A000u) |
Peripheral DCIC2 base address
#define DCIC_BASE_ADDRS { 0u, DCIC1_BASE, DCIC2_BASE } |
Array initializer of DCIC peripheral base addresses
#define DCIC_BASE_ADDRS { 0u, DCIC1_BASE, DCIC2_BASE } |
Array initializer of DCIC peripheral base addresses
Array initializer of DCIC peripheral base pointers