CMP Peripheral Access Layer

Modules
	CMP Register Masks

Data Structures
struct	CMP_Type

Macros
#define	CMP1_BASE   (0x40094000u)
#define	CMP1   ((CMP_Type *)CMP1_BASE)
#define	CMP2_BASE   (0x40094008u)
#define	CMP2   ((CMP_Type *)CMP2_BASE)
#define	CMP3_BASE   (0x40094010u)
#define	CMP3   ((CMP_Type *)CMP3_BASE)
#define	CMP4_BASE   (0x40094018u)
#define	CMP4   ((CMP_Type *)CMP4_BASE)
#define	CMP_BASE_ADDRS   { 0u, CMP1_BASE, CMP2_BASE, CMP3_BASE, CMP4_BASE }
#define	CMP_BASE_PTRS   { (CMP_Type *)0u, CMP1, CMP2, CMP3, CMP4 }
#define	CMP_IRQS   { NotAvail_IRQn, ACMP1_IRQn, ACMP2_IRQn, ACMP3_IRQn, ACMP4_IRQn }
#define	CMP1_BASE   (0x401A4000u)
#define	CMP1   ((CMP_Type *)CMP1_BASE)
#define	CMP2_BASE   (0x401A8000u)
#define	CMP2   ((CMP_Type *)CMP2_BASE)
#define	CMP3_BASE   (0x401AC000u)
#define	CMP3   ((CMP_Type *)CMP3_BASE)
#define	CMP4_BASE   (0x401B0000u)
#define	CMP4   ((CMP_Type *)CMP4_BASE)
#define	CMP_BASE_ADDRS   { 0u, CMP1_BASE, CMP2_BASE, CMP3_BASE, CMP4_BASE }
#define	CMP_BASE_PTRS   { (CMP_Type *)0u, CMP1, CMP2, CMP3, CMP4 }
#define	CMP_IRQS   { NotAvail_IRQn, ACMP1_IRQn, ACMP2_IRQn, ACMP3_IRQn, ACMP4_IRQn }
#define	CMP1_BASE   (0x401A4000u)
#define	CMP1   ((CMP_Type *)CMP1_BASE)
#define	CMP2_BASE   (0x401A8000u)
#define	CMP2   ((CMP_Type *)CMP2_BASE)
#define	CMP3_BASE   (0x401AC000u)
#define	CMP3   ((CMP_Type *)CMP3_BASE)
#define	CMP4_BASE   (0x401B0000u)
#define	CMP4   ((CMP_Type *)CMP4_BASE)
#define	CMP_BASE_ADDRS   { 0u, CMP1_BASE, CMP2_BASE, CMP3_BASE, CMP4_BASE }
#define	CMP_BASE_PTRS   { (CMP_Type *)0u, CMP1, CMP2, CMP3, CMP4 }
#define	CMP_IRQS   { NotAvail_IRQn, ACMP1_IRQn, ACMP2_IRQn, ACMP3_IRQn, ACMP4_IRQn }

Detailed Description

Macro Definition Documentation

CMP1 [1/3]

#define CMP1   ((CMP_Type *)CMP1_BASE)

Peripheral CMP1 base pointer

CMP1 [2/3]

#define CMP1   ((CMP_Type *)CMP1_BASE)

Peripheral CMP1 base pointer

CMP1 [3/3]

#define CMP1   ((CMP_Type *)CMP1_BASE)

Peripheral CMP1 base pointer

CMP1_BASE [1/3]

#define CMP1_BASE   (0x40094000u)

Peripheral CMP1 base address

CMP1_BASE [2/3]

#define CMP1_BASE   (0x401A4000u)

Peripheral CMP1 base address

CMP1_BASE [3/3]

#define CMP1_BASE   (0x401A4000u)

Peripheral CMP1 base address

CMP2 [1/3]

#define CMP2   ((CMP_Type *)CMP2_BASE)

Peripheral CMP2 base pointer

CMP2 [2/3]

#define CMP2   ((CMP_Type *)CMP2_BASE)

Peripheral CMP2 base pointer

CMP2 [3/3]

#define CMP2   ((CMP_Type *)CMP2_BASE)

Peripheral CMP2 base pointer

CMP2_BASE [1/3]

#define CMP2_BASE   (0x40094008u)

Peripheral CMP2 base address

CMP2_BASE [2/3]

#define CMP2_BASE   (0x401A8000u)

Peripheral CMP2 base address

CMP2_BASE [3/3]

#define CMP2_BASE   (0x401A8000u)

Peripheral CMP2 base address

CMP3 [1/3]

#define CMP3   ((CMP_Type *)CMP3_BASE)

Peripheral CMP3 base pointer

CMP3 [2/3]

#define CMP3   ((CMP_Type *)CMP3_BASE)

Peripheral CMP3 base pointer

CMP3 [3/3]

#define CMP3   ((CMP_Type *)CMP3_BASE)

Peripheral CMP3 base pointer

CMP3_BASE [1/3]

#define CMP3_BASE   (0x40094010u)

Peripheral CMP3 base address

CMP3_BASE [2/3]

#define CMP3_BASE   (0x401AC000u)

Peripheral CMP3 base address

CMP3_BASE [3/3]

#define CMP3_BASE   (0x401AC000u)

Peripheral CMP3 base address

CMP4 [1/3]

#define CMP4   ((CMP_Type *)CMP4_BASE)

Peripheral CMP4 base pointer

CMP4 [2/3]

#define CMP4   ((CMP_Type *)CMP4_BASE)

Peripheral CMP4 base pointer

CMP4 [3/3]

#define CMP4   ((CMP_Type *)CMP4_BASE)

Peripheral CMP4 base pointer

CMP4_BASE [1/3]

#define CMP4_BASE   (0x40094018u)

Peripheral CMP4 base address

CMP4_BASE [2/3]

#define CMP4_BASE   (0x401B0000u)

Peripheral CMP4 base address

CMP4_BASE [3/3]

#define CMP4_BASE   (0x401B0000u)

Peripheral CMP4 base address

CMP_BASE_ADDRS [1/3]

#define CMP_BASE_ADDRS   { 0u, CMP1_BASE, CMP2_BASE, CMP3_BASE, CMP4_BASE }

Array initializer of CMP peripheral base addresses

CMP_BASE_ADDRS [2/3]

#define CMP_BASE_ADDRS   { 0u, CMP1_BASE, CMP2_BASE, CMP3_BASE, CMP4_BASE }

Array initializer of CMP peripheral base addresses

CMP_BASE_ADDRS [3/3]

#define CMP_BASE_ADDRS   { 0u, CMP1_BASE, CMP2_BASE, CMP3_BASE, CMP4_BASE }

Array initializer of CMP peripheral base addresses

CMP_BASE_PTRS [1/3]

#define CMP_BASE_PTRS   { (CMP_Type *)0u, CMP1, CMP2, CMP3, CMP4 }

Array initializer of CMP peripheral base pointers

CMP_BASE_PTRS [2/3]

#define CMP_BASE_PTRS   { (CMP_Type *)0u, CMP1, CMP2, CMP3, CMP4 }

Array initializer of CMP peripheral base pointers

CMP_BASE_PTRS [3/3]

#define CMP_BASE_PTRS   { (CMP_Type *)0u, CMP1, CMP2, CMP3, CMP4 }

Array initializer of CMP peripheral base pointers

CMP_IRQS [1/3]

#define CMP_IRQS   { NotAvail_IRQn, ACMP1_IRQn, ACMP2_IRQn, ACMP3_IRQn, ACMP4_IRQn }

Interrupt vectors for the CMP peripheral type

CMP_IRQS [2/3]

#define CMP_IRQS   { NotAvail_IRQn, ACMP1_IRQn, ACMP2_IRQn, ACMP3_IRQn, ACMP4_IRQn }

Interrupt vectors for the CMP peripheral type

CMP_IRQS [3/3]

#define CMP_IRQS   { NotAvail_IRQn, ACMP1_IRQn, ACMP2_IRQn, ACMP3_IRQn, ACMP4_IRQn }

Interrupt vectors for the CMP peripheral type