RTEMS 6.1-rc5
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This header file defines the GRCAN register block interface. More...
#include <stdint.h>
Go to the source code of this file.
Data Structures | |
struct | grcan |
This structure defines the GRCAN register block memory map. More... | |
Macros | |
#define | GRCAN_CANCONF_SCALER_SHIFT 24 |
#define | GRCAN_CANCONF_SCALER_MASK 0xff000000U |
#define | GRCAN_CANCONF_SCALER_GET(_reg) |
#define | GRCAN_CANCONF_SCALER_SET(_reg, _val) |
#define | GRCAN_CANCONF_SCALER(_val) |
#define | GRCAN_CANCONF_PS1_SHIFT 20 |
#define | GRCAN_CANCONF_PS1_MASK 0xf00000U |
#define | GRCAN_CANCONF_PS1_GET(_reg) |
#define | GRCAN_CANCONF_PS1_SET(_reg, _val) |
#define | GRCAN_CANCONF_PS1(_val) |
#define | GRCAN_CANCONF_PS2_SHIFT 16 |
#define | GRCAN_CANCONF_PS2_MASK 0xf0000U |
#define | GRCAN_CANCONF_PS2_GET(_reg) |
#define | GRCAN_CANCONF_PS2_SET(_reg, _val) |
#define | GRCAN_CANCONF_PS2(_val) |
#define | GRCAN_CANCONF_RSJ_SHIFT 12 |
#define | GRCAN_CANCONF_RSJ_MASK 0x7000U |
#define | GRCAN_CANCONF_RSJ_GET(_reg) |
#define | GRCAN_CANCONF_RSJ_SET(_reg, _val) |
#define | GRCAN_CANCONF_RSJ(_val) |
#define | GRCAN_CANCONF_BPR_SHIFT 8 |
#define | GRCAN_CANCONF_BPR_MASK 0x300U |
#define | GRCAN_CANCONF_BPR_GET(_reg) |
#define | GRCAN_CANCONF_BPR_SET(_reg, _val) |
#define | GRCAN_CANCONF_BPR(_val) |
#define | GRCAN_CANCONF_SAM 0x20U |
#define | GRCAN_CANCONF_SILNT 0x10U |
#define | GRCAN_CANCONF_SELECT 0x8U |
#define | GRCAN_CANCONF_ENABLE1 0x4U |
#define | GRCAN_CANCONF_ENABLE0 0x2U |
#define | GRCAN_CANCONF_ABORT 0x1U |
#define | GRCAN_CANSTAT_TXCHANNELS_SHIFT 28 |
#define | GRCAN_CANSTAT_TXCHANNELS_MASK 0xf0000000U |
#define | GRCAN_CANSTAT_TXCHANNELS_GET(_reg) |
#define | GRCAN_CANSTAT_TXCHANNELS_SET(_reg, _val) |
#define | GRCAN_CANSTAT_TXCHANNELS(_val) |
#define | GRCAN_CANSTAT_RXCHANNELS_SHIFT 24 |
#define | GRCAN_CANSTAT_RXCHANNELS_MASK 0xf000000U |
#define | GRCAN_CANSTAT_RXCHANNELS_GET(_reg) |
#define | GRCAN_CANSTAT_RXCHANNELS_SET(_reg, _val) |
#define | GRCAN_CANSTAT_RXCHANNELS(_val) |
#define | GRCAN_CANSTAT_TXERRCNT_SHIFT 16 |
#define | GRCAN_CANSTAT_TXERRCNT_MASK 0xff0000U |
#define | GRCAN_CANSTAT_TXERRCNT_GET(_reg) |
#define | GRCAN_CANSTAT_TXERRCNT_SET(_reg, _val) |
#define | GRCAN_CANSTAT_TXERRCNT(_val) |
#define | GRCAN_CANSTAT_RXERRCNT_SHIFT 8 |
#define | GRCAN_CANSTAT_RXERRCNT_MASK 0xff00U |
#define | GRCAN_CANSTAT_RXERRCNT_GET(_reg) |
#define | GRCAN_CANSTAT_RXERRCNT_SET(_reg, _val) |
#define | GRCAN_CANSTAT_RXERRCNT(_val) |
#define | GRCAN_CANSTAT_ACTIVE 0x10U |
#define | GRCAN_CANSTAT_AHBERR 0x8U |
#define | GRCAN_CANSTAT_OR 0x4U |
#define | GRCAN_CANSTAT_OFF 0x2U |
#define | GRCAN_CANSTAT_PASS 0x1U |
#define | GRCAN_CANCTRL_RESET 0x2U |
#define | GRCAN_CANCTRL_ENABLE 0x1U |
#define | GRCAN_CANMASK_MASK_SHIFT 0 |
#define | GRCAN_CANMASK_MASK_MASK 0x1fffffffU |
#define | GRCAN_CANMASK_MASK_GET(_reg) |
#define | GRCAN_CANMASK_MASK_SET(_reg, _val) |
#define | GRCAN_CANMASK_MASK(_val) |
#define | GRCAN_CANCODE_SYNC_SHIFT 0 |
#define | GRCAN_CANCODE_SYNC_MASK 0x1fffffffU |
#define | GRCAN_CANCODE_SYNC_GET(_reg) |
#define | GRCAN_CANCODE_SYNC_SET(_reg, _val) |
#define | GRCAN_CANCODE_SYNC(_val) |
#define | GRCAN_CANTXCTRL_SINGLE 0x4U |
#define | GRCAN_CANTXCTRL_ONGOING 0x2U |
#define | GRCAN_CANTXCTRL_ENABLE 0x1U |
#define | GRCAN_CANTXADDR_ADDR_SHIFT 10 |
#define | GRCAN_CANTXADDR_ADDR_MASK 0xfffffc00U |
#define | GRCAN_CANTXADDR_ADDR_GET(_reg) |
#define | GRCAN_CANTXADDR_ADDR_SET(_reg, _val) |
#define | GRCAN_CANTXADDR_ADDR(_val) |
#define | GRCAN_CANTXSIZE_SIZE_SHIFT 6 |
#define | GRCAN_CANTXSIZE_SIZE_MASK 0x1fffc0U |
#define | GRCAN_CANTXSIZE_SIZE_GET(_reg) |
#define | GRCAN_CANTXSIZE_SIZE_SET(_reg, _val) |
#define | GRCAN_CANTXSIZE_SIZE(_val) |
#define | GRCAN_CANTXWR_WRITE_SHIFT 4 |
#define | GRCAN_CANTXWR_WRITE_MASK 0xffff0U |
#define | GRCAN_CANTXWR_WRITE_GET(_reg) |
#define | GRCAN_CANTXWR_WRITE_SET(_reg, _val) |
#define | GRCAN_CANTXWR_WRITE(_val) |
#define | GRCAN_CANTXRD_READ_SHIFT 4 |
#define | GRCAN_CANTXRD_READ_MASK 0xffff0U |
#define | GRCAN_CANTXRD_READ_GET(_reg) |
#define | GRCAN_CANTXRD_READ_SET(_reg, _val) |
#define | GRCAN_CANTXRD_READ(_val) |
#define | GRCAN_CANTXIRQ_IRQ_SHIFT 4 |
#define | GRCAN_CANTXIRQ_IRQ_MASK 0xffff0U |
#define | GRCAN_CANTXIRQ_IRQ_GET(_reg) |
#define | GRCAN_CANTXIRQ_IRQ_SET(_reg, _val) |
#define | GRCAN_CANTXIRQ_IRQ(_val) |
#define | GRCAN_CANRXCTRL_ONGOING 0x2U |
#define | GRCAN_CANRXCTRL_ENABLE 0x1U |
#define | GRCAN_CANRXADDR_ADDR_SHIFT 10 |
#define | GRCAN_CANRXADDR_ADDR_MASK 0xfffffc00U |
#define | GRCAN_CANRXADDR_ADDR_GET(_reg) |
#define | GRCAN_CANRXADDR_ADDR_SET(_reg, _val) |
#define | GRCAN_CANRXADDR_ADDR(_val) |
#define | GRCAN_CANRXSIZE_SIZE_SHIFT 6 |
#define | GRCAN_CANRXSIZE_SIZE_MASK 0x1fffc0U |
#define | GRCAN_CANRXSIZE_SIZE_GET(_reg) |
#define | GRCAN_CANRXSIZE_SIZE_SET(_reg, _val) |
#define | GRCAN_CANRXSIZE_SIZE(_val) |
#define | GRCAN_CANRXWR_WRITE_SHIFT 4 |
#define | GRCAN_CANRXWR_WRITE_MASK 0xffff0U |
#define | GRCAN_CANRXWR_WRITE_GET(_reg) |
#define | GRCAN_CANRXWR_WRITE_SET(_reg, _val) |
#define | GRCAN_CANRXWR_WRITE(_val) |
#define | GRCAN_CANRXRD_READ_SHIFT 4 |
#define | GRCAN_CANRXRD_READ_MASK 0xffff0U |
#define | GRCAN_CANRXRD_READ_GET(_reg) |
#define | GRCAN_CANRXRD_READ_SET(_reg, _val) |
#define | GRCAN_CANRXRD_READ(_val) |
#define | GRCAN_CANRXIRQ_IRQ_SHIFT 4 |
#define | GRCAN_CANRXIRQ_IRQ_MASK 0xffff0U |
#define | GRCAN_CANRXIRQ_IRQ_GET(_reg) |
#define | GRCAN_CANRXIRQ_IRQ_SET(_reg, _val) |
#define | GRCAN_CANRXIRQ_IRQ(_val) |
#define | GRCAN_CANRXMASK_AM_SHIFT 0 |
#define | GRCAN_CANRXMASK_AM_MASK 0x1fffffffU |
#define | GRCAN_CANRXMASK_AM_GET(_reg) |
#define | GRCAN_CANRXMASK_AM_SET(_reg, _val) |
#define | GRCAN_CANRXMASK_AM(_val) |
#define | GRCAN_CANRXCODE_AC_SHIFT 0 |
#define | GRCAN_CANRXCODE_AC_MASK 0x1fffffffU |
#define | GRCAN_CANRXCODE_AC_GET(_reg) |
#define | GRCAN_CANRXCODE_AC_SET(_reg, _val) |
#define | GRCAN_CANRXCODE_AC(_val) |
Typedefs | |
typedef struct grcan | grcan |
This structure defines the GRCAN register block memory map. | |
This header file defines the GRCAN register block interface.