threaddispatch.h

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/* SPDX-License-Identifier: BSD-2-Clause */
 
/*
 * COPYRIGHT (c) 1989-2009.
 * On-Line Applications Research Corporation (OAR).
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef _RTEMS_SCORE_THREADDISPATCH_H
#define _RTEMS_SCORE_THREADDISPATCH_H
 
#include <rtems/score/percpu.h>
#include <rtems/score/isrlock.h>
#include <rtems/score/profiling.h>
 
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
 
#if defined(RTEMS_SMP) || ( CPU_ENABLE_ROBUST_THREAD_DISPATCH == TRUE )
#define RTEMS_SCORE_ROBUST_THREAD_DISPATCH
#endif
 
static inline bool _Thread_Dispatch_is_enabled(void)
{
  bool enabled;
 
#if defined(RTEMS_SMP)
  ISR_Level level;
 
  _ISR_Local_disable( level );
#endif
 
  enabled = _Thread_Dispatch_disable_level == 0;
 
#if defined(RTEMS_SMP)
  _ISR_Local_enable( level );
#endif
 
  return enabled;
}
 
static inline uint32_t _Thread_Dispatch_get_disable_level(void)
{
  return _Thread_Dispatch_disable_level;
}
 
static inline void _Thread_Dispatch_initialization( void )
{
  _Thread_Dispatch_disable_level = 1;
}
 
void _Thread_Dispatch( void );
 
void _Thread_Dispatch_direct( Per_CPU_Control *cpu_self );
 
RTEMS_NO_RETURN void _Thread_Dispatch_direct_no_return(
  Per_CPU_Control *cpu_self
);
 
void _Thread_Do_dispatch( Per_CPU_Control *cpu_self, ISR_Level level );
 
static inline Per_CPU_Control *_Thread_Dispatch_disable_with_CPU(
  Per_CPU_Control        *cpu_self,
  const ISR_lock_Context *lock_context
)
{
  uint32_t disable_level;
 
  disable_level = cpu_self->thread_dispatch_disable_level;
  _Profiling_Thread_dispatch_disable_critical(
    cpu_self,
    disable_level,
    lock_context
  );
  cpu_self->thread_dispatch_disable_level = disable_level + 1;
 
  return cpu_self;
}
 
static inline Per_CPU_Control *_Thread_Dispatch_disable_critical(
  const ISR_lock_Context *lock_context
)
{
  return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
}
 
static inline Per_CPU_Control *_Thread_Dispatch_disable( void )
{
  Per_CPU_Control  *cpu_self;
 
#if defined( RTEMS_SMP ) || defined( RTEMS_PROFILING )
  ISR_lock_Context  lock_context;
 
  _ISR_lock_ISR_disable( &lock_context );
 
  cpu_self = _Thread_Dispatch_disable_critical( &lock_context );
 
  _ISR_lock_ISR_enable( &lock_context );
#else
  cpu_self = _Thread_Dispatch_disable_critical( NULL );
#endif
 
  return cpu_self;
}
 
void _Thread_Dispatch_enable( Per_CPU_Control *cpu_self );
 
static inline void _Thread_Dispatch_unnest( Per_CPU_Control *cpu_self )
{
  _Assert( cpu_self->thread_dispatch_disable_level > 0 );
  --cpu_self->thread_dispatch_disable_level;
}
 
static inline void _Thread_Dispatch_request(
  Per_CPU_Control *cpu_self,
  Per_CPU_Control *cpu_target
)
{
#if defined( RTEMS_SMP )
  if ( cpu_self == cpu_target ) {
    cpu_self->dispatch_necessary = true;
  } else {
    _Atomic_Fetch_or_ulong( &cpu_target->message, 0, ATOMIC_ORDER_RELEASE );
    _CPU_SMP_Send_interrupt( _Per_CPU_Get_index( cpu_target ) );
  }
#else
 cpu_self->dispatch_necessary = true;
 (void) cpu_target;
#endif
}
 
#ifdef __cplusplus
}
#endif /* __cplusplus */
 
#endif /* _RTEMS_SCORE_THREADDISPATCH_H */