RTEMS 6.1-rc4
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Data Fields

#include <alt_clock_manager.h>

Data Fields

ALT_CLK_t ref_clk
 
uint32_t mult
 
uint32_t div
 
uint32_t cntrs [6]
 
uint32_t pshift [6]
 

Detailed Description

This type definition defines a structure to contain the generalized configuration settings for a PLL.

Field Documentation

◆ cntrs

uint32_t ALT_CLK_PLL_CFG_s::cntrs[6]

Post-Scale Counters (C0 - C5) - range 1 to 512

◆ div

uint32_t ALT_CLK_PLL_CFG_s::div

VCO Frequency Configuration - Divider (N) value, range 1 to 64

◆ mult

uint32_t ALT_CLK_PLL_CFG_s::mult

VCO Frequency Configuration - Multiplier (M) value, range 1 to 4096

◆ pshift

uint32_t ALT_CLK_PLL_CFG_s::pshift[6]

Phase Shift - 1/8 (45 degrees) of negative phase shift per increment, range 0 to 4096

◆ ref_clk

ALT_CLK_t ALT_CLK_PLL_CFG_s::ref_clk

PLL Reference Clock Source


The documentation for this struct was generated from the following file: