RTEMS 6.1-rc4
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Implementations for interrupt mechanisms for Time Test 27. More...
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Macros | |
#define | ERC32_BSP_USE_SYNCHRONOUS_TRAP 0 |
#define | TEST_INTERRUPT_SOURCE ERC32_INTERRUPT_EXTERNAL_1 |
#define | TEST_INTERRUPT_SOURCE2 (ERC32_INTERRUPT_EXTERNAL_1+1) |
#define | MUST_WAIT_FOR_INTERRUPT 1 |
#define | Cause_tm27_intr() |
#define | Clear_tm27_intr() ERC32_Clear_interrupt( TEST_INTERRUPT_SOURCE ) |
#define | Lower_tm27_intr() /* empty */ |
Implementations for interrupt mechanisms for Time Test 27.
#define Cause_tm27_intr | ( | void | ) |