49#ifndef LIBBSP_ARM_TMS570_CRC
50#define LIBBSP_ARM_TMS570_CRC
56 uint8_t reserved1 [4];
58 uint8_t reserved2 [4];
60 uint8_t reserved3 [4];
62 uint8_t reserved4 [4];
64 uint8_t reserved5 [4];
66 uint8_t reserved6 [4];
67 uint32_t INT_OFFS_REG;
68 uint8_t reserved7 [4];
70 uint8_t reserved8 [4];
76 uint8_t reserved9 [12];
77 uint32_t PSA_SIGREGL1;
78 uint32_t PSA_SIGREGH1;
81 uint32_t PSA_SECSIGREGL1;
82 uint32_t PSA_SECSIGREGH1;
83 uint32_t RAW_DATAREGL1;
84 uint32_t RAW_DATAREGH1;
90 uint8_t reserved10 [12];
91 uint32_t PSA_SIGREGL2;
92 uint32_t PSA_SIGREGH2;
95 uint32_t PSA_SECSIGREGL2;
96 uint32_t PSA_SECSIGREGH2;
97 uint32_t RAW_DATAREGL2;
98 uint32_t RAW_DATAREGH2;
99 uint8_t reserved11 [128];
106#define TMS570_CRC_CTRL0_CH2_PSA_SWREST BSP_BIT32(8)
109#define TMS570_CRC_CTRL0_CH1_PSA_SWREST BSP_BIT32(0)
114#define TMS570_CRC_CTRL1_PWDN BSP_BIT32(0)
119#define TMS570_CRC_CTRL2_CH2_MODE(val) BSP_FLD32(val,8, 9)
120#define TMS570_CRC_CTRL2_CH2_MODE_GET(reg) BSP_FLD32GET(reg,8, 9)
121#define TMS570_CRC_CTRL2_CH2_MODE_SET(reg,val) BSP_FLD32SET(reg, val,8, 9)
124#define TMS570_CRC_CTRL2_CH1_TRACEEN BSP_BIT32(4)
127#define TMS570_CRC_CTRL2_CH1_MODE(val) BSP_FLD32(val,0, 1)
128#define TMS570_CRC_CTRL2_CH1_MODE_GET(reg) BSP_FLD32GET(reg,0, 1)
129#define TMS570_CRC_CTRL2_CH1_MODE_SET(reg,val) BSP_FLD32SET(reg, val,0, 1)
134#define TMS570_CRC_INTS_CH2_TIMEOUTENS BSP_BIT32(12)
137#define TMS570_CRC_INTS_CH2_UNDERENS BSP_BIT32(11)
140#define TMS570_CRC_INTS_CH2_OVERENS BSP_BIT32(10)
143#define TMS570_CRC_INTS_CH2_CRCFAILENS BSP_BIT32(9)
146#define TMS570_CRC_INTS_CH2_CCITENS BSP_BIT32(8)
149#define TMS570_CRC_INTS_CH1_TIMEOUTENS BSP_BIT32(4)
152#define TMS570_CRC_INTS_CH1_UNDERENS BSP_BIT32(3)
155#define TMS570_CRC_INTS_CH1_OVERENS BSP_BIT32(2)
158#define TMS570_CRC_INTS_CH1_CRCFAILENS BSP_BIT32(1)
161#define TMS570_CRC_INTS_CH1_CCITENS BSP_BIT32(0)
166#define TMS570_CRC_INTR_CH2_TIMEOUTENR BSP_BIT32(12)
169#define TMS570_CRC_INTR_CH2_UNDERENR BSP_BIT32(11)
172#define TMS570_CRC_INTR_CH2_OVERENR BSP_BIT32(10)
175#define TMS570_CRC_INTR_CH2_CRCFAILENR BSP_BIT32(9)
178#define TMS570_CRC_INTR_CH2_CCITENR BSP_BIT32(8)
181#define TMS570_CRC_INTR_CH1_TIMEOUTENR BSP_BIT32(4)
184#define TMS570_CRC_INTR_CH1_UNDERENR BSP_BIT32(3)
187#define TMS570_CRC_INTR_CH1_OVERENR BSP_BIT32(2)
190#define TMS570_CRC_INTR_CH1_CRCFAILENR BSP_BIT32(1)
193#define TMS570_CRC_INTR_CH1_CCITENR BSP_BIT32(0)
198#define TMS570_CRC_STATUS_CH2_TIMEOUT BSP_BIT32(12)
201#define TMS570_CRC_STATUS_CH2_UNDER BSP_BIT32(11)
204#define TMS570_CRC_STATUS_CH2_OVER BSP_BIT32(10)
207#define TMS570_CRC_STATUS_CH2_CRCFAIL BSP_BIT32(9)
210#define TMS570_CRC_STATUS_CH2_CCIT BSP_BIT32(8)
213#define TMS570_CRC_STATUS_CH1_TIMEOUT BSP_BIT32(4)
216#define TMS570_CRC_STATUS_CH1_UNDER BSP_BIT32(3)
219#define TMS570_CRC_STATUS_CH1_OVER BSP_BIT32(2)
222#define TMS570_CRC_STATUS_CH1_CRCFAIL BSP_BIT32(1)
225#define TMS570_CRC_STATUS_CH1_CCIT BSP_BIT32(0)
230#define TMS570_CRC_INT_OFFS_REG_OFSTREG(val) BSP_FLD32(val,0, 7)
231#define TMS570_CRC_INT_OFFS_REG_OFSTREG_GET(reg) BSP_FLD32GET(reg,0, 7)
232#define TMS570_CRC_INT_OFFS_REG_OFSTREG_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
237#define TMS570_CRC_BUSY_CH2_BUSY BSP_BIT32(8)
240#define TMS570_CRC_BUSY_CH1_BUSY BSP_BIT32(0)
245#define TMS570_CRC_PCOUNT_REG1_CRC_PAT_COUNT1(val) BSP_FLD32(val,0, 19)
246#define TMS570_CRC_PCOUNT_REG1_CRC_PAT_COUNT1_GET(reg) BSP_FLD32GET(reg,0, 19)
247#define TMS570_CRC_PCOUNT_REG1_CRC_PAT_COUNT1_SET(reg,val) BSP_FLD32SET(reg, val,0, 19)
252#define TMS570_CRC_SCOUNT_REG1_CRC_SEC_COUNT1(val) BSP_FLD32(val,0, 15)
253#define TMS570_CRC_SCOUNT_REG1_CRC_SEC_COUNT1_GET(reg) BSP_FLD32GET(reg,0, 15)
254#define TMS570_CRC_SCOUNT_REG1_CRC_SEC_COUNT1_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
259#define TMS570_CRC_CURSEC_REG1_CRC_CURSEC1(val) BSP_FLD32(val,0, 15)
260#define TMS570_CRC_CURSEC_REG1_CRC_CURSEC1_GET(reg) BSP_FLD32GET(reg,0, 15)
261#define TMS570_CRC_CURSEC_REG1_CRC_CURSEC1_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
266#define TMS570_CRC_WDTOPLD1_CRC_WDTOPLD1(val) BSP_FLD32(val,0, 23)
267#define TMS570_CRC_WDTOPLD1_CRC_WDTOPLD1_GET(reg) BSP_FLD32GET(reg,0, 23)
268#define TMS570_CRC_WDTOPLD1_CRC_WDTOPLD1_SET(reg,val) BSP_FLD32SET(reg, val,0, 23)
273#define TMS570_CRC_BCTOPLD1_CRC_BCTOPLD1(val) BSP_FLD32(val,0, 23)
274#define TMS570_CRC_BCTOPLD1_CRC_BCTOPLD1_GET(reg) BSP_FLD32GET(reg,0, 23)
275#define TMS570_CRC_BCTOPLD1_CRC_BCTOPLD1_SET(reg,val) BSP_FLD32SET(reg, val,0, 23)
312#define TMS570_CRC_PCOUNT_REG2_CRC_PAT_COUNT2(val) BSP_FLD32(val,0, 19)
313#define TMS570_CRC_PCOUNT_REG2_CRC_PAT_COUNT2_GET(reg) BSP_FLD32GET(reg,0, 19)
314#define TMS570_CRC_PCOUNT_REG2_CRC_PAT_COUNT2_SET(reg,val) BSP_FLD32SET(reg, val,0, 19)
319#define TMS570_CRC_SCOUNT_REG2_CRC_SEC_COUNT2(val) BSP_FLD32(val,0, 15)
320#define TMS570_CRC_SCOUNT_REG2_CRC_SEC_COUNT2_GET(reg) BSP_FLD32GET(reg,0, 15)
321#define TMS570_CRC_SCOUNT_REG2_CRC_SEC_COUNT2_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
326#define TMS570_CRC_CURSEC_REG2_CRC_CURSEC2(val) BSP_FLD32(val,0, 15)
327#define TMS570_CRC_CURSEC_REG2_CRC_CURSEC2_GET(reg) BSP_FLD32GET(reg,0, 15)
328#define TMS570_CRC_CURSEC_REG2_CRC_CURSEC2_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
333#define TMS570_CRC_WDTOPLD2_CRC_WDTOPLD2(val) BSP_FLD32(val,0, 23)
334#define TMS570_CRC_WDTOPLD2_CRC_WDTOPLD2_GET(reg) BSP_FLD32GET(reg,0, 23)
335#define TMS570_CRC_WDTOPLD2_CRC_WDTOPLD2_SET(reg,val) BSP_FLD32SET(reg, val,0, 23)
340#define TMS570_CRC_BCTOPLD2_CRC_BCTOPLD2(val) BSP_FLD32(val,0, 23)
341#define TMS570_CRC_BCTOPLD2_CRC_BCTOPLD2_GET(reg) BSP_FLD32GET(reg,0, 23)
342#define TMS570_CRC_BCTOPLD2_CRC_BCTOPLD2_SET(reg,val) BSP_FLD32SET(reg, val,0, 23)
379#define TMS570_CRC_BUS_SEL_MEn BSP_BIT32(2)
382#define TMS570_CRC_BUS_SEL_DTCMEn BSP_BIT32(1)
385#define TMS570_CRC_BUS_SEL_ITCMEn BSP_BIT32(0)
This header file provides utility macros for BSPs.