RTEMS 6.1-rc4
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uC5282 Board Support Package. More...
Files | |
file | bsp.h |
Global BSP definitions. | |
Data Structures | |
struct | bsp_mnode_t |
struct | mcf5282BufferDescriptor_ |
Macros | |
#define | RTEMS_MCF5282_BSP_ENABLE_DATA_CACHE |
#define | RTEMS_BSP_NETWORK_DRIVER_NAME "fs1" |
#define | RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_fec_driver_attach |
#define | CONSOLE_PORT 0 |
#define | RTEMS_BSP_PGM_ERASE_FIRST 0x1 |
#define | RTEMS_BSP_PGM_RESET_AFTER 0x2 |
#define | RTEMS_BSP_PGM_EXEC_AFTER 0x4 |
#define | RTEMS_BSP_PGM_HALT_AFTER 0x8 |
#define | FEC_IRQ_LEVEL 4 |
#define | FEC_IRQ_RX_PRIORITY 7 |
#define | FEC_IRQ_TX_PRIORITY 6 |
#define | PIT3_IRQ_LEVEL 4 |
#define | PIT3_IRQ_PRIORITY 0 |
#define | UART0_IRQ_LEVEL 3 |
#define | UART0_IRQ_PRIORITY 7 |
#define | UART1_IRQ_LEVEL 3 |
#define | UART1_IRQ_PRIORITY 6 |
#define | UART2_IRQ_LEVEL 3 |
#define | UART2_IRQ_PRIORITY 5 |
#define | VME_AM_STD_SUP_ASCENDING 0x3f |
#define | VME_AM_STD_SUP_PGM 0x3e |
#define | VME_AM_STD_USR_ASCENDING 0x3b |
#define | VME_AM_STD_USR_PGM 0x3a |
#define | VME_AM_STD_SUP_DATA 0x3d |
#define | VME_AM_STD_USR_DATA 0x39 |
#define | VME_AM_EXT_SUP_ASCENDING 0x0f |
#define | VME_AM_EXT_SUP_PGM 0x0e |
#define | VME_AM_EXT_USR_ASCENDING 0x0b |
#define | VME_AM_EXT_USR_PGM 0x0a |
#define | VME_AM_EXT_SUP_DATA 0x0d |
#define | VME_AM_EXT_USR_DATA 0x09 |
#define | VME_AM_SUP_SHORT_IO 0x2d |
#define | VME_AM_USR_SHORT_IO 0x29 |
#define | BSP_IDLE_TASK_BODY bsp_idle_thread |
Typedefs | |
typedef void(* | BSP_VME_ISR_t) (void *usrArg, unsigned long vector) |
typedef struct mcf5282BufferDescriptor_ | mcf5282BufferDescriptor_t |
Functions | |
int | rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching) |
uint32_t | bsp_get_CPU_clock_speed (void) |
rtems_status_code | bsp_allocate_interrupt (int level, int priority) |
int | bsp_sysReset (int flags) |
int | bsp_program (bsp_mnode_t *chain, int flags) |
unsigned const char * | bsp_gethwaddr (int a) |
const char * | bsp_getbenv (const char *a) |
int | bsp_flash_erase_range (volatile unsigned short *flashptr, int start, int end) |
int | bsp_flash_write_range (volatile unsigned short *flashptr, bsp_mnode_t *chain, int offset) |
rtems_isr_entry | set_vector (rtems_isr_entry handler, rtems_vector_number vector, int type) |
Install an interrupt handler. | |
rtems_status_code | bspExtInit (void) |
BSP_VME_ISR_t | BSP_getVME_isr (unsigned long vector, void **parg) |
int | BSP_installVME_isr (unsigned long vector, BSP_VME_ISR_t handler, void *usrArg) |
int | BSP_removeVME_isr (unsigned long vector, BSP_VME_ISR_t handler, void *usrArg) |
int | BSP_enableVME_int_lvl (unsigned int level) |
int | BSP_disableVME_int_lvl (unsigned int level) |
int | BSP_vme2local_adrs (unsigned am, unsigned long vmeaddr, unsigned long *plocaladdr) |
void * | bsp_idle_thread (uintptr_t ignored) |
Optimized idle task. | |
int | bsp_cpu_load_percentage (void) |
void | bsp_reset_cause (char *buf, size_t capacity) |
Variables | |
struct { | |
uint32_t idle_counter | |
uint32_t filtered_idle | |
uint32_t max_idle_count | |
uint32_t pitc_per_tick | |
uint32_t nsec_per_pitc | |
uint32_t pad [3] | |
mcf5282BufferDescriptor_t fec_descriptors [] | |
} | __SRAMBASE |
uC5282 Board Support Package.
#define CONSOLE_PORT 0 |
User Definable configuration
#define RTEMS_MCF5282_BSP_ENABLE_DATA_CACHE |
BSP Configuration
void * bsp_idle_thread | ( | uintptr_t | ignored | ) |
Optimized idle task.
This BSP provides its own IDLE thread to override the RTEMS one.
This idle task sets the power mode to idle. This causes the processor clock to be stopped, while on-chip peripherals remain active. Any enabled interrupt from a peripheral or an external interrupt source will cause the processor to resume execution.
To enable the idle task use the following in the system configuration:
This BSP provides its own IDLE thread to override the RTEMS one.
Optimized idle task.
The MSR[POW] bit is set to put the CPU into the low power mode defined in HID0. HID0 is set during starup in start.S.
This BSP provides its own IDLE thread to override the RTEMS one.
This idle task sets the power mode to idle. This causes the processor clock to be stopped, while on-chip peripherals remain active. Any enabled interrupt from a peripheral or an external interrupt source will cause the processor to resume execution.
To enable the idle task use the following in the system configuration:
Optimized idle task.
The MSR[POW] bit is set to put the CPU into the low power mode defined in HID0. HID0 is set during starup in start.S.
rtems_isr_entry set_vector | ( | rtems_isr_entry | handler, |
rtems_vector_number | vector, | ||
int | type | ||
) |
Install an interrupt handler.
This method installs an interrupt handle.
[in] | handler | is the isr routine |
[in] | vector | is the vector number |
[in] | type | indicates whether RTEMS or RAW intr |