RTEMS 6.1-rc4
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The Cache Manager provides functions to perform maintenance operations for data and instruction caches. More...
Functions | |
void | rtems_cache_flush_multiple_data_lines (const void *begin, size_t size) |
Flushes the data cache lines covering the memory area. | |
void | rtems_cache_invalidate_multiple_data_lines (const void *begin, size_t size) |
Invalidates the data cache lines covering the memory area. | |
void | rtems_cache_invalidate_multiple_instruction_lines (const void *begin, size_t size) |
Invalidates the instruction cache lines covering the memory area. | |
void | rtems_cache_instruction_sync_after_code_change (const void *begin, size_t size) |
Ensures necessary synchronization required after code changes. | |
size_t | rtems_cache_get_maximal_line_size (void) |
Gets the maximal cache line size in bytes of all caches (data, instruction, or unified). | |
size_t | rtems_cache_get_data_line_size (void) |
Gets the data cache line size in bytes. | |
size_t | rtems_cache_get_instruction_line_size (void) |
Gets the instruction cache line size in bytes. | |
size_t | rtems_cache_get_data_cache_size (uint32_t level) |
Gets the data cache size in bytes for the cache level. | |
size_t | rtems_cache_get_instruction_cache_size (uint32_t level) |
Gets the instruction cache size in bytes for the cache level. | |
void | rtems_cache_flush_entire_data (void) |
Flushes the entire data cache. | |
void | rtems_cache_invalidate_entire_data (void) |
Invalidates the entire data cache. | |
void | rtems_cache_invalidate_entire_instruction (void) |
Invalidates the entire instruction cache. | |
void | rtems_cache_enable_data (void) |
Enables the data cache. | |
void | rtems_cache_disable_data (void) |
Disables the data cache. | |
void | rtems_cache_enable_instruction (void) |
Enables the instruction cache. | |
void | rtems_cache_disable_instruction (void) |
Disables the instruction cache. | |
void * | rtems_cache_aligned_malloc (size_t size) |
Allocates memory from the C Program Heap which begins at a cache line boundary. | |
The Cache Manager provides functions to perform maintenance operations for data and instruction caches.
The actual actions of the Cache Manager operations depend on the hardware and the implementation provided by the CPU architecture port or a board support package. Cache implementations tend to be highly hardware dependent.
void * rtems_cache_aligned_malloc | ( | size_t | size | ) |
Allocates memory from the C Program Heap which begins at a cache line boundary.
size | is the size in bytes of the memory area to allocate. |
NULL | There is not enough memory available to satisfy the allocation request. |
The following constraints apply to this directive:
void rtems_cache_disable_data | ( | void | ) |
Disables the data cache.
The following constraints apply to this directive:
void rtems_cache_disable_instruction | ( | void | ) |
Disables the instruction cache.
The following constraints apply to this directive:
void rtems_cache_enable_data | ( | void | ) |
Enables the data cache.
The following constraints apply to this directive:
void rtems_cache_enable_instruction | ( | void | ) |
Enables the instruction cache.
The following constraints apply to this directive:
void rtems_cache_flush_entire_data | ( | void | ) |
Flushes the entire data cache.
The following constraints apply to this directive:
void rtems_cache_flush_multiple_data_lines | ( | const void * | begin, |
size_t | size | ||
) |
Flushes the data cache lines covering the memory area.
begin | is the begin address of the memory area to flush. |
size | is the size in bytes of the memory area to flush. |
Dirty data cache lines covering the area are transfered to memory. Depending on the cache implementation this may mark the lines as invalid.
The following constraints apply to this directive:
size_t rtems_cache_get_data_cache_size | ( | uint32_t | level | ) |
Gets the data cache size in bytes for the cache level.
level | is the requested data cache level. The cache level zero specifies the entire data cache. |
0 | There is no data cache present at the requested cache level. |
The following constraints apply to this directive:
size_t rtems_cache_get_data_line_size | ( | void | ) |
Gets the data cache line size in bytes.
0 | There is no data cache present. |
The following constraints apply to this directive:
size_t rtems_cache_get_instruction_cache_size | ( | uint32_t | level | ) |
Gets the instruction cache size in bytes for the cache level.
level | is the requested instruction cache level. The cache level zero specifies the entire instruction cache. |
0 | There is no instruction cache present at the requested cache level. |
The following constraints apply to this directive:
size_t rtems_cache_get_instruction_line_size | ( | void | ) |
Gets the instruction cache line size in bytes.
0 | There is no instruction cache present. |
The following constraints apply to this directive:
size_t rtems_cache_get_maximal_line_size | ( | void | ) |
Gets the maximal cache line size in bytes of all caches (data, instruction, or unified).
0 | There is no cache present. |
The following constraints apply to this directive:
void rtems_cache_instruction_sync_after_code_change | ( | const void * | begin, |
size_t | size | ||
) |
Ensures necessary synchronization required after code changes.
begin | is the begin address of the code area to synchronize. |
size | is the size in bytes of the code area to synchronize. |
The following constraints apply to this directive:
void rtems_cache_invalidate_entire_data | ( | void | ) |
Invalidates the entire data cache.
The following constraints apply to this directive:
void rtems_cache_invalidate_entire_instruction | ( | void | ) |
Invalidates the entire instruction cache.
The following constraints apply to this directive:
void rtems_cache_invalidate_multiple_data_lines | ( | const void * | begin, |
size_t | size | ||
) |
Invalidates the data cache lines covering the memory area.
begin | is the begin address of the memory area to invalidate. |
size | is the size in bytes of the memory area to invalidate. |
The cache lines covering the area are marked as invalid. A later read access in the area will load the data from memory.
In case the area is not aligned on cache line boundaries, then this operation may destroy unrelated data.
On some systems, the cache lines may be flushed before they are invalidated.
The following constraints apply to this directive:
void rtems_cache_invalidate_multiple_instruction_lines | ( | const void * | begin, |
size_t | size | ||
) |
Invalidates the instruction cache lines covering the memory area.
begin | is the begin address of the memory area to invalidate. |
size | is the size in bytes of the memory area to invalidate. |
The cache lines covering the area are marked as invalid. A later instruction fetch from the area will result in a load from memory.
The following constraints apply to this directive: