RTEMS 6.1-rc4
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arm.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/*
12 * COPYRIGHT (c) 2000 Canon Research Centre France SA.
13 * Emmanuel Raguet, mailto:raguet@crf.canon.fr
14 *
15 * Copyright (c) 2002 Advent Networks, Inc.
16 * Jay Monkman <jmonkman@adventnetworks.com>
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions
20 * are met:
21 * 1. Redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer.
23 * 2. Redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
28 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
31 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 *
39 */
40
41#ifndef _RTEMS_SCORE_ARM_H
42#define _RTEMS_SCORE_ARM_H
43
44#ifdef __cplusplus
45extern "C" {
46#endif
47
54#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
55 #define CPU_MODEL_NAME "ARMv7M"
56 #define ARM_MULTILIB_ARCH_V7M
57#elif defined(__ARM_ARCH_6M__)
58 #define CPU_MODEL_NAME "ARMv6M"
59 #define ARM_MULTILIB_ARCH_V6M
60#else
61 #define CPU_MODEL_NAME "ARMv4"
62 #define ARM_MULTILIB_ARCH_V4
63#endif
64
65#if __ARM_ARCH >= 7
66 #define ARM_MULTILIB_HAS_WFI
67 #define ARM_MULTILIB_HAS_LOAD_STORE_EXCLUSIVE
68 #define ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
69 #define ARM_MULTILIB_HAS_STORE_RETURN_STATE
70#endif
71
72#ifndef ARM_DISABLE_THREAD_ID_REGISTER_USE
73 #if defined(__ARM_ARCH_7A__) \
74 || defined(__ARM_ARCH_7R__) \
75 || __ARM_ARCH >= 8 \
76 || __ARM_ARCH == 6
77 #define ARM_MULTILIB_HAS_THREAD_ID_REGISTER
78 #endif
79#endif
80
81#if defined(__ARM_ARCH_7A__) || __ARM_ARCH >= 8
82 #define ARM_MULTILIB_CACHE_LINE_MAX_64
83#endif
84
85#if __ARM_ARCH >= 7
86 #define ARM_MULTILIB_HAS_CPACR
87#endif
88
89#if !defined(__SOFTFP__)
90 #if defined(__ARM_NEON__)
91 #define ARM_MULTILIB_VFP_D32
92 #elif defined(__VFP_FP__)
93 #define ARM_MULTILIB_VFP_D16
94 #else
95 #error "FPU support not implemented"
96 #endif
97#endif
98
99#if defined(ARM_MULTILIB_VFP_D16) \
100 || defined(ARM_MULTILIB_VFP_D32)
101 #define ARM_MULTILIB_VFP
102#endif
103
104/*
105 * Define the name of the CPU family.
106 */
107
108#define CPU_NAME "ARM"
109
112#ifdef __cplusplus
113}
114#endif
115
116#endif /* _RTEMS_SCORE_ARM_H */