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RTEMS 6.1-rc2
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48#define XNANDPSU_PKT_OFFSET 0x00U
49#define XNANDPSU_MEM_ADDR1_OFFSET 0x04U
51#define XNANDPSU_MEM_ADDR2_OFFSET 0x08U
53#define XNANDPSU_CMD_OFFSET 0x0CU
54#define XNANDPSU_PROG_OFFSET 0x10U
55#define XNANDPSU_INTR_STS_EN_OFFSET 0x14U
57#define XNANDPSU_INTR_SIG_EN_OFFSET 0x18U
59#define XNANDPSU_INTR_STS_OFFSET 0x1CU
61#define XNANDPSU_READY_BUSY_OFFSET 0x20U
63#define XNANDPSU_FLASH_STS_OFFSET 0x28U
64#define XNANDPSU_TIMING_OFFSET 0x2CU
65#define XNANDPSU_BUF_DATA_PORT_OFFSET 0x30U
67#define XNANDPSU_ECC_OFFSET 0x34U
68#define XNANDPSU_ECC_ERR_CNT_OFFSET 0x38U
70#define XNANDPSU_ECC_SPR_CMD_OFFSET 0x3CU
72#define XNANDPSU_ECC_CNT_1BIT_OFFSET 0x40U
74#define XNANDPSU_ECC_CNT_2BIT_OFFSET 0x44U
76#define XNANDPSU_ECC_CNT_3BIT_OFFSET 0x48U
78#define XNANDPSU_ECC_CNT_4BIT_OFFSET 0x4CU
80#define XNANDPSU_CPU_REL_OFFSET 0x58U
81#define XNANDPSU_ECC_CNT_5BIT_OFFSET 0x5CU
83#define XNANDPSU_ECC_CNT_6BIT_OFFSET 0x60U
85#define XNANDPSU_ECC_CNT_7BIT_OFFSET 0x64U
87#define XNANDPSU_ECC_CNT_8BIT_OFFSET 0x68U
89#define XNANDPSU_DATA_INTF_OFFSET 0x6CU
90#define XNANDPSU_DMA_SYS_ADDR0_OFFSET 0x50U
92#define XNANDPSU_DMA_SYS_ADDR1_OFFSET 0x24U
94#define XNANDPSU_DMA_BUF_BND_OFFSET 0x54U
96#define XNANDPSU_SLV_DMA_CONF_OFFSET 0x80U
102#define XNANDPSU_PKT_PKT_SIZE_MASK 0x000007FFU
103#define XNANDPSU_PKT_PKT_CNT_MASK 0x00FFF000U
104#define XNANDPSU_PKT_PKT_CNT_SHIFT 12U
110#define XNANDPSU_MEM_ADDR1_COL_ADDR_MASK 0x0000FFFFU
112#define XNANDPSU_MEM_ADDR1_PG_ADDR_MASK 0xFFFF0000U
114#define XNANDPSU_MEM_ADDR1_PG_ADDR_SHIFT 16U
120#define XNANDPSU_MEM_ADDR2_MEM_ADDR_MASK 0x000000FFU
122#define XNANDPSU_MEM_ADDR2_BUS_WIDTH_MASK 0x01000000U
123#define XNANDPSU_MEM_ADDR2_NFC_BCH_MODE_MASK 0x0E000000U
125#define XNANDPSU_MEM_ADDR2_MODE_MASK 0x30000000U
127#define XNANDPSU_MEM_ADDR2_CHIP_SEL_MASK 0xC0000000U
128#define XNANDPSU_MEM_ADDR2_CHIP_SEL_SHIFT 30U
130#define XNANDPSU_MEM_ADDR2_BUS_WIDTH_SHIFT 24U
131#define XNANDPSU_MEM_ADDR2_NFC_BCH_MODE_SHIFT 25U
137#define XNANDPSU_CMD_CMD1_MASK 0x000000FFU
139#define XNANDPSU_CMD_CMD2_MASK 0x0000FF00U
141#define XNANDPSU_CMD_PG_SIZE_MASK 0x03800000U
142#define XNANDPSU_CMD_DMA_EN_MASK 0x0C000000U
144#define XNANDPSU_CMD_ADDR_CYCLES_MASK 0x70000000U
146#define XNANDPSU_CMD_ECC_ON_MASK 0x80000000U
147#define XNANDPSU_CMD_CMD2_SHIFT 8U
149#define XNANDPSU_CMD_PG_SIZE_SHIFT 23U
150#define XNANDPSU_CMD_DMA_EN_SHIFT 26U
151#define XNANDPSU_CMD_ADDR_CYCLES_SHIFT 28U
153#define XNANDPSU_CMD_ECC_ON_SHIFT 31U
159#define XNANDPSU_PROG_RD_MASK 0x00000001U
160#define XNANDPSU_PROG_MUL_DIE_MASK 0x00000002U
161#define XNANDPSU_PROG_BLK_ERASE_MASK 0x00000004U
162#define XNANDPSU_PROG_RD_STS_MASK 0x00000008U
163#define XNANDPSU_PROG_PG_PROG_MASK 0x00000010U
164#define XNANDPSU_PROG_MUL_DIE_RD_MASK 0x00000020U
165#define XNANDPSU_PROG_RD_ID_MASK 0x00000040U
166#define XNANDPSU_PROG_RD_PRM_PG_MASK 0x00000080U
168#define XNANDPSU_PROG_RST_MASK 0x00000100U
169#define XNANDPSU_PROG_GET_FEATURES_MASK 0x00000200U
170#define XNANDPSU_PROG_SET_FEATURES_MASK 0x00000400U
171#define XNANDPSU_PROG_RD_UNQ_ID_MASK 0x00000800U
173#define XNANDPSU_PROG_RD_STS_ENH_MASK 0x00001000U
175#define XNANDPSU_PROG_RD_INTRLVD_MASK 0x00002000U
177#define XNANDPSU_PROG_CHNG_RD_COL_ENH_MASK 0x00004000U
180#define XNANDPSU_PROG_COPY_BACK_INTRLVD_MASK 0x00008000U
182#define XNANDPSU_PROG_RD_CACHE_START_MASK 0x00010000U
184#define XNANDPSU_PROG_RD_CACHE_SEQ_MASK 0x00020000U
186#define XNANDPSU_PROG_RD_CACHE_RAND_MASK 0x00040000U
188#define XNANDPSU_PROG_RD_CACHE_END_MASK 0x00080000U
190#define XNANDPSU_PROG_SMALL_DATA_MOVE_MASK 0x00100000U
192#define XNANDPSU_PROG_CHNG_ROW_ADDR_MASK 0x00200000U
194#define XNANDPSU_PROG_CHNG_ROW_ADDR_END_MASK 0x00400000U
196#define XNANDPSU_PROG_RST_LUN_MASK 0x00800000U
197#define XNANDPSU_PROG_PGM_PG_CLR_MASK 0x01000000U
200#define XNANDPSU_PROG_VOL_SEL_MASK 0x02000000U
201#define XNANDPSU_PROG_ODT_CONF_MASK 0x04000000U
207#define XNANDPSU_INTR_STS_EN_BUFF_WR_RDY_STS_EN_MASK 0x00000001U
211#define XNANDPSU_INTR_STS_EN_BUFF_RD_RDY_STS_EN_MASK 0x00000002U
215#define XNANDPSU_INTR_STS_EN_TRANS_COMP_STS_EN_MASK 0x00000004U
219#define XNANDPSU_INTR_STS_EN_MUL_BIT_ERR_STS_EN_MASK 0x00000008U
223#define XNANDPSU_INTR_STS_EN_ERR_INTR_STS_EN_MASK 0x00000010U
231#define XNANDPSU_INTR_STS_EN_DMA_INT_STS_EN_MASK 0x00000040U
234#define XNANDPSU_INTR_STS_EN_ERR_AHB_STS_EN_MASK 0x00000080U
242#define XNANDPSU_INTR_SIG_EN_BUFF_WR_RDY_STS_EN_MASK 0x00000001U
246#define XNANDPSU_INTR_SIG_EN_BUFF_RD_RDY_STS_EN_MASK 0x00000002U
250#define XNANDPSU_INTR_SIG_EN_TRANS_COMP_STS_EN_MASK 0x00000004U
254#define XNANDPSU_INTR_SIG_EN_MUL_BIT_ERR_STS_EN_MASK 0x00000008U
258#define XNANDPSU_INTR_SIG_EN_ERR_INTR_STS_EN_MASK 0x00000010U
266#define XNANDPSU_INTR_SIG_EN_DMA_INT_STS_EN_MASK 0x00000040U
269#define XNANDPSU_INTR_SIG_EN_ERR_AHB_STS_EN_MASK 0x00000080U
277#define XNANDPSU_INTR_STS_BUFF_WR_RDY_STS_EN_MASK 0x00000001U
280#define XNANDPSU_INTR_STS_BUFF_RD_RDY_STS_EN_MASK 0x00000002U
283#define XNANDPSU_INTR_STS_TRANS_COMP_STS_EN_MASK 0x00000004U
285#define XNANDPSU_INTR_STS_MUL_BIT_ERR_STS_EN_MASK 0x00000008U
287#define XNANDPSU_INTR_STS_ERR_INTR_STS_EN_MASK 0x00000010U
291#define XNANDPSU_INTR_STS_DMA_INT_STS_EN_MASK 0x00000040U
294#define XNANDPSU_INTR_STS_ERR_AHB_STS_EN_MASK 0x00000080U
301#define XNANDPSU_INTR_BUFF_WR_RDY_STS_EN_MASK 0x00000001U
304#define XNANDPSU_INTR_BUFF_RD_RDY_STS_EN_MASK 0x00000002U
307#define XNANDPSU_INTR_TRANS_COMP_STS_EN_MASK 0x00000004U
310#define XNANDPSU_INTR_MUL_BIT_ERR_STS_EN_MASK 0x00000008U
312#define XNANDPSU_INTR_ERR_INTR_STS_EN_MASK 0x00000010U
316#define XNANDPSU_INTR_DMA_INT_STS_EN_MASK 0x00000040U
318#define XNANDPSU_INTR_ERR_AHB_STS_EN_MASK 0x00000080U
325#define XNANDPSU_ID2_DEVICE_ID2_MASK 0x000000FFU
331#define XNANDPSU_FLASH_STS_FLASH_STS_MASK 0x0000FFFFU
338#define XNANDPSU_TIMING_TCCS_TIME_MASK 0x00000003U
340#define XNANDPSU_TIMING_SLOW_FAST_TCAD_MASK 0x00000004U
342#define XNANDPSU_TIMING_DQS_BUFF_SEL_MASK 0x00000078U
345#define XNANDPSU_TIMING_TADL_TIME_MASK 0x00007F80U
353#define XNANDPSU_ECC_ADDR_MASK 0x0000FFFFU
354#define XNANDPSU_ECC_SIZE_MASK 0x01FF0000U
355#define XNANDPSU_ECC_HAMMING_BCH_MASK 0x02000000U
362#define XNANDPSU_ECC_ERR_CNT_PKT_BND_ERR_CNT_MASK 0x000000FFU
365#define XNANDPSU_ECC_ERR_CNT_PG_BND_ERR_CNT_MASK 0x0000FF00U
373#define XNANDPSU_ECC_SPR_CMD_SPR_CMD_MASK 0x000000FFU
376#define XNANDPSU_ECC_SPR_CMD_ECC_ADDR_CYCLES_MASK 0x70000000U
386#define XNANDPSU_DATA_INTF_SDR_MASK 0x00000007U
387#define XNANDPSU_DATA_INTF_NVDDR_MASK 0x00000038U
388#define XNANDPSU_DATA_INTF_NVDDR2_MASK 0x000001C0U
389#define XNANDPSU_DATA_INTF_DATA_INTF_MASK 0x00000600U
391#define XNANDPSU_DATA_INTF_NVDDR_SHIFT 3U
392#define XNANDPSU_DATA_INTF_DATA_INTF_SHIFT 9U
398#define XNANDPSU_DMA_BUF_BND_BND_MASK 0x00000007U
400#define XNANDPSU_DMA_BUF_BND_4K 0x0U
401#define XNANDPSU_DMA_BUF_BND_8K 0x1U
402#define XNANDPSU_DMA_BUF_BND_16K 0x2U
403#define XNANDPSU_DMA_BUF_BND_32K 0x3U
404#define XNANDPSU_DMA_BUF_BND_64K 0x4U
405#define XNANDPSU_DMA_BUF_BND_128K 0x5U
406#define XNANDPSU_DMA_BUF_BND_256K 0x6U
407#define XNANDPSU_DMA_BUF_BND_512K 0x7U
413#define XNANDPSU_SLV_DMA_CONF_SDMA_TX_RX_MASK 0x00000001U
418#define XNANDPSU_SLV_DMA_CONF_DMA_TRANS_CNT_MASK 0x001FFFFEU
422#define XNANDPSU_SLV_DMA_CONF_DMA_BURST_SIZE_MASK 0x00E00000U
426#define XNANDPSU_SLV_DMA_CONF_DMA_TMOUT_CNT_VAL_MASK 0x0F000000U
430#define XNANDPSU_SLV_DMA_CONF_SDMA_EN_MASK 0x10000000U
453#define XNandPsu_ReadReg(BaseAddress, RegOffset) \
454 Xil_In32((BaseAddress) + (RegOffset))
471#define XNandPsu_WriteReg(BaseAddress, RegOffset, Data) \
472 Xil_Out32(((BaseAddress) + (RegOffset)), (Data))