RTEMS 6.1-rc2
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l4stat-regs.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/*
12 * Copyright (C) 2021 embedded brains GmbH & Co. KG
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 */
35
36/*
37 * This file is part of the RTEMS quality process and was automatically
38 * generated. If you find something that needs to be fixed or
39 * worded better please post a report or patch to an RTEMS mailing list
40 * or raise a bug report:
41 *
42 * https://www.rtems.org/bugs.html
43 *
44 * For information on updating and regenerating please refer to the How-To
45 * section in the Software Requirements Engineering chapter of the
46 * RTEMS Software Engineering manual. The manual is provided as a part of
47 * a release. For development sources please refer to the online
48 * documentation at:
49 *
50 * https://docs.rtems.org
51 */
52
53/* Generated from spec:/dev/grlib/if/l4stat-header */
54
55#ifndef _GRLIB_L4STAT_REGS_H
56#define _GRLIB_L4STAT_REGS_H
57
58#include <stdint.h>
59
60#ifdef __cplusplus
61extern "C" {
62#endif
63
64/* Generated from spec:/dev/grlib/if/l4stat */
65
84#define L4STAT_CVAL_CVAL_SHIFT 0
85#define L4STAT_CVAL_CVAL_MASK 0xffffffffU
86#define L4STAT_CVAL_CVAL_GET( _reg ) \
87 ( ( ( _reg ) & L4STAT_CVAL_CVAL_MASK ) >> \
88 L4STAT_CVAL_CVAL_SHIFT )
89#define L4STAT_CVAL_CVAL_SET( _reg, _val ) \
90 ( ( ( _reg ) & ~L4STAT_CVAL_CVAL_MASK ) | \
91 ( ( ( _val ) << L4STAT_CVAL_CVAL_SHIFT ) & \
92 L4STAT_CVAL_CVAL_MASK ) )
93#define L4STAT_CVAL_CVAL( _val ) \
94 ( ( ( _val ) << L4STAT_CVAL_CVAL_SHIFT ) & \
95 L4STAT_CVAL_CVAL_MASK )
96
107#define L4STAT_CCTRL_NCPU_SHIFT 28
108#define L4STAT_CCTRL_NCPU_MASK 0xf0000000U
109#define L4STAT_CCTRL_NCPU_GET( _reg ) \
110 ( ( ( _reg ) & L4STAT_CCTRL_NCPU_MASK ) >> \
111 L4STAT_CCTRL_NCPU_SHIFT )
112#define L4STAT_CCTRL_NCPU_SET( _reg, _val ) \
113 ( ( ( _reg ) & ~L4STAT_CCTRL_NCPU_MASK ) | \
114 ( ( ( _val ) << L4STAT_CCTRL_NCPU_SHIFT ) & \
115 L4STAT_CCTRL_NCPU_MASK ) )
116#define L4STAT_CCTRL_NCPU( _val ) \
117 ( ( ( _val ) << L4STAT_CCTRL_NCPU_SHIFT ) & \
118 L4STAT_CCTRL_NCPU_MASK )
119
120#define L4STAT_CCTRL_NCNT_SHIFT 23
121#define L4STAT_CCTRL_NCNT_MASK 0xf800000U
122#define L4STAT_CCTRL_NCNT_GET( _reg ) \
123 ( ( ( _reg ) & L4STAT_CCTRL_NCNT_MASK ) >> \
124 L4STAT_CCTRL_NCNT_SHIFT )
125#define L4STAT_CCTRL_NCNT_SET( _reg, _val ) \
126 ( ( ( _reg ) & ~L4STAT_CCTRL_NCNT_MASK ) | \
127 ( ( ( _val ) << L4STAT_CCTRL_NCNT_SHIFT ) & \
128 L4STAT_CCTRL_NCNT_MASK ) )
129#define L4STAT_CCTRL_NCNT( _val ) \
130 ( ( ( _val ) << L4STAT_CCTRL_NCNT_SHIFT ) & \
131 L4STAT_CCTRL_NCNT_MASK )
132
133#define L4STAT_CCTRL_MC 0x400000U
134
135#define L4STAT_CCTRL_IA 0x200000U
136
137#define L4STAT_CCTRL_DS 0x100000U
138
139#define L4STAT_CCTRL_EE 0x80000U
140
141#define L4STAT_CCTRL_AE 0x40000U
142
143#define L4STAT_CCTRL_EL 0x20000U
144
145#define L4STAT_CCTRL_CD 0x10000U
146
147#define L4STAT_CCTRL_SU_SHIFT 14
148#define L4STAT_CCTRL_SU_MASK 0xc000U
149#define L4STAT_CCTRL_SU_GET( _reg ) \
150 ( ( ( _reg ) & L4STAT_CCTRL_SU_MASK ) >> \
151 L4STAT_CCTRL_SU_SHIFT )
152#define L4STAT_CCTRL_SU_SET( _reg, _val ) \
153 ( ( ( _reg ) & ~L4STAT_CCTRL_SU_MASK ) | \
154 ( ( ( _val ) << L4STAT_CCTRL_SU_SHIFT ) & \
155 L4STAT_CCTRL_SU_MASK ) )
156#define L4STAT_CCTRL_SU( _val ) \
157 ( ( ( _val ) << L4STAT_CCTRL_SU_SHIFT ) & \
158 L4STAT_CCTRL_SU_MASK )
159
160#define L4STAT_CCTRL_CL 0x2000U
161
162#define L4STAT_CCTRL_EN 0x1000U
163
164#define L4STAT_CCTRL_EVENT_ID_SHIFT 4
165#define L4STAT_CCTRL_EVENT_ID_MASK 0xff0U
166#define L4STAT_CCTRL_EVENT_ID_GET( _reg ) \
167 ( ( ( _reg ) & L4STAT_CCTRL_EVENT_ID_MASK ) >> \
168 L4STAT_CCTRL_EVENT_ID_SHIFT )
169#define L4STAT_CCTRL_EVENT_ID_SET( _reg, _val ) \
170 ( ( ( _reg ) & ~L4STAT_CCTRL_EVENT_ID_MASK ) | \
171 ( ( ( _val ) << L4STAT_CCTRL_EVENT_ID_SHIFT ) & \
172 L4STAT_CCTRL_EVENT_ID_MASK ) )
173#define L4STAT_CCTRL_EVENT_ID( _val ) \
174 ( ( ( _val ) << L4STAT_CCTRL_EVENT_ID_SHIFT ) & \
175 L4STAT_CCTRL_EVENT_ID_MASK )
176
177#define L4STAT_CCTRL_CPU_AHBM_SHIFT 0
178#define L4STAT_CCTRL_CPU_AHBM_MASK 0xfU
179#define L4STAT_CCTRL_CPU_AHBM_GET( _reg ) \
180 ( ( ( _reg ) & L4STAT_CCTRL_CPU_AHBM_MASK ) >> \
181 L4STAT_CCTRL_CPU_AHBM_SHIFT )
182#define L4STAT_CCTRL_CPU_AHBM_SET( _reg, _val ) \
183 ( ( ( _reg ) & ~L4STAT_CCTRL_CPU_AHBM_MASK ) | \
184 ( ( ( _val ) << L4STAT_CCTRL_CPU_AHBM_SHIFT ) & \
185 L4STAT_CCTRL_CPU_AHBM_MASK ) )
186#define L4STAT_CCTRL_CPU_AHBM( _val ) \
187 ( ( ( _val ) << L4STAT_CCTRL_CPU_AHBM_SHIFT ) & \
188 L4STAT_CCTRL_CPU_AHBM_MASK )
189
201#define L4STAT_CSVAL_CSVAL_SHIFT 0
202#define L4STAT_CSVAL_CSVAL_MASK 0xffffffffU
203#define L4STAT_CSVAL_CSVAL_GET( _reg ) \
204 ( ( ( _reg ) & L4STAT_CSVAL_CSVAL_MASK ) >> \
205 L4STAT_CSVAL_CSVAL_SHIFT )
206#define L4STAT_CSVAL_CSVAL_SET( _reg, _val ) \
207 ( ( ( _reg ) & ~L4STAT_CSVAL_CSVAL_MASK ) | \
208 ( ( ( _val ) << L4STAT_CSVAL_CSVAL_SHIFT ) & \
209 L4STAT_CSVAL_CSVAL_MASK ) )
210#define L4STAT_CSVAL_CSVAL( _val ) \
211 ( ( ( _val ) << L4STAT_CSVAL_CSVAL_SHIFT ) & \
212 L4STAT_CSVAL_CSVAL_MASK )
213
224#define L4STAT_TSTAMP_TSTAMP_SHIFT 0
225#define L4STAT_TSTAMP_TSTAMP_MASK 0xffffffffU
226#define L4STAT_TSTAMP_TSTAMP_GET( _reg ) \
227 ( ( ( _reg ) & L4STAT_TSTAMP_TSTAMP_MASK ) >> \
228 L4STAT_TSTAMP_TSTAMP_SHIFT )
229#define L4STAT_TSTAMP_TSTAMP_SET( _reg, _val ) \
230 ( ( ( _reg ) & ~L4STAT_TSTAMP_TSTAMP_MASK ) | \
231 ( ( ( _val ) << L4STAT_TSTAMP_TSTAMP_SHIFT ) & \
232 L4STAT_TSTAMP_TSTAMP_MASK ) )
233#define L4STAT_TSTAMP_TSTAMP( _val ) \
234 ( ( ( _val ) << L4STAT_TSTAMP_TSTAMP_SHIFT ) & \
235 L4STAT_TSTAMP_TSTAMP_MASK )
236
242typedef struct l4stat {
246 uint32_t cval_0;
247
248 uint32_t reserved_4_3c[ 14 ];
249
253 uint32_t cval_1;
254
255 uint32_t reserved_40_80[ 16 ];
256
260 uint32_t cctrl_0;
261
262 uint32_t reserved_84_cc[ 18 ];
263
267 uint32_t cctrl_1;
268
269 uint32_t reserved_d0_100[ 12 ];
270
274 uint32_t csval_0;
275
276 uint32_t reserved_104_13c[ 14 ];
277
281 uint32_t csval_1;
282
283 uint32_t reserved_140_180[ 16 ];
284
288 uint32_t tstamp;
290
293#ifdef __cplusplus
294}
295#endif
296
297#endif /* _GRLIB_L4STAT_REGS_H */
This structure defines the L4STAT register block memory map.
Definition: l4stat-regs.h:242
uint32_t csval_0
See Counter 0-15 max/latch register (CSVAL).
Definition: l4stat-regs.h:274
uint32_t cctrl_0
See Counter 0-15 control register (CCTRL).
Definition: l4stat-regs.h:260
uint32_t csval_1
See Counter 0-15 max/latch register (CSVAL).
Definition: l4stat-regs.h:281
uint32_t cctrl_1
See Counter 0-15 control register (CCTRL).
Definition: l4stat-regs.h:267
uint32_t cval_1
See Counter 0-15 value register (CVAL).
Definition: l4stat-regs.h:253
uint32_t cval_0
See Counter 0-15 value register (CVAL).
Definition: l4stat-regs.h:246
uint32_t tstamp
See Timestamp register (TSTAMP).
Definition: l4stat-regs.h:288