RTEMS 6.1-rc2
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irq-generic.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
12/*
13 * Copyright (C) 2016 Chris Johns <chrisj@rtems.org>
14 *
15 * Copyright (C) 2008, 2021 embedded brains GmbH & Co. KG
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions
19 * are met:
20 * 1. Redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer.
22 * 2. Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
30 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39/*
40 * The API is based on concepts of Pavel Pisa, Till Straumann and Eric Valette.
41 */
42
43#ifndef LIBBSP_SHARED_IRQ_GENERIC_H
44#define LIBBSP_SHARED_IRQ_GENERIC_H
45
46#include <stdbool.h>
47
48#include <rtems/irq-extension.h>
49#include <rtems/score/assert.h>
50
51#ifdef RTEMS_SMP
52 #include <rtems/score/atomic.h>
53#endif
54
55#include <bsp/irq.h>
56
57#ifdef __cplusplus
58extern "C" {
59#endif /* __cplusplus */
60
61#if !defined(BSP_INTERRUPT_VECTOR_COUNT)
62 #error "BSP_INTERRUPT_VECTOR_COUNT shall be defined"
63#endif
64
65#if defined(BSP_INTERRUPT_USE_INDEX_TABLE) && !defined(BSP_INTERRUPT_DISPATCH_TABLE_SIZE)
66 #error "if you define BSP_INTERRUPT_USE_INDEX_TABLE, you have to define BSP_INTERRUPT_DISPATCH_TABLE_SIZE etc. as well"
67#endif
68
69#ifndef BSP_INTERRUPT_DISPATCH_TABLE_SIZE
70 #define BSP_INTERRUPT_DISPATCH_TABLE_SIZE BSP_INTERRUPT_VECTOR_COUNT
71#endif
72
73#define bsp_interrupt_assert(e) _Assert(e)
74
80
81#ifdef BSP_INTERRUPT_USE_INDEX_TABLE
82 #if BSP_INTERRUPT_DISPATCH_TABLE_SIZE < 0x100
83 typedef uint8_t bsp_interrupt_dispatch_index_type;
84 #elif BSP_INTERRUPT_DISPATCH_TABLE_SIZE < 0x10000
85 typedef uint16_t bsp_interrupt_dispatch_index_type;
86 #else
87 typedef uint32_t bsp_interrupt_dispatch_index_type;
88 #endif
89 extern bsp_interrupt_dispatch_index_type bsp_interrupt_dispatch_index_table [];
90#endif
91
92static inline rtems_vector_number bsp_interrupt_dispatch_index(
94)
95{
96 #ifdef BSP_INTERRUPT_USE_INDEX_TABLE
97 return bsp_interrupt_dispatch_index_table [vector];
98 #else
99 return vector;
100 #endif
101}
102
153#ifdef BSP_INTERRUPT_CUSTOM_VALID_VECTOR
154 bool bsp_interrupt_is_valid_vector(rtems_vector_number vector);
155#else
160 static inline bool bsp_interrupt_is_valid_vector(rtems_vector_number vector)
161 {
162 return vector < (rtems_vector_number) BSP_INTERRUPT_VECTOR_COUNT;
163 }
164#endif
165
176
189void bsp_interrupt_initialize(void);
190
205
219 rtems_vector_number vector,
221);
222
242 rtems_vector_number vector,
243 bool *enabled
244);
245
268
292
315 rtems_vector_number vector,
316 bool *pending
317);
318
334
335#if defined(RTEMS_SMP)
353rtems_status_code bsp_interrupt_raise_on(
354 rtems_vector_number vector,
355 uint32_t cpu_index
356);
357#endif
358
374
375#if defined(RTEMS_SMP)
381void bsp_interrupt_spurious( rtems_vector_number vector );
382#endif
383
391static inline rtems_interrupt_entry *bsp_interrupt_entry_load_acquire(
392 rtems_interrupt_entry * const *ptr
393)
394{
395#if defined(RTEMS_SMP)
396 return (rtems_interrupt_entry *) _Atomic_Load_uintptr(
397 (const Atomic_Uintptr *) ptr,
398 ATOMIC_ORDER_ACQUIRE
399 );
400#else
401 return *ptr;
402#endif
403}
404
412static inline void bsp_interrupt_entry_store_release(
415)
416{
417#if defined(RTEMS_SMP)
418 _Atomic_Store_uintptr(
419 (Atomic_Uintptr *) ptr,
420 (Atomic_Uintptr) value,
421 ATOMIC_ORDER_RELEASE
422 );
423#else
425
427 *ptr = value;
429#endif
430}
431
439static inline rtems_interrupt_entry *bsp_interrupt_entry_load_first(
441)
442{
444
445 index = bsp_interrupt_dispatch_index( vector );
446
447 return bsp_interrupt_entry_load_acquire(
449 );
450}
451
463static inline void bsp_interrupt_dispatch_entries(
465)
466{
467 do {
468 ( *entry->handler )( entry->arg );
469 entry = bsp_interrupt_entry_load_acquire( &entry->next );
470 } while ( RTEMS_PREDICT_FALSE( entry != NULL ) );
471}
472
489static inline void bsp_interrupt_handler_dispatch_unlikely(
491)
492{
494
495 entry = bsp_interrupt_entry_load_first( vector );
496
497 if ( RTEMS_PREDICT_FALSE( entry != NULL ) ) {
498 bsp_interrupt_dispatch_entries( entry );
499 }
500}
501
515static inline void bsp_interrupt_handler_dispatch_unchecked(
517)
518{
520
521 entry = bsp_interrupt_entry_load_first( vector );
522
523 if ( RTEMS_PREDICT_TRUE( entry != NULL ) ) {
524 bsp_interrupt_dispatch_entries( entry );
525 } else {
526#if defined(RTEMS_SMP)
527 bsp_interrupt_spurious( vector );
528#else
530#endif
531 }
532}
533
548static inline void bsp_interrupt_handler_dispatch( rtems_vector_number vector )
549{
550 if ( bsp_interrupt_is_valid_vector( vector ) ) {
551 bsp_interrupt_handler_dispatch_unchecked( vector );
552 } else {
554 }
555}
556
565void bsp_interrupt_lock(void);
566
572void bsp_interrupt_unlock(void);
573
595 rtems_vector_number vector,
597);
598
599/* For internal use only */
600rtems_interrupt_entry *bsp_interrupt_entry_find(
601 rtems_vector_number vector,
603 void *arg,
604 rtems_interrupt_entry ***previous_next
605);
606
607/* For internal use only */
608void bsp_interrupt_entry_remove(
609 rtems_vector_number vector,
611 rtems_interrupt_entry **previous_next
612);
613
624
634static inline bool bsp_interrupt_is_handler_unique( rtems_vector_number index )
635{
636 rtems_vector_number table_index;
637 uint8_t bit;
638
639 table_index = index / 8;
640 bit = (uint8_t) ( 1U << ( index % 8 ) );
641
642 return ( bsp_interrupt_handler_unique_table[ table_index ] & bit ) != 0;
643}
644
652static inline void bsp_interrupt_set_handler_unique(
654 bool unique
655)
656{
657 rtems_vector_number table_index;
658 uint8_t bit;
659
660 table_index = index / 8;
661 bit = (uint8_t) ( 1U << ( index % 8 ) );
662
663 if (unique) {
664 bsp_interrupt_handler_unique_table[ table_index ] |= bit;
665 } else {
666 bsp_interrupt_handler_unique_table[ table_index ] &= ~bit;
667 }
668}
669
676static inline bool bsp_interrupt_is_initialized( void )
677{
678 return bsp_interrupt_is_handler_unique( BSP_INTERRUPT_DISPATCH_TABLE_SIZE );
679}
680
690);
691
692#ifdef __cplusplus
693}
694#endif /* __cplusplus */
695
696#endif /* LIBBSP_SHARED_IRQ_GENERIC_H */
This header file provides the interfaces of the Assert Handler.
#define RTEMS_PREDICT_FALSE(_exp)
Evaluates the integral expression and tells the compiler that the predicted value is false (0).
Definition: basedefs.h:732
#define RTEMS_PREDICT_TRUE(_exp)
Evaluates the integral expression and tells the compiler that the predicted value is true (1).
Definition: basedefs.h:751
ISR_Vector_number rtems_vector_number
This integer type represents interrupt vector numbers.
Definition: intr.h:102
#define rtems_interrupt_local_disable(_isr_cookie)
Disables the maskable interrupts on the current processor.
Definition: intr.h:427
ISR_Level rtems_interrupt_level
This integer type represents interrupt levels.
Definition: intr.h:111
void(* rtems_interrupt_handler)(void *)
Interrupt handler routines shall have this type.
Definition: intr.h:965
#define rtems_interrupt_local_enable(_isr_cookie)
Restores the previous interrupt level on the current processor.
Definition: intr.h:468
rtems_status_code
This enumeration provides status codes for directives of the Classic API.
Definition: status.h:85
rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
Disables the interrupt vector.
Definition: irq.c:153
rtems_status_code bsp_interrupt_vector_is_enabled(rtems_vector_number vector, bool *enabled)
Checks if the interrupt is enabled.
Definition: irq.c:129
void bsp_interrupt_handler_default(rtems_vector_number vector)
Default interrupt handler.
Definition: irq.c:210
rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
Enables the interrupt vector.
Definition: irq.c:140
void bsp_interrupt_facility_initialize(void)
BSP specific initialization.
Definition: irq.c:166
rtems_status_code bsp_interrupt_raise(rtems_vector_number vector)
Causes the interrupt vector.
Definition: irq.c:117
rtems_status_code bsp_interrupt_is_pending(rtems_vector_number vector, bool *pending)
Checks if the interrupt is pending.
Definition: irq.c:106
rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
Clears the interrupt vector.
Definition: irq.c:123
rtems_status_code bsp_interrupt_get_attributes(rtems_vector_number vector, rtems_interrupt_attributes *attributes)
Gets the attributes of the interrupt vector.
Definition: irq.c:98
void bsp_interrupt_initialize(void)
Initialize Interrupt Manager implementation.
Definition: irq-generic.c:163
#define NULL
Requests a GPIO pin group configuration.
Definition: xil_types.h:54
This header file provides the interfaces of the Atomic Operations.
This header file is provided for backward compatiblility.
uint8_t bsp_interrupt_handler_unique_table[]
This table contains a bit map which indicates if an entry is unique or shared.
Definition: irq-generic.c:58
rtems_interrupt_entry ** bsp_interrupt_get_dispatch_table_slot(rtems_vector_number index)
Gets a reference to the interrupt handler table slot associated with the index.
Definition: irq-generic.c:49
rtems_interrupt_entry * bsp_interrupt_dispatch_table[]
Each member of this table references the first installed entry at the corresponding interrupt vector ...
Definition: irq-generic.c:47
void bsp_interrupt_lock(void)
Acquires the interrupt support lock.
Definition: irq-lock.c:42
void bsp_interrupt_unlock(void)
Releases the interrupt support lock.
Definition: irq-lock.c:49
rtems_status_code bsp_interrupt_check_and_lock(rtems_vector_number vector, rtems_interrupt_handler handler)
Checks the vector and routine. When the checks were successful, the interrupt support lock will be ob...
Definition: irq-generic.c:110
Definition: mmu-config.c:53
This structure provides the attributes of an interrupt vector.
Definition: intr.h:1857
This structure represents an interrupt entry.
Definition: intr.h:1005