WDOG Peripheral Access Layer

Modules
	WDOG Register Masks

Data Structures
struct	WDOG_Type

Macros
#define	WDOG1_BASE   (0x400B8000u)
#define	WDOG1   ((WDOG_Type *)WDOG1_BASE)
#define	WDOG2_BASE   (0x400D0000u)
#define	WDOG2   ((WDOG_Type *)WDOG2_BASE)
#define	WDOG_BASE_ADDRS   { 0u, WDOG1_BASE, WDOG2_BASE }
#define	WDOG_BASE_PTRS   { (WDOG_Type *)0u, WDOG1, WDOG2 }
#define	WDOG_IRQS   { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
#define	WDOG1_BASE   (0x40030000u)
#define	WDOG1   ((WDOG_Type *)WDOG1_BASE)
#define	WDOG2_BASE   (0x40034000u)
#define	WDOG2   ((WDOG_Type *)WDOG2_BASE)
#define	WDOG_BASE_ADDRS   { 0u, WDOG1_BASE, WDOG2_BASE }
#define	WDOG_BASE_PTRS   { (WDOG_Type *)0u, WDOG1, WDOG2 }
#define	WDOG_IRQS   { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
#define	WDOG1_BASE   (0x40030000u)
#define	WDOG1   ((WDOG_Type *)WDOG1_BASE)
#define	WDOG2_BASE   (0x40034000u)
#define	WDOG2   ((WDOG_Type *)WDOG2_BASE)
#define	WDOG_BASE_ADDRS   { 0u, WDOG1_BASE, WDOG2_BASE }
#define	WDOG_BASE_PTRS   { (WDOG_Type *)0u, WDOG1, WDOG2 }
#define	WDOG_IRQS   { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }

Detailed Description

Macro Definition Documentation

WDOG1 [1/3]

#define WDOG1   ((WDOG_Type *)WDOG1_BASE)

Peripheral WDOG1 base pointer

WDOG1 [2/3]

#define WDOG1   ((WDOG_Type *)WDOG1_BASE)

Peripheral WDOG1 base pointer

WDOG1 [3/3]

#define WDOG1   ((WDOG_Type *)WDOG1_BASE)

Peripheral WDOG1 base pointer

WDOG1_BASE [1/3]

#define WDOG1_BASE   (0x400B8000u)

Peripheral WDOG1 base address

WDOG1_BASE [2/3]

#define WDOG1_BASE   (0x40030000u)

Peripheral WDOG1 base address

WDOG1_BASE [3/3]

#define WDOG1_BASE   (0x40030000u)

Peripheral WDOG1 base address

WDOG2 [1/3]

#define WDOG2   ((WDOG_Type *)WDOG2_BASE)

Peripheral WDOG2 base pointer

WDOG2 [2/3]

#define WDOG2   ((WDOG_Type *)WDOG2_BASE)

Peripheral WDOG2 base pointer

WDOG2 [3/3]

#define WDOG2   ((WDOG_Type *)WDOG2_BASE)

Peripheral WDOG2 base pointer

WDOG2_BASE [1/3]

#define WDOG2_BASE   (0x400D0000u)

Peripheral WDOG2 base address

WDOG2_BASE [2/3]

#define WDOG2_BASE   (0x40034000u)

Peripheral WDOG2 base address

WDOG2_BASE [3/3]

#define WDOG2_BASE   (0x40034000u)

Peripheral WDOG2 base address

WDOG_BASE_ADDRS [1/3]

#define WDOG_BASE_ADDRS   { 0u, WDOG1_BASE, WDOG2_BASE }

Array initializer of WDOG peripheral base addresses

WDOG_BASE_ADDRS [2/3]

#define WDOG_BASE_ADDRS   { 0u, WDOG1_BASE, WDOG2_BASE }

Array initializer of WDOG peripheral base addresses

WDOG_BASE_ADDRS [3/3]

#define WDOG_BASE_ADDRS   { 0u, WDOG1_BASE, WDOG2_BASE }

Array initializer of WDOG peripheral base addresses

WDOG_BASE_PTRS [1/3]

#define WDOG_BASE_PTRS   { (WDOG_Type *)0u, WDOG1, WDOG2 }

Array initializer of WDOG peripheral base pointers

WDOG_BASE_PTRS [2/3]

#define WDOG_BASE_PTRS   { (WDOG_Type *)0u, WDOG1, WDOG2 }

Array initializer of WDOG peripheral base pointers

WDOG_BASE_PTRS [3/3]

#define WDOG_BASE_PTRS   { (WDOG_Type *)0u, WDOG1, WDOG2 }

Array initializer of WDOG peripheral base pointers

WDOG_IRQS [1/3]

#define WDOG_IRQS   { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }

Interrupt vectors for the WDOG peripheral type

WDOG_IRQS [2/3]

#define WDOG_IRQS   { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }

Interrupt vectors for the WDOG peripheral type

WDOG_IRQS [3/3]

#define WDOG_IRQS   { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }

Interrupt vectors for the WDOG peripheral type