RTEMS 6.1-rc2
|
Functions | |
void | LL_SetSystemCoreClock (uint32_t CPU_Frequency) |
This function sets directly SystemCoreClock CMSIS variable. | |
ErrorStatus | LL_PLL_ConfigSystemClock_HSI (LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct) |
This function configures system clock at maximum frequency with HSI as clock source of the PLL. | |
ErrorStatus | LL_PLL_ConfigSystemClock_HSE (uint32_t HSEFrequency, uint32_t HSEBypass, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct) |
This function configures system clock with HSE as clock source of the PLL. | |
ErrorStatus | LL_SetFlashLatency (uint32_t HCLK_Frequency) |
Update number of Flash wait states in line with new frequency and current voltage range. | |
ErrorStatus LL_PLL_ConfigSystemClock_HSE | ( | uint32_t | HSEFrequency, |
uint32_t | HSEBypass, | ||
LL_UTILS_PLLInitTypeDef * | UTILS_PLLInitStruct, | ||
LL_UTILS_ClkInitTypeDef * | UTILS_ClkInitStruct | ||
) |
This function configures system clock with HSE as clock source of the PLL.
HSEFrequency | Value between Min_Data = 4000000 and Max_Data = 48000000 |
HSEBypass | This parameter can be one of the following values: |
UTILS_PLLInitStruct | pointer to a LL_UTILS_PLLInitTypeDef structure that contains the configuration information for the PLL. |
UTILS_ClkInitStruct | pointer to a LL_UTILS_ClkInitTypeDef structure that contains the configuration information for the BUS prescalers. |
An | ErrorStatus enumeration value:
|
(*) : For stm32h72xxx and stm32h73xxx family lines and requires to enable the CPU_FREQ_BOOST flash option byte, 520MHZ otherwise. (**) : For stm32h74xxx and stm32h75xxx family lines and requires the board to be connected on LDO regulator not SMPS, 400MHZ otherwise. (***): For stm32h7a3xx, stm32h7b3xx and stm32h7b0xx family lines.
ErrorStatus LL_PLL_ConfigSystemClock_HSI | ( | LL_UTILS_PLLInitTypeDef * | UTILS_PLLInitStruct, |
LL_UTILS_ClkInitTypeDef * | UTILS_ClkInitStruct | ||
) |
This function configures system clock at maximum frequency with HSI as clock source of the PLL.
UTILS_PLLInitStruct | pointer to a LL_UTILS_PLLInitTypeDef structure that contains the configuration information for the PLL. |
UTILS_ClkInitStruct | pointer to a LL_UTILS_ClkInitTypeDef structure that contains the configuration information for the BUS prescalers. |
An | ErrorStatus enumeration value:
|
(*) : For stm32h72xxx and stm32h73xxx family lines and requires to enable the CPU_FREQ_BOOST flash option byte, 520MHZ otherwise. (**) : For stm32h74xxx and stm32h75xxx family lines and requires the board to be connected on LDO regulator not SMPS, 400MHZ otherwise. (***): For stm32h7a3xx, stm32h7b3xx and stm32h7b0xx family lines.
ErrorStatus LL_SetFlashLatency | ( | uint32_t | HCLK_Frequency | ) |
Update number of Flash wait states in line with new frequency and current voltage range.
HCLK_Frequency | HCLK frequency |
An | ErrorStatus enumeration value:
|
void LL_SetSystemCoreClock | ( | uint32_t | CPU_Frequency | ) |
This function sets directly SystemCoreClock CMSIS variable.
CPU_Frequency | Core frequency in Hz |
None |