USBNC Peripheral Access Layer

Modules
	USBNC Register Masks

Data Structures
struct	USBNC_Type

Macros
#define	USBNC1_BASE   (0x402E0000u)
#define	USBNC1   ((USBNC_Type *)USBNC1_BASE)
#define	USBNC2_BASE   (0x402E0004u)
#define	USBNC2   ((USBNC_Type *)USBNC2_BASE)
#define	USBNC_BASE_ADDRS   { 0u, USBNC1_BASE, USBNC2_BASE }
#define	USBNC_BASE_PTRS   { (USBNC_Type *)0u, USBNC1, USBNC2 }
#define	USBNC_STACK_BASE_ADDRS   { USBNC1_BASE, USBNC2_BASE }
#define	USBNC_OTG1_BASE   (0x40430200u)
#define	USBNC_OTG1   ((USBNC_Type *)USBNC_OTG1_BASE)
#define	USBNC_OTG2_BASE   (0x4042C200u)
#define	USBNC_OTG2   ((USBNC_Type *)USBNC_OTG2_BASE)
#define	USBNC_BASE_ADDRS   { 0u, USBNC_OTG1_BASE, USBNC_OTG2_BASE }
#define	USBNC_BASE_PTRS   { (USBNC_Type *)0u, USBNC_OTG1, USBNC_OTG2 }
#define	USB_OTGn_CTRL   CTRL1
#define	USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_MASK   USBNC_CTRL1_OVER_CUR_DIS_MASK
#define	USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_SHIFT   USBNC_CTRL1_OVER_CUR_DIS_SHIFT
#define	USBNC_USB_OTGn_CTRL_OVER_CUR_DIS(x)   USBNC_CTRL1_OVER_CUR_DIS(x)
#define	USBNC_USB_OTGn_CTRL_OVER_CUR_POL_MASK   USBNC_CTRL1_OVER_CUR_POL_MASK
#define	USBNC_USB_OTGn_CTRL_OVER_CUR_POL_SHIFT   USBNC_CTRL1_OVER_CUR_POL_SHIFT
#define	USBNC_USB_OTGn_CTRL_OVER_CUR_POL(x)   USBNC_CTRL1_OVER_CUR_POL(x)
#define	USBNC_USB_OTGn_CTRL_PWR_POL_MASK   USBNC_CTRL1_PWR_POL_MASK
#define	USBNC_USB_OTGn_CTRL_PWR_POL_SHIFT   USBNC_CTRL1_PWR_POL_SHIFT
#define	USBNC_USB_OTGn_CTRL_PWR_POL(x)   USBNC_CTRL1_PWR_POL(x)
#define	USBNC_USB_OTGn_CTRL_WIE_MASK   USBNC_CTRL1_WIE_MASK
#define	USBNC_USB_OTGn_CTRL_WIE_SHIFT   USBNC_CTRL1_WIE_SHIFT
#define	USBNC_USB_OTGn_CTRL_WIE(x)   USBNC_CTRL1_WIE(x)
#define	USBNC_USB_OTGn_CTRL_WKUP_SW_EN_MASK   USBNC_CTRL1_WKUP_SW_EN_MASK
#define	USBNC_USB_OTGn_CTRL_WKUP_SW_EN_SHIFT   USBNC_CTRL1_WKUP_SW_EN_SHIFT
#define	USBNC_USB_OTGn_CTRL_WKUP_SW_EN(x)   USBNC_CTRL1_WKUP_SW_EN(x)
#define	USBNC_USB_OTGn_CTRL_WKUP_SW_MASK   USBNC_CTRL1_WKUP_SW_MASK
#define	USBNC_USB_OTGn_CTRL_WKUP_SW_SHIFT   USBNC_CTRL1_WKUP_SW_SHIFT
#define	USBNC_USB_OTGn_CTRL_WKUP_SW(x)   USBNC_CTRL1_WKUP_SW(x)
#define	USBNC_USB_OTGn_CTRL_WKUP_ID_EN_MASK   USBNC_CTRL1_WKUP_ID_EN_MASK
#define	USBNC_USB_OTGn_CTRL_WKUP_ID_EN_SHIFT   USBNC_CTRL1_WKUP_ID_EN_SHIFT
#define	USBNC_USB_OTGn_CTRL_WKUP_ID_EN(x)   USBNC_CTRL1_WKUP_ID_EN(x)
#define	USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_MASK   USBNC_CTRL1_WKUP_VBUS_EN_MASK
#define	USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_SHIFT   USBNC_CTRL1_WKUP_VBUS_EN_SHIFT
#define	USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN(x)   USBNC_CTRL1_WKUP_VBUS_EN(x)
#define	USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_MASK   USBNC_CTRL1_WKUP_DPDM_EN_MASK
#define	USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_SHIFT   USBNC_CTRL1_WKUP_DPDM_EN_SHIFT
#define	USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN(x)   USBNC_CTRL1_WKUP_DPDM_EN(x)
#define	USBNC_USB_OTGn_CTRL_WIR_MASK   USBNC_CTRL1_WIR_MASK
#define	USBNC_USB_OTGn_CTRL_WIR_SHIFT   USBNC_CTRL1_WIR_SHIFT
#define	USBNC_USB_OTGn_CTRL_WIR(x)   USBNC_CTRL1_WIR(x)
#define	USBNC_STACK_BASE_ADDRS   { USBNC_OTG1_BASE, USBNC_OTG2_BASE }
#define	USBNC_OTG1_BASE   (0x40430200u)
#define	USBNC_OTG1   ((USBNC_Type *)USBNC_OTG1_BASE)
#define	USBNC_OTG2_BASE   (0x4042C200u)
#define	USBNC_OTG2   ((USBNC_Type *)USBNC_OTG2_BASE)
#define	USBNC_BASE_ADDRS   { 0u, USBNC_OTG1_BASE, USBNC_OTG2_BASE }
#define	USBNC_BASE_PTRS   { (USBNC_Type *)0u, USBNC_OTG1, USBNC_OTG2 }
#define	USB_OTGn_CTRL   CTRL1
#define	USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_MASK   USBNC_CTRL1_OVER_CUR_DIS_MASK
#define	USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_SHIFT   USBNC_CTRL1_OVER_CUR_DIS_SHIFT
#define	USBNC_USB_OTGn_CTRL_OVER_CUR_DIS(x)   USBNC_CTRL1_OVER_CUR_DIS(x)
#define	USBNC_USB_OTGn_CTRL_OVER_CUR_POL_MASK   USBNC_CTRL1_OVER_CUR_POL_MASK
#define	USBNC_USB_OTGn_CTRL_OVER_CUR_POL_SHIFT   USBNC_CTRL1_OVER_CUR_POL_SHIFT
#define	USBNC_USB_OTGn_CTRL_OVER_CUR_POL(x)   USBNC_CTRL1_OVER_CUR_POL(x)
#define	USBNC_USB_OTGn_CTRL_PWR_POL_MASK   USBNC_CTRL1_PWR_POL_MASK
#define	USBNC_USB_OTGn_CTRL_PWR_POL_SHIFT   USBNC_CTRL1_PWR_POL_SHIFT
#define	USBNC_USB_OTGn_CTRL_PWR_POL(x)   USBNC_CTRL1_PWR_POL(x)
#define	USBNC_USB_OTGn_CTRL_WIE_MASK   USBNC_CTRL1_WIE_MASK
#define	USBNC_USB_OTGn_CTRL_WIE_SHIFT   USBNC_CTRL1_WIE_SHIFT
#define	USBNC_USB_OTGn_CTRL_WIE(x)   USBNC_CTRL1_WIE(x)
#define	USBNC_USB_OTGn_CTRL_WKUP_SW_EN_MASK   USBNC_CTRL1_WKUP_SW_EN_MASK
#define	USBNC_USB_OTGn_CTRL_WKUP_SW_EN_SHIFT   USBNC_CTRL1_WKUP_SW_EN_SHIFT
#define	USBNC_USB_OTGn_CTRL_WKUP_SW_EN(x)   USBNC_CTRL1_WKUP_SW_EN(x)
#define	USBNC_USB_OTGn_CTRL_WKUP_SW_MASK   USBNC_CTRL1_WKUP_SW_MASK
#define	USBNC_USB_OTGn_CTRL_WKUP_SW_SHIFT   USBNC_CTRL1_WKUP_SW_SHIFT
#define	USBNC_USB_OTGn_CTRL_WKUP_SW(x)   USBNC_CTRL1_WKUP_SW(x)
#define	USBNC_USB_OTGn_CTRL_WKUP_ID_EN_MASK   USBNC_CTRL1_WKUP_ID_EN_MASK
#define	USBNC_USB_OTGn_CTRL_WKUP_ID_EN_SHIFT   USBNC_CTRL1_WKUP_ID_EN_SHIFT
#define	USBNC_USB_OTGn_CTRL_WKUP_ID_EN(x)   USBNC_CTRL1_WKUP_ID_EN(x)
#define	USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_MASK   USBNC_CTRL1_WKUP_VBUS_EN_MASK
#define	USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_SHIFT   USBNC_CTRL1_WKUP_VBUS_EN_SHIFT
#define	USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN(x)   USBNC_CTRL1_WKUP_VBUS_EN(x)
#define	USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_MASK   USBNC_CTRL1_WKUP_DPDM_EN_MASK
#define	USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_SHIFT   USBNC_CTRL1_WKUP_DPDM_EN_SHIFT
#define	USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN(x)   USBNC_CTRL1_WKUP_DPDM_EN(x)
#define	USBNC_USB_OTGn_CTRL_WIR_MASK   USBNC_CTRL1_WIR_MASK
#define	USBNC_USB_OTGn_CTRL_WIR_SHIFT   USBNC_CTRL1_WIR_SHIFT
#define	USBNC_USB_OTGn_CTRL_WIR(x)   USBNC_CTRL1_WIR(x)
#define	USBNC_STACK_BASE_ADDRS   { USBNC_OTG1_BASE, USBNC_OTG2_BASE }

Detailed Description

Macro Definition Documentation

USBNC1

#define USBNC1   ((USBNC_Type *)USBNC1_BASE)

Peripheral USBNC1 base pointer

USBNC1_BASE

#define USBNC1_BASE   (0x402E0000u)

Peripheral USBNC1 base address

USBNC2

#define USBNC2   ((USBNC_Type *)USBNC2_BASE)

Peripheral USBNC2 base pointer

USBNC2_BASE

#define USBNC2_BASE   (0x402E0004u)

Peripheral USBNC2 base address

USBNC_BASE_ADDRS [1/3]

#define USBNC_BASE_ADDRS   { 0u, USBNC1_BASE, USBNC2_BASE }

Array initializer of USBNC peripheral base addresses

USBNC_BASE_ADDRS [2/3]

#define USBNC_BASE_ADDRS   { 0u, USBNC_OTG1_BASE, USBNC_OTG2_BASE }

Array initializer of USBNC peripheral base addresses

USBNC_BASE_ADDRS [3/3]

#define USBNC_BASE_ADDRS   { 0u, USBNC_OTG1_BASE, USBNC_OTG2_BASE }

Array initializer of USBNC peripheral base addresses

USBNC_BASE_PTRS [1/3]

#define USBNC_BASE_PTRS   { (USBNC_Type *)0u, USBNC1, USBNC2 }

Array initializer of USBNC peripheral base pointers

USBNC_BASE_PTRS [2/3]

#define USBNC_BASE_PTRS   { (USBNC_Type *)0u, USBNC_OTG1, USBNC_OTG2 }

Array initializer of USBNC peripheral base pointers

USBNC_BASE_PTRS [3/3]

#define USBNC_BASE_PTRS   { (USBNC_Type *)0u, USBNC_OTG1, USBNC_OTG2 }

Array initializer of USBNC peripheral base pointers

USBNC_OTG1 [1/2]

#define USBNC_OTG1   ((USBNC_Type *)USBNC_OTG1_BASE)

Peripheral USBNC_OTG1 base pointer

USBNC_OTG1 [2/2]

#define USBNC_OTG1   ((USBNC_Type *)USBNC_OTG1_BASE)

Peripheral USBNC_OTG1 base pointer

USBNC_OTG1_BASE [1/2]

#define USBNC_OTG1_BASE   (0x40430200u)

Peripheral USBNC_OTG1 base address

USBNC_OTG1_BASE [2/2]

#define USBNC_OTG1_BASE   (0x40430200u)

Peripheral USBNC_OTG1 base address

USBNC_OTG2 [1/2]

#define USBNC_OTG2   ((USBNC_Type *)USBNC_OTG2_BASE)

Peripheral USBNC_OTG2 base pointer

USBNC_OTG2 [2/2]

#define USBNC_OTG2   ((USBNC_Type *)USBNC_OTG2_BASE)

Peripheral USBNC_OTG2 base pointer

USBNC_OTG2_BASE [1/2]

#define USBNC_OTG2_BASE   (0x4042C200u)

Peripheral USBNC_OTG2 base address

USBNC_OTG2_BASE [2/2]

#define USBNC_OTG2_BASE   (0x4042C200u)

Peripheral USBNC_OTG2 base address