TIM Trigger Selection

Macros
#define	TIM_TS_ITR0   0x00000000U
#define	TIM_TS_ITR1   TIM_SMCR_TS_0
#define	TIM_TS_ITR2   TIM_SMCR_TS_1
#define	TIM_TS_ITR3   (TIM_SMCR_TS_0 | TIM_SMCR_TS_1)
#define	TIM_TS_ITR4   (TIM_SMCR_TS_3)
#define	TIM_TS_ITR5   (TIM_SMCR_TS_0 | TIM_SMCR_TS_3)
#define	TIM_TS_ITR6   (TIM_SMCR_TS_1 | TIM_SMCR_TS_3)
#define	TIM_TS_ITR7   (TIM_SMCR_TS_0 | TIM_SMCR_TS_1 | TIM_SMCR_TS_3)
#define	TIM_TS_ITR8   (TIM_SMCR_TS_2 | TIM_SMCR_TS_3)
#define	TIM_TS_ITR9   (TIM_SMCR_TS_0 | TIM_SMCR_TS_2 | TIM_SMCR_TS_3)
#define	TIM_TS_ITR10   (TIM_SMCR_TS_1 | TIM_SMCR_TS_2 | TIM_SMCR_TS_3)
#define	TIM_TS_ITR11   (TIM_SMCR_TS_0 | TIM_SMCR_TS_1 | TIM_SMCR_TS_2 | TIM_SMCR_TS_3)
#define	TIM_TS_ITR12   (TIM_SMCR_TS_4)
#define	TIM_TS_ITR13   (TIM_SMCR_TS_0 | TIM_SMCR_TS_4)
#define	TIM_TS_TI1F_ED   TIM_SMCR_TS_2
#define	TIM_TS_TI1FP1   (TIM_SMCR_TS_0 | TIM_SMCR_TS_2)
#define	TIM_TS_TI2FP2   (TIM_SMCR_TS_1 | TIM_SMCR_TS_2)
#define	TIM_TS_ETRF   (TIM_SMCR_TS_0 | TIM_SMCR_TS_1 | TIM_SMCR_TS_2)
#define	TIM_TS_NONE   0x0000FFFFU

Detailed Description

Macro Definition Documentation

TIM_TS_ETRF

#define TIM_TS_ETRF   (TIM_SMCR_TS_0 | TIM_SMCR_TS_1 | TIM_SMCR_TS_2)

Filtered External Trigger input (ETRF)

TIM_TS_ITR0

#define TIM_TS_ITR0   0x00000000U

Internal Trigger 0 (ITR0)

TIM_TS_ITR1

#define TIM_TS_ITR1   TIM_SMCR_TS_0

Internal Trigger 1 (ITR1)

TIM_TS_ITR10

#define TIM_TS_ITR10   (TIM_SMCR_TS_1 | TIM_SMCR_TS_2 | TIM_SMCR_TS_3)

Internal Trigger 10 (ITR10)

TIM_TS_ITR11

#define TIM_TS_ITR11   (TIM_SMCR_TS_0 | TIM_SMCR_TS_1 | TIM_SMCR_TS_2 | TIM_SMCR_TS_3)

Internal Trigger 11 (ITR11)

TIM_TS_ITR12

#define TIM_TS_ITR12   (TIM_SMCR_TS_4)

Internal Trigger 12 (ITR12)

TIM_TS_ITR13

#define TIM_TS_ITR13   (TIM_SMCR_TS_0 | TIM_SMCR_TS_4)

Internal Trigger 13 (ITR13)

TIM_TS_ITR2

#define TIM_TS_ITR2   TIM_SMCR_TS_1

Internal Trigger 2 (ITR2)

TIM_TS_ITR3

#define TIM_TS_ITR3   (TIM_SMCR_TS_0 | TIM_SMCR_TS_1)

Internal Trigger 3 (ITR3)

TIM_TS_ITR4

#define TIM_TS_ITR4   (TIM_SMCR_TS_3)

Internal Trigger 4 (ITR4)

TIM_TS_ITR5

#define TIM_TS_ITR5   (TIM_SMCR_TS_0 | TIM_SMCR_TS_3)

Internal Trigger 5 (ITR5)

TIM_TS_ITR6

#define TIM_TS_ITR6   (TIM_SMCR_TS_1 | TIM_SMCR_TS_3)

Internal Trigger 6 (ITR6)

TIM_TS_ITR7

#define TIM_TS_ITR7   (TIM_SMCR_TS_0 | TIM_SMCR_TS_1 | TIM_SMCR_TS_3)

Internal Trigger 7 (ITR7)

TIM_TS_ITR8

#define TIM_TS_ITR8   (TIM_SMCR_TS_2 | TIM_SMCR_TS_3)

Internal Trigger 8 (ITR8)

TIM_TS_ITR9

#define TIM_TS_ITR9   (TIM_SMCR_TS_0 | TIM_SMCR_TS_2 | TIM_SMCR_TS_3)

Internal Trigger 9 (ITR9)

TIM_TS_NONE

#define TIM_TS_NONE   0x0000FFFFU

No trigger selected

TIM_TS_TI1F_ED

#define TIM_TS_TI1F_ED   TIM_SMCR_TS_2

TI1 Edge Detector (TI1F_ED)

TIM_TS_TI1FP1

#define TIM_TS_TI1FP1   (TIM_SMCR_TS_0 | TIM_SMCR_TS_2)

Filtered Timer Input 1 (TI1FP1)

TIM_TS_TI2FP2

#define TIM_TS_TI2FP2   (TIM_SMCR_TS_1 | TIM_SMCR_TS_2)

Filtered Timer Input 2 (TI2FP2)