Clock divisor (CLKDIV)

This group contains register bit definitions. More...

Macros
#define	GRSPW2_CLKDIV_CLKDIVSTART_SHIFT   8
#define	GRSPW2_CLKDIV_CLKDIVSTART_MASK   0xff00U
#define	GRSPW2_CLKDIV_CLKDIVSTART_GET(_reg)
#define	GRSPW2_CLKDIV_CLKDIVSTART_SET(_reg, _val)
#define	GRSPW2_CLKDIV_CLKDIVSTART(_val)
#define	GRSPW2_CLKDIV_CLKDIVRUN_SHIFT   0
#define	GRSPW2_CLKDIV_CLKDIVRUN_MASK   0xffU
#define	GRSPW2_CLKDIV_CLKDIVRUN_GET(_reg)
#define	GRSPW2_CLKDIV_CLKDIVRUN_SET(_reg, _val)
#define	GRSPW2_CLKDIV_CLKDIVRUN(_val)

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

GRSPW2_CLKDIV_CLKDIVRUN

#define GRSPW2_CLKDIV_CLKDIVRUN

(

_val

)

Value:

  ( ( ( _val ) << GRSPW2_CLKDIV_CLKDIVRUN_SHIFT ) & \
    GRSPW2_CLKDIV_CLKDIVRUN_MASK )

GRSPW2_CLKDIV_CLKDIVRUN_GET

#define GRSPW2_CLKDIV_CLKDIVRUN_GET

(

_reg

)

Value:

  ( ( ( _reg ) & GRSPW2_CLKDIV_CLKDIVRUN_MASK ) >> \
    GRSPW2_CLKDIV_CLKDIVRUN_SHIFT )

GRSPW2_CLKDIV_CLKDIVRUN_SET

#define GRSPW2_CLKDIV_CLKDIVRUN_SET	(		_reg,
			_val
	)

Value:

  ( ( ( _reg ) & ~GRSPW2_CLKDIV_CLKDIVRUN_MASK ) | \
    ( ( ( _val ) << GRSPW2_CLKDIV_CLKDIVRUN_SHIFT ) & \
      GRSPW2_CLKDIV_CLKDIVRUN_MASK ) )

GRSPW2_CLKDIV_CLKDIVSTART

#define GRSPW2_CLKDIV_CLKDIVSTART

(

_val

)

Value:

  ( ( ( _val ) << GRSPW2_CLKDIV_CLKDIVSTART_SHIFT ) & \
    GRSPW2_CLKDIV_CLKDIVSTART_MASK )

GRSPW2_CLKDIV_CLKDIVSTART_GET

#define GRSPW2_CLKDIV_CLKDIVSTART_GET

(

_reg

)

Value:

  ( ( ( _reg ) & GRSPW2_CLKDIV_CLKDIVSTART_MASK ) >> \
    GRSPW2_CLKDIV_CLKDIVSTART_SHIFT )

GRSPW2_CLKDIV_CLKDIVSTART_SET

#define GRSPW2_CLKDIV_CLKDIVSTART_SET	(		_reg,
			_val
	)

Value:

  ( ( ( _reg ) & ~GRSPW2_CLKDIV_CLKDIVSTART_MASK ) | \
    ( ( ( _val ) << GRSPW2_CLKDIV_CLKDIVSTART_SHIFT ) & \
      GRSPW2_CLKDIV_CLKDIVSTART_MASK ) )