Interrupt map register n, where n = 0 .. 3 (IRQMAPR)

This group contains register bit definitions. More...

Macros
#define	GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT   24
#define	GRGPIO_IRQMAPR_IRQMAP_I_0_MASK   0x1f000000U
#define	GRGPIO_IRQMAPR_IRQMAP_I_0_GET(_reg)
#define	GRGPIO_IRQMAPR_IRQMAP_I_0_SET(_reg, _val)
#define	GRGPIO_IRQMAPR_IRQMAP_I_0(_val)
#define	GRGPIO_IRQMAPR_IRQMAP_I_1_SHIFT   16
#define	GRGPIO_IRQMAPR_IRQMAP_I_1_MASK   0x1f0000U
#define	GRGPIO_IRQMAPR_IRQMAP_I_1_GET(_reg)
#define	GRGPIO_IRQMAPR_IRQMAP_I_1_SET(_reg, _val)
#define	GRGPIO_IRQMAPR_IRQMAP_I_1(_val)
#define	GRGPIO_IRQMAPR_IRQMAP_I_2_SHIFT   8
#define	GRGPIO_IRQMAPR_IRQMAP_I_2_MASK   0x1f00U
#define	GRGPIO_IRQMAPR_IRQMAP_I_2_GET(_reg)
#define	GRGPIO_IRQMAPR_IRQMAP_I_2_SET(_reg, _val)
#define	GRGPIO_IRQMAPR_IRQMAP_I_2(_val)
#define	GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT   0
#define	GRGPIO_IRQMAPR_IRQMAP_I_3_MASK   0x1fU
#define	GRGPIO_IRQMAPR_IRQMAP_I_3_GET(_reg)
#define	GRGPIO_IRQMAPR_IRQMAP_I_3_SET(_reg, _val)
#define	GRGPIO_IRQMAPR_IRQMAP_I_3(_val)

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

GRGPIO_IRQMAPR_IRQMAP_I_0

#define GRGPIO_IRQMAPR_IRQMAP_I_0

(

_val

)

Value:

  ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT ) & \
    GRGPIO_IRQMAPR_IRQMAP_I_0_MASK )

GRGPIO_IRQMAPR_IRQMAP_I_0_GET

#define GRGPIO_IRQMAPR_IRQMAP_I_0_GET

(

_reg

)

Value:

  ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_0_MASK ) >> \
    GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT )

GRGPIO_IRQMAPR_IRQMAP_I_0_SET

#define GRGPIO_IRQMAPR_IRQMAP_I_0_SET	(		_reg,
			_val
	)

Value:

  ( ( ( _reg ) & ~GRGPIO_IRQMAPR_IRQMAP_I_0_MASK ) | \
    ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT ) & \
      GRGPIO_IRQMAPR_IRQMAP_I_0_MASK ) )

GRGPIO_IRQMAPR_IRQMAP_I_1

#define GRGPIO_IRQMAPR_IRQMAP_I_1

(

_val

)

Value:

  ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_1_SHIFT ) & \
    GRGPIO_IRQMAPR_IRQMAP_I_1_MASK )

GRGPIO_IRQMAPR_IRQMAP_I_1_GET

#define GRGPIO_IRQMAPR_IRQMAP_I_1_GET

(

_reg

)

Value:

  ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_1_MASK ) >> \
    GRGPIO_IRQMAPR_IRQMAP_I_1_SHIFT )

GRGPIO_IRQMAPR_IRQMAP_I_1_SET

#define GRGPIO_IRQMAPR_IRQMAP_I_1_SET	(		_reg,
			_val
	)

Value:

  ( ( ( _reg ) & ~GRGPIO_IRQMAPR_IRQMAP_I_1_MASK ) | \
    ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_1_SHIFT ) & \
      GRGPIO_IRQMAPR_IRQMAP_I_1_MASK ) )

GRGPIO_IRQMAPR_IRQMAP_I_2

#define GRGPIO_IRQMAPR_IRQMAP_I_2

(

_val

)

Value:

  ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_2_SHIFT ) & \
    GRGPIO_IRQMAPR_IRQMAP_I_2_MASK )

GRGPIO_IRQMAPR_IRQMAP_I_2_GET

#define GRGPIO_IRQMAPR_IRQMAP_I_2_GET

(

_reg

)

Value:

  ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_2_MASK ) >> \
    GRGPIO_IRQMAPR_IRQMAP_I_2_SHIFT )

GRGPIO_IRQMAPR_IRQMAP_I_2_SET

#define GRGPIO_IRQMAPR_IRQMAP_I_2_SET	(		_reg,
			_val
	)

Value:

  ( ( ( _reg ) & ~GRGPIO_IRQMAPR_IRQMAP_I_2_MASK ) | \
    ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_2_SHIFT ) & \
      GRGPIO_IRQMAPR_IRQMAP_I_2_MASK ) )

GRGPIO_IRQMAPR_IRQMAP_I_3

#define GRGPIO_IRQMAPR_IRQMAP_I_3

(

_val

)

Value:

  ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT ) & \
    GRGPIO_IRQMAPR_IRQMAP_I_3_MASK )

GRGPIO_IRQMAPR_IRQMAP_I_3_GET

#define GRGPIO_IRQMAPR_IRQMAP_I_3_GET

(

_reg

)

Value:

  ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_3_MASK ) >> \
    GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT )

GRGPIO_IRQMAPR_IRQMAP_I_3_SET

#define GRGPIO_IRQMAPR_IRQMAP_I_3_SET	(		_reg,
			_val
	)

Value:

  ( ( ( _reg ) & ~GRGPIO_IRQMAPR_IRQMAP_I_3_MASK ) | \
    ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT ) & \
      GRGPIO_IRQMAPR_IRQMAP_I_3_MASK ) )