RTEMS 6.1-rc2
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Macros

macros to manage the specified RCC Flags and interrupts. More...

Macros

#define __HAL_RCC_ENABLE_IT(__INTERRUPT__)   SET_BIT(RCC->CIER, (__INTERRUPT__))
 Enable RCC interrupt.
 
#define __HAL_RCC_DISABLE_IT(__INTERRUPT__)   CLEAR_BIT(RCC->CIER, (__INTERRUPT__))
 Disable RCC interrupt.
 
#define __HAL_RCC_CLEAR_IT(__INTERRUPT__)   (RCC->CICR = (__INTERRUPT__))
 Clear the RCC's interrupt pending bits.
 
#define __HAL_RCC_GET_IT(__INTERRUPT__)   ((RCC->CIFR & (__INTERRUPT__)) == (__INTERRUPT__))
 Check the RCC's interrupt has occurred or not.
 
#define __HAL_RCC_CLEAR_RESET_FLAGS()   (RCC->RSR |= RCC_RSR_RMVF)
 Set RMVF bit to clear the reset flags.
 
#define RCC_FLAG_MASK   ((uint8_t)0x1F)
 Check RCC flag is set or not.
 
#define __HAL_RCC_GET_FLAG(__FLAG__)
 

Detailed Description

macros to manage the specified RCC Flags and interrupts.

Macro Definition Documentation

◆ __HAL_RCC_CLEAR_IT

#define __HAL_RCC_CLEAR_IT (   __INTERRUPT__)    (RCC->CICR = (__INTERRUPT__))

Clear the RCC's interrupt pending bits.

Parameters
__INTERRUPT__specifies the interrupt pending bit to clear. This parameter can be any combination of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_CSIRDY: CSI ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_HSI48RDY: HSI48 ready interrupt
  • RCC_IT_PLLRDY: main PLL ready interrupt
  • RCC_IT_PLL2RDY: PLL2 ready interrupt
  • RCC_IT_PLL3RDY: PLL3 ready interrupt
  • RCC_IT_HSECSS: HSE Clock Security interrupt
  • RCC_IT_LSECSS: Clock security system interrupt

◆ __HAL_RCC_DISABLE_IT

#define __HAL_RCC_DISABLE_IT (   __INTERRUPT__)    CLEAR_BIT(RCC->CIER, (__INTERRUPT__))

Disable RCC interrupt.

Parameters
__INTERRUPT__specifies the RCC interrupt sources to be disabled. This parameter can be any combination of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_CSIRDY: HSI ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_HSI48RDY: HSI48 ready interrupt
  • RCC_IT_PLLRDY: main PLL ready interrupt
  • RCC_IT_PLL2RDY: PLL2 ready interrupt
  • RCC_IT_PLL3RDY: PLL3 ready interrupt
  • RCC_IT_LSECSS: Clock security system interrupt

◆ __HAL_RCC_ENABLE_IT

#define __HAL_RCC_ENABLE_IT (   __INTERRUPT__)    SET_BIT(RCC->CIER, (__INTERRUPT__))

Enable RCC interrupt.

Parameters
__INTERRUPT__specifies the RCC interrupt sources to be enabled. This parameter can be any combination of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_CSIRDY: HSI ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_HSI48RDY: HSI48 ready interrupt
  • RCC_IT_PLLRDY: main PLL ready interrupt
  • RCC_IT_PLL2RDY: PLL2 ready interrupt
  • RCC_IT_PLL3RDY: PLL3 ready interrupt
  • RCC_IT_LSECSS: Clock security system interrupt

◆ __HAL_RCC_GET_FLAG

#define __HAL_RCC_GET_FLAG (   __FLAG__)
Value:
(((((((__FLAG__) >> 5U) == 1U)? RCC->CR :((((__FLAG__) >> 5U) == 2U) ? RCC->BDCR : \
((((__FLAG__) >> 5U) == 3U)? RCC->CSR : ((((__FLAG__) >> 5U) == 4U)? RCC->RSR :RCC->CIFR)))) & (1UL << ((__FLAG__) & RCC_FLAG_MASK)))!= 0U)? 1U : 0U)
#define RCC_FLAG_MASK
Check RCC flag is set or not.
Definition: stm32h7xx_hal_rcc.h:7979

◆ __HAL_RCC_GET_IT

#define __HAL_RCC_GET_IT (   __INTERRUPT__)    ((RCC->CIFR & (__INTERRUPT__)) == (__INTERRUPT__))

Check the RCC's interrupt has occurred or not.

Parameters
__INTERRUPT__specifies the RCC interrupt source to check. This parameter can be any combination of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_CSIRDY: CSI ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_HSI48RDY: HSI48 ready interrupt
  • RCC_IT_PLLRDY: main PLL ready interrupt
  • RCC_IT_PLL2RDY: PLL2 ready interrupt
  • RCC_IT_PLL3RDY: PLL3 ready interrupt
  • RCC_IT_HSECSS: HSE Clock Security interrupt
  • RCC_IT_LSECSS: Clock security system interrupt
Return values
Thenew state of INTERRUPT (TRUE or FALSE).

◆ RCC_FLAG_MASK

#define RCC_FLAG_MASK   ((uint8_t)0x1F)

Check RCC flag is set or not.

Parameters
__FLAG__specifies the flag to check. This parameter can be one of the following values:
  • RCC_FLAG_HSIRDY: HSI oscillator clock ready
  • RCC_FLAG_HSIDIV: HSI divider flag
  • RCC_FLAG_CSIRDY: CSI oscillator clock ready
  • RCC_FLAG_HSI48RDY: HSI48 oscillator clock ready
  • RCC_FLAG_HSERDY: HSE oscillator clock ready
  • RCC_FLAG_D1CKRDY: Domain1 clock ready (*)
  • RCC_FLAG_D2CKRDY: Domain2 clock ready (*)
  • RCC_FLAG_CPUCKRDY: CPU Domain clock ready (CPU, APB3, bus matrix1 and related memories) (*)
  • RCC_FLAG_CDCKRDY: CPU Domain clock ready (*)
  • RCC_FLAG_PLLRDY: PLL1 clock ready
  • RCC_FLAG_PLL2RDY: PLL2 clock ready
  • RCC_FLAG_PLL3RDY: PLL3 clock ready
  • RCC_FLAG_LSERDY: LSE oscillator clock ready
  • RCC_FLAG_LSIRDY: LSI oscillator clock ready
  • RCC_FLAG_CPURST: CPU reset flag
  • RCC_FLAG_D1RST: D1 domain power switch reset flag (*)
  • RCC_FLAG_D2RST: D2 domain power switch reset flag (*)
  • RCC_FLAG_CDRST: CD domain power switch reset flag (*)
  • RCC_FLAG_BORRST: BOR reset flag
  • RCC_FLAG_PINRST: Pin reset
  • RCC_FLAG_PORRST: POR/PDR reset
  • RCC_FLAG_SFTRST: System reset from CPU reset flag
  • RCC_FLAG_BORRST: D2 domain power switch reset flag
  • RCC_FLAG_IWDG1RST: CPU Independent Watchdog reset
  • RCC_FLAG_WWDG1RST: Window Watchdog1 reset
  • RCC_FLAG_LPWR1RST: Reset due to illegal D1 DSTANDBY or CPU CSTOP flag
  • RCC_FLAG_LPWR2RST: Reset due to illegal D2 DSTANDBY flag
Return values
Thenew state of FLAG (TRUE or FALSE).

(*) Available on some STM32H7 lines only.