RTEMS 6.1-rc2
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Macros

Macros

#define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE()   SET_BIT(CRS->CR, CRS_CR_CEN)
 Enable the oscillator clock for frequency error counter.
 
#define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE()   CLEAR_BIT(CRS->CR, CRS_CR_CEN)
 Disable the oscillator clock for frequency error counter.
 
#define __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE()   SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN)
 Enable the automatic hardware adjustment of TRIM bits.
 
#define __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE()   CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN)
 Enable or disable the automatic hardware adjustment of TRIM bits.
 
#define __HAL_RCC_CRS_RELOADVALUE_CALCULATE(__FTARGET__, __FSYNC__)   (((__FTARGET__) / (__FSYNC__)) - 1U)
 Macro to calculate reload value to be set in CRS register according to target and sync frequencies.
 

Detailed Description

Macro Definition Documentation

◆ __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE

#define __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE ( )    CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN)

Enable or disable the automatic hardware adjustment of TRIM bits.

Return values
None

◆ __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE

#define __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE ( )    SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN)

Enable the automatic hardware adjustment of TRIM bits.

Note
When the AUTOTRIMEN bit is set the CRS_CFGR register becomes write-protected.
Return values
None

◆ __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE

#define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE ( )    CLEAR_BIT(CRS->CR, CRS_CR_CEN)

Disable the oscillator clock for frequency error counter.

Return values
None

◆ __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE

#define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE ( )    SET_BIT(CRS->CR, CRS_CR_CEN)

Enable the oscillator clock for frequency error counter.

Note
when the CEN bit is set the CRS_CFGR register becomes write-protected.
Return values
None

◆ __HAL_RCC_CRS_RELOADVALUE_CALCULATE

#define __HAL_RCC_CRS_RELOADVALUE_CALCULATE (   __FTARGET__,
  __FSYNC__ 
)    (((__FTARGET__) / (__FSYNC__)) - 1U)

Macro to calculate reload value to be set in CRS register according to target and sync frequencies.

Note
The RELOAD value should be selected according to the ratio between the target frequency and the frequency of the synchronization source after pre-scaling. It is then decreased by one in order to reach the expected synchronization on the zero value. The formula is the following: RELOAD = (fTARGET / fSYNC) -1
Parameters
__FTARGET__Target frequency (value in Hz)
__FSYNC__Synchronization signal frequency (value in Hz)
Return values
None