PGMC_PPC Register Masks

PPC_AUTHEN_CTRL - PPC Authentication Control
#define	PGMC_PPC_PPC_AUTHEN_CTRL_USER_MASK   (0x1U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_USER_SHIFT   (0U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_USER(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_USER_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_USER_MASK)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE_MASK   (0x2U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE_SHIFT   (1U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE_MASK)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING_MASK   (0x10U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING_SHIFT   (4U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING_MASK)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST_MASK   (0xF00U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST_SHIFT   (8U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST_MASK)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST_MASK   (0x1000U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST_SHIFT   (12U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST_MASK)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG_MASK   (0x100000U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG_SHIFT   (20U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG_MASK)

PPC_MODE - PPC Mode
#define	PGMC_PPC_PPC_MODE_CTRL_MODE_MASK   (0x3U)
#define	PGMC_PPC_PPC_MODE_CTRL_MODE_SHIFT   (0U)
#define	PGMC_PPC_PPC_MODE_CTRL_MODE(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_MODE_CTRL_MODE_SHIFT)) & PGMC_PPC_PPC_MODE_CTRL_MODE_MASK)
#define	PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN_MASK   (0x30U)
#define	PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN_SHIFT   (4U)
#define	PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN_MASK)

PPC_STBY_CM_CTRL - PPC standby CPU mode control
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT_MASK   (0x2U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT_SHIFT   (1U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT_MASK)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP_MASK   (0x4U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP_SHIFT   (2U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP_MASK)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND_MASK   (0x8U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND_SHIFT   (3U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND_MASK)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT_MASK   (0x100U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT_SHIFT   (8U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT_MASK)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT_MASK   (0x200U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT_SHIFT   (9U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT_MASK)

PPC_STBY_SP_CTRL - PPC standby Setpoint control
#define	PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE_MASK   (0xFFFFU)
#define	PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE_SHIFT   (0U)
#define	PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE_SHIFT)) & PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE_MASK)
#define	PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP_MASK   (0xFFFF0000U)
#define	PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP_SHIFT   (16U)
#define	PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP_SHIFT)) & PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP_MASK)

PPC_AUTHEN_CTRL - PPC Authentication Control
#define	PGMC_PPC_PPC_AUTHEN_CTRL_USER_MASK   (0x1U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_USER_SHIFT   (0U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_USER(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_USER_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_USER_MASK)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE_MASK   (0x2U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE_SHIFT   (1U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE_MASK)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING_MASK   (0x10U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING_SHIFT   (4U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING_MASK)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST_MASK   (0xF00U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST_SHIFT   (8U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST_MASK)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST_MASK   (0x1000U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST_SHIFT   (12U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST_MASK)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG_MASK   (0x100000U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG_SHIFT   (20U)
#define	PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG_MASK)

PPC_MODE - PPC Mode
#define	PGMC_PPC_PPC_MODE_CTRL_MODE_MASK   (0x3U)
#define	PGMC_PPC_PPC_MODE_CTRL_MODE_SHIFT   (0U)
#define	PGMC_PPC_PPC_MODE_CTRL_MODE(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_MODE_CTRL_MODE_SHIFT)) & PGMC_PPC_PPC_MODE_CTRL_MODE_MASK)
#define	PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN_MASK   (0x30U)
#define	PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN_SHIFT   (4U)
#define	PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN_MASK)

PPC_STBY_CM_CTRL - PPC standby CPU mode control
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT_MASK   (0x2U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT_SHIFT   (1U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT_MASK)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP_MASK   (0x4U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP_SHIFT   (2U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP_MASK)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND_MASK   (0x8U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND_SHIFT   (3U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND_MASK)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT_MASK   (0x100U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT_SHIFT   (8U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT_MASK)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT_MASK   (0x200U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT_SHIFT   (9U)
#define	PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT_MASK)

PPC_STBY_SP_CTRL - PPC standby Setpoint control
#define	PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE_MASK   (0xFFFFU)
#define	PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE_SHIFT   (0U)
#define	PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE_SHIFT)) & PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE_MASK)
#define	PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP_MASK   (0xFFFF0000U)
#define	PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP_SHIFT   (16U)
#define	PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP(x)   (((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP_SHIFT)) & PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP_MASK)

Detailed Description

Macro Definition Documentation

PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG [1/2]

#define PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG_MASK)

LOCK_CFG - Configuration lock

PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG [2/2]

#define PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_CFG_MASK)

LOCK_CFG - Configuration lock

PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST [1/2]

#define PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST_MASK)

LOCK_LIST - White list lock

PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST [2/2]

#define PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_LIST_MASK)

LOCK_LIST - White list lock

PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING [1/2]

#define PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING_MASK)

LOCK_SETTING - Lock NONSECURE and USER

PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING [2/2]

#define PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_LOCK_SETTING_MASK)

LOCK_SETTING - Lock NONSECURE and USER

PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE [1/2]

#define PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE_MASK)

NONSECURE - Allow non-secure mode access

PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE [2/2]

#define PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_NONSECURE_MASK)

NONSECURE - Allow non-secure mode access

PGMC_PPC_PPC_AUTHEN_CTRL_USER [1/2]

#define PGMC_PPC_PPC_AUTHEN_CTRL_USER

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_USER_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_USER_MASK)

USER - Allow user mode access

PGMC_PPC_PPC_AUTHEN_CTRL_USER [2/2]

#define PGMC_PPC_PPC_AUTHEN_CTRL_USER

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_USER_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_USER_MASK)

USER - Allow user mode access

PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST [1/2]

#define PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST_MASK)

WHITE_LIST - Domain ID white list

PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST [2/2]

#define PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST_SHIFT)) & PGMC_PPC_PPC_AUTHEN_CTRL_WHITE_LIST_MASK)

WHITE_LIST - Domain ID white list

PGMC_PPC_PPC_MODE_CTRL_MODE [1/2]

#define PGMC_PPC_PPC_MODE_CTRL_MODE

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_MODE_CTRL_MODE_SHIFT)) & PGMC_PPC_PPC_MODE_CTRL_MODE_MASK)

CTRL_MODE - Control mode. This field is locked by AUTHEN_CTRL[LOCK_CFG] field. 0b00..Not affected by any low power mode 0b01..Controlled by CPU power mode of the domain 0b10..Controlled by Setpoint and system standby 0b11..Reserved

PGMC_PPC_PPC_MODE_CTRL_MODE [2/2]

#define PGMC_PPC_PPC_MODE_CTRL_MODE

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_MODE_CTRL_MODE_SHIFT)) & PGMC_PPC_PPC_MODE_CTRL_MODE_MASK)

CTRL_MODE - Control mode. This field is locked by AUTHEN_CTRL[LOCK_CFG] field. 0b00..Not affected by any low power mode 0b01..Controlled by CPU power mode of the domain 0b10..Controlled by Setpoint and system standby 0b11..Reserved

PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN [1/2]

#define PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN_MASK)

DOMAIN_ASSIGN - Domain assignment of the BPC 0b00..Domain 0 0b01..Domain 1 0b10..Domain 2 0b11..Domain 3

PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN [2/2]

#define PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN_SHIFT)) & PGMC_PPC_PPC_MODE_DOMAIN_ASSIGN_MASK)

DOMAIN_ASSIGN - Domain assignment of the BPC 0b00..Domain 0 0b01..Domain 1 0b10..Domain 2 0b11..Domain 3

PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT [1/2]

#define PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT_MASK)

STBY_OFF_SOFT - Software PMIC standby off trigger

PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT [2/2]

#define PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_OFF_SOFT_MASK)

STBY_OFF_SOFT - Software PMIC standby off trigger

PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP [1/2]

#define PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP_MASK)

STBY_ON_AT_STOP - PMIC Standby on when domain enters STOP mode. This field is locked by AUTHEN_CTRL[LOCK_CFG] field.

PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP [2/2]

#define PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_STOP_MASK)

STBY_ON_AT_STOP - PMIC Standby on when domain enters STOP mode. This field is locked by AUTHEN_CTRL[LOCK_CFG] field.

PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND [1/2]

#define PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND_MASK)

STBY_ON_AT_SUSPEND - PMIC Standby on when domain enters SUSPEND mode. This field is locked by AUTHEN_CTRL[LOCK_CFG] field.

PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND [2/2]

#define PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_SUSPEND_MASK)

STBY_ON_AT_SUSPEND - PMIC Standby on when domain enters SUSPEND mode. This field is locked by AUTHEN_CTRL[LOCK_CFG] field.

PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT [1/2]

#define PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT_MASK)

STBY_ON_AT_WAIT - PMIC Standby on when domain enters WAIT mode. This field is locked by AUTHEN_CTRL[LOCK_CFG] field.

PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT [2/2]

#define PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_AT_WAIT_MASK)

STBY_ON_AT_WAIT - PMIC Standby on when domain enters WAIT mode. This field is locked by AUTHEN_CTRL[LOCK_CFG] field.

PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT [1/2]

#define PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT_MASK)

STBY_ON_SOFT - Software PMIC standby on trigger

PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT [2/2]

#define PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT_SHIFT)) & PGMC_PPC_PPC_STBY_CM_CTRL_STBY_ON_SOFT_MASK)

STBY_ON_SOFT - Software PMIC standby on trigger

PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE [1/2]

#define PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE_SHIFT)) & PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE_MASK)

STBY_ON_AT_SP_ACTIVE - PMIC standby on when system enters Setpoint number. This field is locked by AUTHEN_CTRL[LOCK_CFG] field.

PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE [2/2]

#define PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE_SHIFT)) & PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_ACTIVE_MASK)

STBY_ON_AT_SP_ACTIVE - PMIC standby on when system enters Setpoint number. This field is locked by AUTHEN_CTRL[LOCK_CFG] field.

PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP [1/2]

#define PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP_SHIFT)) & PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP_MASK)

STBY_ON_AT_SP_SLEEP - PMIC standby on when system enters Setpoint number and system is in standby mode. This field is locked by AUTHEN_CTRL[LOCK_CFG] field.

PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP [2/2]

#define PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP

(

x

)

(((uint32_t)(((uint32_t)(x)) << PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP_SHIFT)) & PGMC_PPC_PPC_STBY_SP_CTRL_STBY_ON_AT_SP_SLEEP_MASK)

STBY_ON_AT_SP_SLEEP - PMIC standby on when system enters Setpoint number and system is in standby mode. This field is locked by AUTHEN_CTRL[LOCK_CFG] field.