Macros
#define	CCM_CLOCK_ROOT_CONTROL_COUNT (79U)

#define	CCM_CLOCK_ROOT_CONTROL_SET_COUNT (79U)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_COUNT (79U)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_COUNT (79U)

#define	CCM_CLOCK_ROOT_STATUS0_COUNT (79U)

#define	CCM_CLOCK_ROOT_STATUS1_COUNT (79U)

#define	CCM_CLOCK_ROOT_CONFIG_COUNT (79U)

#define	CCM_CLOCK_ROOT_AUTHEN_COUNT (79U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_COUNT (79U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_COUNT (79U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_COUNT (79U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_COUNT (79U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_COUNT2 (16U)

#define	CCM_CLOCK_GROUP_CONTROL_COUNT (2U)

#define	CCM_CLOCK_GROUP_CONTROL_SET_COUNT (2U)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_COUNT (2U)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_COUNT (2U)

#define	CCM_CLOCK_GROUP_STATUS0_COUNT (2U)

#define	CCM_CLOCK_GROUP_STATUS1_COUNT (2U)

#define	CCM_CLOCK_GROUP_CONFIG_COUNT (2U)

#define	CCM_CLOCK_GROUP_AUTHEN_COUNT (2U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_COUNT (2U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_COUNT (2U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_COUNT (2U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_COUNT (2U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_COUNT2 (16U)

#define	CCM_GPR_SHARED_COUNT (8U)

#define	CCM_GPR_SHARED_SET_COUNT (8U)

#define	CCM_GPR_SHARED_CLR_COUNT (8U)

#define	CCM_GPR_SHARED_TOG_COUNT (8U)

#define	CCM_GPR_SHARED_AUTHEN_COUNT (8U)

#define	CCM_GPR_SHARED_AUTHEN_SET_COUNT (8U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_COUNT (8U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_COUNT (8U)

#define	CCM_OSCPLL_DIRECT_COUNT (29U)

#define	CCM_OSCPLL_DOMAIN_COUNT (29U)

#define	CCM_OSCPLL_SETPOINT_COUNT (29U)

#define	CCM_OSCPLL_STATUS0_COUNT (29U)

#define	CCM_OSCPLL_STATUS1_COUNT (29U)

#define	CCM_OSCPLL_CONFIG_COUNT (29U)

#define	CCM_OSCPLL_AUTHEN_COUNT (29U)

#define	CCM_LPCG_DIRECT_COUNT (138U)

#define	CCM_LPCG_DOMAIN_COUNT (138U)

#define	CCM_LPCG_SETPOINT_COUNT (138U)

#define	CCM_LPCG_STATUS0_COUNT (138U)

#define	CCM_LPCG_STATUS1_COUNT (138U)

#define	CCM_LPCG_CONFIG_COUNT (138U)

#define	CCM_LPCG_AUTHEN_COUNT (138U)

#define	CCM_CLOCK_ROOT_CONTROL_COUNT (79U)

#define	CCM_CLOCK_ROOT_CONTROL_SET_COUNT (79U)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_COUNT (79U)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_COUNT (79U)

#define	CCM_CLOCK_ROOT_STATUS0_COUNT (79U)

#define	CCM_CLOCK_ROOT_STATUS1_COUNT (79U)

#define	CCM_CLOCK_ROOT_CONFIG_COUNT (79U)

#define	CCM_CLOCK_ROOT_AUTHEN_COUNT (79U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_COUNT (79U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_COUNT (79U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_COUNT (79U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_COUNT (79U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_COUNT2 (16U)

#define	CCM_CLOCK_GROUP_CONTROL_COUNT (2U)

#define	CCM_CLOCK_GROUP_CONTROL_SET_COUNT (2U)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_COUNT (2U)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_COUNT (2U)

#define	CCM_CLOCK_GROUP_STATUS0_COUNT (2U)

#define	CCM_CLOCK_GROUP_STATUS1_COUNT (2U)

#define	CCM_CLOCK_GROUP_CONFIG_COUNT (2U)

#define	CCM_CLOCK_GROUP_AUTHEN_COUNT (2U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_COUNT (2U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_COUNT (2U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_COUNT (2U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_COUNT (2U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_COUNT2 (16U)

#define	CCM_GPR_SHARED_COUNT (8U)

#define	CCM_GPR_SHARED_SET_COUNT (8U)

#define	CCM_GPR_SHARED_CLR_COUNT (8U)

#define	CCM_GPR_SHARED_TOG_COUNT (8U)

#define	CCM_GPR_SHARED_AUTHEN_COUNT (8U)

#define	CCM_GPR_SHARED_AUTHEN_SET_COUNT (8U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_COUNT (8U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_COUNT (8U)

#define	CCM_OSCPLL_DIRECT_COUNT (29U)

#define	CCM_OSCPLL_DOMAIN_COUNT (29U)

#define	CCM_OSCPLL_SETPOINT_COUNT (29U)

#define	CCM_OSCPLL_STATUS0_COUNT (29U)

#define	CCM_OSCPLL_STATUS1_COUNT (29U)

#define	CCM_OSCPLL_CONFIG_COUNT (29U)

#define	CCM_OSCPLL_AUTHEN_COUNT (29U)

#define	CCM_LPCG_DIRECT_COUNT (138U)

#define	CCM_LPCG_DOMAIN_COUNT (138U)

#define	CCM_LPCG_SETPOINT_COUNT (138U)

#define	CCM_LPCG_STATUS0_COUNT (138U)

#define	CCM_LPCG_STATUS1_COUNT (138U)

#define	CCM_LPCG_CONFIG_COUNT (138U)

#define	CCM_LPCG_AUTHEN_COUNT (138U)

CCR - CCM Control Register
#define	CCM_CCR_OSCNT_MASK (0xFFU)

#define	CCM_CCR_OSCNT_SHIFT (0U)

#define	CCM_CCR_OSCNT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCR_OSCNT_SHIFT)) & CCM_CCR_OSCNT_MASK)

#define	CCM_CCR_COSC_EN_MASK (0x1000U)

#define	CCM_CCR_COSC_EN_SHIFT (12U)

#define	CCM_CCR_COSC_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCR_COSC_EN_SHIFT)) & CCM_CCR_COSC_EN_MASK)

#define	CCM_CCR_REG_BYPASS_COUNT_MASK (0x7E00000U)

#define	CCM_CCR_REG_BYPASS_COUNT_SHIFT (21U)

#define	CCM_CCR_REG_BYPASS_COUNT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCR_REG_BYPASS_COUNT_SHIFT)) & CCM_CCR_REG_BYPASS_COUNT_MASK)

#define	CCM_CCR_RBC_EN_MASK (0x8000000U)

#define	CCM_CCR_RBC_EN_SHIFT (27U)

#define	CCM_CCR_RBC_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCR_RBC_EN_SHIFT)) & CCM_CCR_RBC_EN_MASK)

CSR - CCM Status Register
#define	CCM_CSR_REF_EN_B_MASK (0x1U)

#define	CCM_CSR_REF_EN_B_SHIFT (0U)

#define	CCM_CSR_REF_EN_B(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSR_REF_EN_B_SHIFT)) & CCM_CSR_REF_EN_B_MASK)

#define	CCM_CSR_CAMP2_READY_MASK (0x8U)

#define	CCM_CSR_CAMP2_READY_SHIFT (3U)

#define	CCM_CSR_CAMP2_READY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSR_CAMP2_READY_SHIFT)) & CCM_CSR_CAMP2_READY_MASK)

#define	CCM_CSR_COSC_READY_MASK (0x20U)

#define	CCM_CSR_COSC_READY_SHIFT (5U)

#define	CCM_CSR_COSC_READY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSR_COSC_READY_SHIFT)) & CCM_CSR_COSC_READY_MASK)

CCSR - CCM Clock Switcher Register
#define	CCM_CCSR_PLL3_SW_CLK_SEL_MASK (0x1U)

#define	CCM_CCSR_PLL3_SW_CLK_SEL_SHIFT (0U)

#define	CCM_CCSR_PLL3_SW_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCSR_PLL3_SW_CLK_SEL_SHIFT)) & CCM_CCSR_PLL3_SW_CLK_SEL_MASK)

CACRR - CCM Arm Clock Root Register
#define	CCM_CACRR_ARM_PODF_MASK (0x7U)

#define	CCM_CACRR_ARM_PODF_SHIFT (0U)

#define	CCM_CACRR_ARM_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CACRR_ARM_PODF_SHIFT)) & CCM_CACRR_ARM_PODF_MASK)

CBCDR - CCM Bus Clock Divider Register
#define	CCM_CBCDR_SEMC_CLK_SEL_MASK (0x40U)

#define	CCM_CBCDR_SEMC_CLK_SEL_SHIFT (6U)

#define	CCM_CBCDR_SEMC_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_CLK_SEL_SHIFT)) & CCM_CBCDR_SEMC_CLK_SEL_MASK)

#define	CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK (0x80U)

#define	CCM_CBCDR_SEMC_ALT_CLK_SEL_SHIFT (7U)

#define	CCM_CBCDR_SEMC_ALT_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_ALT_CLK_SEL_SHIFT)) & CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK)

#define	CCM_CBCDR_IPG_PODF_MASK (0x300U)

#define	CCM_CBCDR_IPG_PODF_SHIFT (8U)

#define	CCM_CBCDR_IPG_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_IPG_PODF_SHIFT)) & CCM_CBCDR_IPG_PODF_MASK)

#define	CCM_CBCDR_AHB_PODF_MASK (0x1C00U)

#define	CCM_CBCDR_AHB_PODF_SHIFT (10U)

#define	CCM_CBCDR_AHB_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_AHB_PODF_SHIFT)) & CCM_CBCDR_AHB_PODF_MASK)

#define	CCM_CBCDR_SEMC_PODF_MASK (0x70000U)

#define	CCM_CBCDR_SEMC_PODF_SHIFT (16U)

#define	CCM_CBCDR_SEMC_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_PODF_SHIFT)) & CCM_CBCDR_SEMC_PODF_MASK)

#define	CCM_CBCDR_PERIPH_CLK_SEL_MASK (0x2000000U)

#define	CCM_CBCDR_PERIPH_CLK_SEL_SHIFT (25U)

#define	CCM_CBCDR_PERIPH_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_PERIPH_CLK_SEL_SHIFT)) & CCM_CBCDR_PERIPH_CLK_SEL_MASK)

#define	CCM_CBCDR_PERIPH_CLK2_PODF_MASK (0x38000000U)

#define	CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT (27U)

#define	CCM_CBCDR_PERIPH_CLK2_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT)) & CCM_CBCDR_PERIPH_CLK2_PODF_MASK)

CBCMR - CCM Bus Clock Multiplexer Register
#define	CCM_CBCMR_LPSPI_CLK_SEL_MASK (0x30U)

#define	CCM_CBCMR_LPSPI_CLK_SEL_SHIFT (4U)

#define	CCM_CBCMR_LPSPI_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LPSPI_CLK_SEL_SHIFT)) & CCM_CBCMR_LPSPI_CLK_SEL_MASK)

#define	CCM_CBCMR_PERIPH_CLK2_SEL_MASK (0x3000U)

#define	CCM_CBCMR_PERIPH_CLK2_SEL_SHIFT (12U)

#define	CCM_CBCMR_PERIPH_CLK2_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_PERIPH_CLK2_SEL_SHIFT)) & CCM_CBCMR_PERIPH_CLK2_SEL_MASK)

#define	CCM_CBCMR_TRACE_CLK_SEL_MASK (0xC000U)

#define	CCM_CBCMR_TRACE_CLK_SEL_SHIFT (14U)

#define	CCM_CBCMR_TRACE_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_TRACE_CLK_SEL_SHIFT)) & CCM_CBCMR_TRACE_CLK_SEL_MASK)

#define	CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK (0xC0000U)

#define	CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT (18U)

#define	CCM_CBCMR_PRE_PERIPH_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT)) & CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK)

#define	CCM_CBCMR_LCDIF_PODF_MASK (0x3800000U)

#define	CCM_CBCMR_LCDIF_PODF_SHIFT (23U)

#define	CCM_CBCMR_LCDIF_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LCDIF_PODF_SHIFT)) & CCM_CBCMR_LCDIF_PODF_MASK)

#define	CCM_CBCMR_LPSPI_PODF_MASK (0x1C000000U)

#define	CCM_CBCMR_LPSPI_PODF_SHIFT (26U)

#define	CCM_CBCMR_LPSPI_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LPSPI_PODF_SHIFT)) & CCM_CBCMR_LPSPI_PODF_MASK)

CSCMR1 - CCM Serial Clock Multiplexer Register 1
#define	CCM_CSCMR1_PERCLK_PODF_MASK (0x3FU)

#define	CCM_CSCMR1_PERCLK_PODF_SHIFT (0U)

#define	CCM_CSCMR1_PERCLK_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_PERCLK_PODF_SHIFT)) & CCM_CSCMR1_PERCLK_PODF_MASK)

#define	CCM_CSCMR1_PERCLK_CLK_SEL_MASK (0x40U)

#define	CCM_CSCMR1_PERCLK_CLK_SEL_SHIFT (6U)

#define	CCM_CSCMR1_PERCLK_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_PERCLK_CLK_SEL_SHIFT)) & CCM_CSCMR1_PERCLK_CLK_SEL_MASK)

#define	CCM_CSCMR1_SAI1_CLK_SEL_MASK (0xC00U)

#define	CCM_CSCMR1_SAI1_CLK_SEL_SHIFT (10U)

#define	CCM_CSCMR1_SAI1_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI1_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI1_CLK_SEL_MASK)

#define	CCM_CSCMR1_SAI2_CLK_SEL_MASK (0x3000U)

#define	CCM_CSCMR1_SAI2_CLK_SEL_SHIFT (12U)

#define	CCM_CSCMR1_SAI2_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI2_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI2_CLK_SEL_MASK)

#define	CCM_CSCMR1_SAI3_CLK_SEL_MASK (0xC000U)

#define	CCM_CSCMR1_SAI3_CLK_SEL_SHIFT (14U)

#define	CCM_CSCMR1_SAI3_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI3_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI3_CLK_SEL_MASK)

#define	CCM_CSCMR1_USDHC1_CLK_SEL_MASK (0x10000U)

#define	CCM_CSCMR1_USDHC1_CLK_SEL_SHIFT (16U)

#define	CCM_CSCMR1_USDHC1_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_USDHC1_CLK_SEL_SHIFT)) & CCM_CSCMR1_USDHC1_CLK_SEL_MASK)

#define	CCM_CSCMR1_USDHC2_CLK_SEL_MASK (0x20000U)

#define	CCM_CSCMR1_USDHC2_CLK_SEL_SHIFT (17U)

#define	CCM_CSCMR1_USDHC2_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_USDHC2_CLK_SEL_SHIFT)) & CCM_CSCMR1_USDHC2_CLK_SEL_MASK)

#define	CCM_CSCMR1_FLEXSPI_PODF_MASK (0x3800000U)

#define	CCM_CSCMR1_FLEXSPI_PODF_SHIFT (23U)

#define	CCM_CSCMR1_FLEXSPI_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_FLEXSPI_PODF_SHIFT)) & CCM_CSCMR1_FLEXSPI_PODF_MASK)

#define	CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK (0x60000000U)

#define	CCM_CSCMR1_FLEXSPI_CLK_SEL_SHIFT (29U)

#define	CCM_CSCMR1_FLEXSPI_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_FLEXSPI_CLK_SEL_SHIFT)) & CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK)

CSCMR2 - CCM Serial Clock Multiplexer Register 2
#define	CCM_CSCMR2_CAN_CLK_PODF_MASK (0xFCU)

#define	CCM_CSCMR2_CAN_CLK_PODF_SHIFT (2U)

#define	CCM_CSCMR2_CAN_CLK_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_CAN_CLK_PODF_SHIFT)) & CCM_CSCMR2_CAN_CLK_PODF_MASK)

#define	CCM_CSCMR2_CAN_CLK_SEL_MASK (0x300U)

#define	CCM_CSCMR2_CAN_CLK_SEL_SHIFT (8U)

#define	CCM_CSCMR2_CAN_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_CAN_CLK_SEL_SHIFT)) & CCM_CSCMR2_CAN_CLK_SEL_MASK)

#define	CCM_CSCMR2_FLEXIO2_CLK_SEL_MASK (0x180000U)

#define	CCM_CSCMR2_FLEXIO2_CLK_SEL_SHIFT (19U)

#define	CCM_CSCMR2_FLEXIO2_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_FLEXIO2_CLK_SEL_SHIFT)) & CCM_CSCMR2_FLEXIO2_CLK_SEL_MASK)

CSCDR1 - CCM Serial Clock Divider Register 1
#define	CCM_CSCDR1_UART_CLK_PODF_MASK (0x3FU)

#define	CCM_CSCDR1_UART_CLK_PODF_SHIFT (0U)

#define	CCM_CSCDR1_UART_CLK_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_UART_CLK_PODF_SHIFT)) & CCM_CSCDR1_UART_CLK_PODF_MASK)

#define	CCM_CSCDR1_UART_CLK_SEL_MASK (0x40U)

#define	CCM_CSCDR1_UART_CLK_SEL_SHIFT (6U)

#define	CCM_CSCDR1_UART_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_UART_CLK_SEL_SHIFT)) & CCM_CSCDR1_UART_CLK_SEL_MASK)

#define	CCM_CSCDR1_USDHC1_PODF_MASK (0x3800U)

#define	CCM_CSCDR1_USDHC1_PODF_SHIFT (11U)

#define	CCM_CSCDR1_USDHC1_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_USDHC1_PODF_SHIFT)) & CCM_CSCDR1_USDHC1_PODF_MASK)

#define	CCM_CSCDR1_USDHC2_PODF_MASK (0x70000U)

#define	CCM_CSCDR1_USDHC2_PODF_SHIFT (16U)

#define	CCM_CSCDR1_USDHC2_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_USDHC2_PODF_SHIFT)) & CCM_CSCDR1_USDHC2_PODF_MASK)

#define	CCM_CSCDR1_TRACE_PODF_MASK (0x6000000U)

#define	CCM_CSCDR1_TRACE_PODF_SHIFT (25U)

#define	CCM_CSCDR1_TRACE_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_TRACE_PODF_SHIFT)) & CCM_CSCDR1_TRACE_PODF_MASK)

CS1CDR - CCM Clock Divider Register
#define	CCM_CS1CDR_SAI1_CLK_PODF_MASK (0x3FU)

#define	CCM_CS1CDR_SAI1_CLK_PODF_SHIFT (0U)

#define	CCM_CS1CDR_SAI1_CLK_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI1_CLK_PODF_SHIFT)) & CCM_CS1CDR_SAI1_CLK_PODF_MASK)

#define	CCM_CS1CDR_SAI1_CLK_PRED_MASK (0x1C0U)

#define	CCM_CS1CDR_SAI1_CLK_PRED_SHIFT (6U)

#define	CCM_CS1CDR_SAI1_CLK_PRED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI1_CLK_PRED_SHIFT)) & CCM_CS1CDR_SAI1_CLK_PRED_MASK)

#define	CCM_CS1CDR_FLEXIO2_CLK_PRED_MASK (0xE00U)

#define	CCM_CS1CDR_FLEXIO2_CLK_PRED_SHIFT (9U)

#define	CCM_CS1CDR_FLEXIO2_CLK_PRED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_FLEXIO2_CLK_PRED_SHIFT)) & CCM_CS1CDR_FLEXIO2_CLK_PRED_MASK)

#define	CCM_CS1CDR_SAI3_CLK_PODF_MASK (0x3F0000U)

#define	CCM_CS1CDR_SAI3_CLK_PODF_SHIFT (16U)

#define	CCM_CS1CDR_SAI3_CLK_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI3_CLK_PODF_SHIFT)) & CCM_CS1CDR_SAI3_CLK_PODF_MASK)

#define	CCM_CS1CDR_SAI3_CLK_PRED_MASK (0x1C00000U)

#define	CCM_CS1CDR_SAI3_CLK_PRED_SHIFT (22U)

#define	CCM_CS1CDR_SAI3_CLK_PRED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI3_CLK_PRED_SHIFT)) & CCM_CS1CDR_SAI3_CLK_PRED_MASK)

#define	CCM_CS1CDR_FLEXIO2_CLK_PODF_MASK (0xE000000U)

#define	CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT (25U)

#define	CCM_CS1CDR_FLEXIO2_CLK_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT)) & CCM_CS1CDR_FLEXIO2_CLK_PODF_MASK)

CS2CDR - CCM Clock Divider Register
#define	CCM_CS2CDR_SAI2_CLK_PODF_MASK (0x3FU)

#define	CCM_CS2CDR_SAI2_CLK_PODF_SHIFT (0U)

#define	CCM_CS2CDR_SAI2_CLK_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CS2CDR_SAI2_CLK_PODF_SHIFT)) & CCM_CS2CDR_SAI2_CLK_PODF_MASK)

#define	CCM_CS2CDR_SAI2_CLK_PRED_MASK (0x1C0U)

#define	CCM_CS2CDR_SAI2_CLK_PRED_SHIFT (6U)

#define	CCM_CS2CDR_SAI2_CLK_PRED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CS2CDR_SAI2_CLK_PRED_SHIFT)) & CCM_CS2CDR_SAI2_CLK_PRED_MASK)

CDCDR - CCM D1 Clock Divider Register
#define	CCM_CDCDR_FLEXIO1_CLK_SEL_MASK (0x180U)

#define	CCM_CDCDR_FLEXIO1_CLK_SEL_SHIFT (7U)

#define	CCM_CDCDR_FLEXIO1_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_SEL_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_SEL_MASK)

#define	CCM_CDCDR_FLEXIO1_CLK_PODF_MASK (0xE00U)

#define	CCM_CDCDR_FLEXIO1_CLK_PODF_SHIFT (9U)

#define	CCM_CDCDR_FLEXIO1_CLK_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_PODF_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_PODF_MASK)

#define	CCM_CDCDR_FLEXIO1_CLK_PRED_MASK (0x7000U)

#define	CCM_CDCDR_FLEXIO1_CLK_PRED_SHIFT (12U)

#define	CCM_CDCDR_FLEXIO1_CLK_PRED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_PRED_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_PRED_MASK)

#define	CCM_CDCDR_SPDIF0_CLK_SEL_MASK (0x300000U)

#define	CCM_CDCDR_SPDIF0_CLK_SEL_SHIFT (20U)

#define	CCM_CDCDR_SPDIF0_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_SEL_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_SEL_MASK)

#define	CCM_CDCDR_SPDIF0_CLK_PODF_MASK (0x1C00000U)

#define	CCM_CDCDR_SPDIF0_CLK_PODF_SHIFT (22U)

#define	CCM_CDCDR_SPDIF0_CLK_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_PODF_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_PODF_MASK)

#define	CCM_CDCDR_SPDIF0_CLK_PRED_MASK (0xE000000U)

#define	CCM_CDCDR_SPDIF0_CLK_PRED_SHIFT (25U)

#define	CCM_CDCDR_SPDIF0_CLK_PRED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_PRED_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_PRED_MASK)

CSCDR2 - CCM Serial Clock Divider Register 2
#define	CCM_CSCDR2_LCDIF_PRED_MASK (0x7000U)

#define	CCM_CSCDR2_LCDIF_PRED_SHIFT (12U)

#define	CCM_CSCDR2_LCDIF_PRED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LCDIF_PRED_SHIFT)) & CCM_CSCDR2_LCDIF_PRED_MASK)

#define	CCM_CSCDR2_LCDIF_PRE_CLK_SEL_MASK (0x38000U)

#define	CCM_CSCDR2_LCDIF_PRE_CLK_SEL_SHIFT (15U)

#define	CCM_CSCDR2_LCDIF_PRE_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LCDIF_PRE_CLK_SEL_SHIFT)) & CCM_CSCDR2_LCDIF_PRE_CLK_SEL_MASK)

#define	CCM_CSCDR2_LPI2C_CLK_SEL_MASK (0x40000U)

#define	CCM_CSCDR2_LPI2C_CLK_SEL_SHIFT (18U)

#define	CCM_CSCDR2_LPI2C_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LPI2C_CLK_SEL_SHIFT)) & CCM_CSCDR2_LPI2C_CLK_SEL_MASK)

#define	CCM_CSCDR2_LPI2C_CLK_PODF_MASK (0x1F80000U)

#define	CCM_CSCDR2_LPI2C_CLK_PODF_SHIFT (19U)

#define	CCM_CSCDR2_LPI2C_CLK_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LPI2C_CLK_PODF_SHIFT)) & CCM_CSCDR2_LPI2C_CLK_PODF_MASK)

CSCDR3 - CCM Serial Clock Divider Register 3
#define	CCM_CSCDR3_CSI_CLK_SEL_MASK (0x600U)

#define	CCM_CSCDR3_CSI_CLK_SEL_SHIFT (9U)

#define	CCM_CSCDR3_CSI_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR3_CSI_CLK_SEL_SHIFT)) & CCM_CSCDR3_CSI_CLK_SEL_MASK)

#define	CCM_CSCDR3_CSI_PODF_MASK (0x3800U)

#define	CCM_CSCDR3_CSI_PODF_SHIFT (11U)

#define	CCM_CSCDR3_CSI_PODF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR3_CSI_PODF_SHIFT)) & CCM_CSCDR3_CSI_PODF_MASK)

CDHIPR - CCM Divider Handshake In-Process Register
#define	CCM_CDHIPR_SEMC_PODF_BUSY_MASK (0x1U)

#define	CCM_CDHIPR_SEMC_PODF_BUSY_SHIFT (0U)

#define	CCM_CDHIPR_SEMC_PODF_BUSY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_SEMC_PODF_BUSY_SHIFT)) & CCM_CDHIPR_SEMC_PODF_BUSY_MASK)

#define	CCM_CDHIPR_AHB_PODF_BUSY_MASK (0x2U)

#define	CCM_CDHIPR_AHB_PODF_BUSY_SHIFT (1U)

#define	CCM_CDHIPR_AHB_PODF_BUSY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_AHB_PODF_BUSY_SHIFT)) & CCM_CDHIPR_AHB_PODF_BUSY_MASK)

#define	CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_MASK (0x8U)

#define	CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_SHIFT (3U)

#define	CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_SHIFT)) & CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_MASK)

#define	CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_MASK (0x20U)

#define	CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_SHIFT (5U)

#define	CCM_CDHIPR_PERIPH_CLK_SEL_BUSY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_SHIFT)) & CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_MASK)

#define	CCM_CDHIPR_ARM_PODF_BUSY_MASK (0x10000U)

#define	CCM_CDHIPR_ARM_PODF_BUSY_SHIFT (16U)

#define	CCM_CDHIPR_ARM_PODF_BUSY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_ARM_PODF_BUSY_SHIFT)) & CCM_CDHIPR_ARM_PODF_BUSY_MASK)

CLPCR - CCM Low Power Control Register
#define	CCM_CLPCR_LPM_MASK (0x3U)

#define	CCM_CLPCR_LPM_SHIFT (0U)

#define	CCM_CLPCR_LPM(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_LPM_SHIFT)) & CCM_CLPCR_LPM_MASK)

#define	CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK (0x20U)

#define	CCM_CLPCR_ARM_CLK_DIS_ON_LPM_SHIFT (5U)

#define	CCM_CLPCR_ARM_CLK_DIS_ON_LPM(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_ARM_CLK_DIS_ON_LPM_SHIFT)) & CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK)

#define	CCM_CLPCR_SBYOS_MASK (0x40U)

#define	CCM_CLPCR_SBYOS_SHIFT (6U)

#define	CCM_CLPCR_SBYOS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_SBYOS_SHIFT)) & CCM_CLPCR_SBYOS_MASK)

#define	CCM_CLPCR_DIS_REF_OSC_MASK (0x80U)

#define	CCM_CLPCR_DIS_REF_OSC_SHIFT (7U)

#define	CCM_CLPCR_DIS_REF_OSC(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_DIS_REF_OSC_SHIFT)) & CCM_CLPCR_DIS_REF_OSC_MASK)

#define	CCM_CLPCR_VSTBY_MASK (0x100U)

#define	CCM_CLPCR_VSTBY_SHIFT (8U)

#define	CCM_CLPCR_VSTBY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_VSTBY_SHIFT)) & CCM_CLPCR_VSTBY_MASK)

#define	CCM_CLPCR_STBY_COUNT_MASK (0x600U)

#define	CCM_CLPCR_STBY_COUNT_SHIFT (9U)

#define	CCM_CLPCR_STBY_COUNT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_STBY_COUNT_SHIFT)) & CCM_CLPCR_STBY_COUNT_MASK)

#define	CCM_CLPCR_COSC_PWRDOWN_MASK (0x800U)

#define	CCM_CLPCR_COSC_PWRDOWN_SHIFT (11U)

#define	CCM_CLPCR_COSC_PWRDOWN(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_COSC_PWRDOWN_SHIFT)) & CCM_CLPCR_COSC_PWRDOWN_MASK)

#define	CCM_CLPCR_BYPASS_LPM_HS1_MASK (0x80000U)

#define	CCM_CLPCR_BYPASS_LPM_HS1_SHIFT (19U)

#define	CCM_CLPCR_BYPASS_LPM_HS1(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_BYPASS_LPM_HS1_SHIFT)) & CCM_CLPCR_BYPASS_LPM_HS1_MASK)

#define	CCM_CLPCR_BYPASS_LPM_HS0_MASK (0x200000U)

#define	CCM_CLPCR_BYPASS_LPM_HS0_SHIFT (21U)

#define	CCM_CLPCR_BYPASS_LPM_HS0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_BYPASS_LPM_HS0_SHIFT)) & CCM_CLPCR_BYPASS_LPM_HS0_MASK)

#define	CCM_CLPCR_MASK_CORE0_WFI_MASK (0x400000U)

#define	CCM_CLPCR_MASK_CORE0_WFI_SHIFT (22U)

#define	CCM_CLPCR_MASK_CORE0_WFI(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_CORE0_WFI_SHIFT)) & CCM_CLPCR_MASK_CORE0_WFI_MASK)

#define	CCM_CLPCR_MASK_SCU_IDLE_MASK (0x4000000U)

#define	CCM_CLPCR_MASK_SCU_IDLE_SHIFT (26U)

#define	CCM_CLPCR_MASK_SCU_IDLE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_SCU_IDLE_SHIFT)) & CCM_CLPCR_MASK_SCU_IDLE_MASK)

#define	CCM_CLPCR_MASK_L2CC_IDLE_MASK (0x8000000U)

#define	CCM_CLPCR_MASK_L2CC_IDLE_SHIFT (27U)

#define	CCM_CLPCR_MASK_L2CC_IDLE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_L2CC_IDLE_SHIFT)) & CCM_CLPCR_MASK_L2CC_IDLE_MASK)

CISR - CCM Interrupt Status Register
#define	CCM_CISR_LRF_PLL_MASK (0x1U)

#define	CCM_CISR_LRF_PLL_SHIFT (0U)

#define	CCM_CISR_LRF_PLL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_LRF_PLL_SHIFT)) & CCM_CISR_LRF_PLL_MASK)

#define	CCM_CISR_COSC_READY_MASK (0x40U)

#define	CCM_CISR_COSC_READY_SHIFT (6U)

#define	CCM_CISR_COSC_READY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_COSC_READY_SHIFT)) & CCM_CISR_COSC_READY_MASK)

#define	CCM_CISR_SEMC_PODF_LOADED_MASK (0x20000U)

#define	CCM_CISR_SEMC_PODF_LOADED_SHIFT (17U)

#define	CCM_CISR_SEMC_PODF_LOADED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_SEMC_PODF_LOADED_SHIFT)) & CCM_CISR_SEMC_PODF_LOADED_MASK)

#define	CCM_CISR_PERIPH2_CLK_SEL_LOADED_MASK (0x80000U)

#define	CCM_CISR_PERIPH2_CLK_SEL_LOADED_SHIFT (19U)

#define	CCM_CISR_PERIPH2_CLK_SEL_LOADED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_PERIPH2_CLK_SEL_LOADED_SHIFT)) & CCM_CISR_PERIPH2_CLK_SEL_LOADED_MASK)

#define	CCM_CISR_AHB_PODF_LOADED_MASK (0x100000U)

#define	CCM_CISR_AHB_PODF_LOADED_SHIFT (20U)

#define	CCM_CISR_AHB_PODF_LOADED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_AHB_PODF_LOADED_SHIFT)) & CCM_CISR_AHB_PODF_LOADED_MASK)

#define	CCM_CISR_PERIPH_CLK_SEL_LOADED_MASK (0x400000U)

#define	CCM_CISR_PERIPH_CLK_SEL_LOADED_SHIFT (22U)

#define	CCM_CISR_PERIPH_CLK_SEL_LOADED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_PERIPH_CLK_SEL_LOADED_SHIFT)) & CCM_CISR_PERIPH_CLK_SEL_LOADED_MASK)

#define	CCM_CISR_ARM_PODF_LOADED_MASK (0x4000000U)

#define	CCM_CISR_ARM_PODF_LOADED_SHIFT (26U)

#define	CCM_CISR_ARM_PODF_LOADED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_ARM_PODF_LOADED_SHIFT)) & CCM_CISR_ARM_PODF_LOADED_MASK)

CIMR - CCM Interrupt Mask Register
#define	CCM_CIMR_MASK_LRF_PLL_MASK (0x1U)

#define	CCM_CIMR_MASK_LRF_PLL_SHIFT (0U)

#define	CCM_CIMR_MASK_LRF_PLL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_LRF_PLL_SHIFT)) & CCM_CIMR_MASK_LRF_PLL_MASK)

#define	CCM_CIMR_MASK_COSC_READY_MASK (0x40U)

#define	CCM_CIMR_MASK_COSC_READY_SHIFT (6U)

#define	CCM_CIMR_MASK_COSC_READY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_COSC_READY_SHIFT)) & CCM_CIMR_MASK_COSC_READY_MASK)

#define	CCM_CIMR_MASK_SEMC_PODF_LOADED_MASK (0x20000U)

#define	CCM_CIMR_MASK_SEMC_PODF_LOADED_SHIFT (17U)

#define	CCM_CIMR_MASK_SEMC_PODF_LOADED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_SEMC_PODF_LOADED_SHIFT)) & CCM_CIMR_MASK_SEMC_PODF_LOADED_MASK)

#define	CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_MASK (0x80000U)

#define	CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_SHIFT (19U)

#define	CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_SHIFT)) & CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_MASK)

#define	CCM_CIMR_MASK_AHB_PODF_LOADED_MASK (0x100000U)

#define	CCM_CIMR_MASK_AHB_PODF_LOADED_SHIFT (20U)

#define	CCM_CIMR_MASK_AHB_PODF_LOADED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_AHB_PODF_LOADED_SHIFT)) & CCM_CIMR_MASK_AHB_PODF_LOADED_MASK)

#define	CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_MASK (0x400000U)

#define	CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_SHIFT (22U)

#define	CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_SHIFT)) & CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_MASK)

#define	CCM_CIMR_ARM_PODF_LOADED_MASK (0x4000000U)

#define	CCM_CIMR_ARM_PODF_LOADED_SHIFT (26U)

#define	CCM_CIMR_ARM_PODF_LOADED(x) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_ARM_PODF_LOADED_SHIFT)) & CCM_CIMR_ARM_PODF_LOADED_MASK)

CCOSR - CCM Clock Output Source Register
#define	CCM_CCOSR_CLKO1_SEL_MASK (0xFU)

#define	CCM_CCOSR_CLKO1_SEL_SHIFT (0U)

#define	CCM_CCOSR_CLKO1_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_SEL_SHIFT)) & CCM_CCOSR_CLKO1_SEL_MASK)

#define	CCM_CCOSR_CLKO1_DIV_MASK (0x70U)

#define	CCM_CCOSR_CLKO1_DIV_SHIFT (4U)

#define	CCM_CCOSR_CLKO1_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_DIV_SHIFT)) & CCM_CCOSR_CLKO1_DIV_MASK)

#define	CCM_CCOSR_CLKO1_EN_MASK (0x80U)

#define	CCM_CCOSR_CLKO1_EN_SHIFT (7U)

#define	CCM_CCOSR_CLKO1_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_EN_SHIFT)) & CCM_CCOSR_CLKO1_EN_MASK)

#define	CCM_CCOSR_CLK_OUT_SEL_MASK (0x100U)

#define	CCM_CCOSR_CLK_OUT_SEL_SHIFT (8U)

#define	CCM_CCOSR_CLK_OUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLK_OUT_SEL_SHIFT)) & CCM_CCOSR_CLK_OUT_SEL_MASK)

#define	CCM_CCOSR_CLKO2_SEL_MASK (0x1F0000U)

#define	CCM_CCOSR_CLKO2_SEL_SHIFT (16U)

#define	CCM_CCOSR_CLKO2_SEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_SEL_SHIFT)) & CCM_CCOSR_CLKO2_SEL_MASK)

#define	CCM_CCOSR_CLKO2_DIV_MASK (0xE00000U)

#define	CCM_CCOSR_CLKO2_DIV_SHIFT (21U)

#define	CCM_CCOSR_CLKO2_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_DIV_SHIFT)) & CCM_CCOSR_CLKO2_DIV_MASK)

#define	CCM_CCOSR_CLKO2_EN_MASK (0x1000000U)

#define	CCM_CCOSR_CLKO2_EN_SHIFT (24U)

#define	CCM_CCOSR_CLKO2_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_EN_SHIFT)) & CCM_CCOSR_CLKO2_EN_MASK)

CGPR - CCM General Purpose Register
#define	CCM_CGPR_PMIC_DELAY_SCALER_MASK (0x1U)

#define	CCM_CGPR_PMIC_DELAY_SCALER_SHIFT (0U)

#define	CCM_CGPR_PMIC_DELAY_SCALER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_PMIC_DELAY_SCALER_SHIFT)) & CCM_CGPR_PMIC_DELAY_SCALER_MASK)

#define	CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_MASK (0x10U)

#define	CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_SHIFT (4U)

#define	CCM_CGPR_EFUSE_PROG_SUPPLY_GATE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_SHIFT)) & CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_MASK)

#define	CCM_CGPR_SYS_MEM_DS_CTRL_MASK (0xC000U)

#define	CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT (14U)

#define	CCM_CGPR_SYS_MEM_DS_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT)) & CCM_CGPR_SYS_MEM_DS_CTRL_MASK)

#define	CCM_CGPR_FPL_MASK (0x10000U)

#define	CCM_CGPR_FPL_SHIFT (16U)

#define	CCM_CGPR_FPL(x) (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_FPL_SHIFT)) & CCM_CGPR_FPL_MASK)

#define	CCM_CGPR_INT_MEM_CLK_LPM_MASK (0x20000U)

#define	CCM_CGPR_INT_MEM_CLK_LPM_SHIFT (17U)

#define	CCM_CGPR_INT_MEM_CLK_LPM(x) (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_INT_MEM_CLK_LPM_SHIFT)) & CCM_CGPR_INT_MEM_CLK_LPM_MASK)

CCGR0 - CCM Clock Gating Register 0
#define	CCM_CCGR0_CG0_MASK (0x3U)

#define	CCM_CCGR0_CG0_SHIFT (0U)

#define	CCM_CCGR0_CG0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG0_SHIFT)) & CCM_CCGR0_CG0_MASK)

#define	CCM_CCGR0_CG1_MASK (0xCU)

#define	CCM_CCGR0_CG1_SHIFT (2U)

#define	CCM_CCGR0_CG1(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG1_SHIFT)) & CCM_CCGR0_CG1_MASK)

#define	CCM_CCGR0_CG2_MASK (0x30U)

#define	CCM_CCGR0_CG2_SHIFT (4U)

#define	CCM_CCGR0_CG2(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG2_SHIFT)) & CCM_CCGR0_CG2_MASK)

#define	CCM_CCGR0_CG3_MASK (0xC0U)

#define	CCM_CCGR0_CG3_SHIFT (6U)

#define	CCM_CCGR0_CG3(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG3_SHIFT)) & CCM_CCGR0_CG3_MASK)

#define	CCM_CCGR0_CG4_MASK (0x300U)

#define	CCM_CCGR0_CG4_SHIFT (8U)

#define	CCM_CCGR0_CG4(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG4_SHIFT)) & CCM_CCGR0_CG4_MASK)

#define	CCM_CCGR0_CG5_MASK (0xC00U)

#define	CCM_CCGR0_CG5_SHIFT (10U)

#define	CCM_CCGR0_CG5(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG5_SHIFT)) & CCM_CCGR0_CG5_MASK)

#define	CCM_CCGR0_CG6_MASK (0x3000U)

#define	CCM_CCGR0_CG6_SHIFT (12U)

#define	CCM_CCGR0_CG6(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG6_SHIFT)) & CCM_CCGR0_CG6_MASK)

#define	CCM_CCGR0_CG7_MASK (0xC000U)

#define	CCM_CCGR0_CG7_SHIFT (14U)

#define	CCM_CCGR0_CG7(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG7_SHIFT)) & CCM_CCGR0_CG7_MASK)

#define	CCM_CCGR0_CG8_MASK (0x30000U)

#define	CCM_CCGR0_CG8_SHIFT (16U)

#define	CCM_CCGR0_CG8(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG8_SHIFT)) & CCM_CCGR0_CG8_MASK)

#define	CCM_CCGR0_CG9_MASK (0xC0000U)

#define	CCM_CCGR0_CG9_SHIFT (18U)

#define	CCM_CCGR0_CG9(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG9_SHIFT)) & CCM_CCGR0_CG9_MASK)

#define	CCM_CCGR0_CG10_MASK (0x300000U)

#define	CCM_CCGR0_CG10_SHIFT (20U)

#define	CCM_CCGR0_CG10(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG10_SHIFT)) & CCM_CCGR0_CG10_MASK)

#define	CCM_CCGR0_CG11_MASK (0xC00000U)

#define	CCM_CCGR0_CG11_SHIFT (22U)

#define	CCM_CCGR0_CG11(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG11_SHIFT)) & CCM_CCGR0_CG11_MASK)

#define	CCM_CCGR0_CG12_MASK (0x3000000U)

#define	CCM_CCGR0_CG12_SHIFT (24U)

#define	CCM_CCGR0_CG12(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG12_SHIFT)) & CCM_CCGR0_CG12_MASK)

#define	CCM_CCGR0_CG13_MASK (0xC000000U)

#define	CCM_CCGR0_CG13_SHIFT (26U)

#define	CCM_CCGR0_CG13(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG13_SHIFT)) & CCM_CCGR0_CG13_MASK)

#define	CCM_CCGR0_CG14_MASK (0x30000000U)

#define	CCM_CCGR0_CG14_SHIFT (28U)

#define	CCM_CCGR0_CG14(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG14_SHIFT)) & CCM_CCGR0_CG14_MASK)

#define	CCM_CCGR0_CG15_MASK (0xC0000000U)

#define	CCM_CCGR0_CG15_SHIFT (30U)

#define	CCM_CCGR0_CG15(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG15_SHIFT)) & CCM_CCGR0_CG15_MASK)

CCGR1 - CCM Clock Gating Register 1
#define	CCM_CCGR1_CG0_MASK (0x3U)

#define	CCM_CCGR1_CG0_SHIFT (0U)

#define	CCM_CCGR1_CG0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG0_SHIFT)) & CCM_CCGR1_CG0_MASK)

#define	CCM_CCGR1_CG1_MASK (0xCU)

#define	CCM_CCGR1_CG1_SHIFT (2U)

#define	CCM_CCGR1_CG1(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG1_SHIFT)) & CCM_CCGR1_CG1_MASK)

#define	CCM_CCGR1_CG2_MASK (0x30U)

#define	CCM_CCGR1_CG2_SHIFT (4U)

#define	CCM_CCGR1_CG2(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG2_SHIFT)) & CCM_CCGR1_CG2_MASK)

#define	CCM_CCGR1_CG3_MASK (0xC0U)

#define	CCM_CCGR1_CG3_SHIFT (6U)

#define	CCM_CCGR1_CG3(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG3_SHIFT)) & CCM_CCGR1_CG3_MASK)

#define	CCM_CCGR1_CG4_MASK (0x300U)

#define	CCM_CCGR1_CG4_SHIFT (8U)

#define	CCM_CCGR1_CG4(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG4_SHIFT)) & CCM_CCGR1_CG4_MASK)

#define	CCM_CCGR1_CG5_MASK (0xC00U)

#define	CCM_CCGR1_CG5_SHIFT (10U)

#define	CCM_CCGR1_CG5(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG5_SHIFT)) & CCM_CCGR1_CG5_MASK)

#define	CCM_CCGR1_CG6_MASK (0x3000U)

#define	CCM_CCGR1_CG6_SHIFT (12U)

#define	CCM_CCGR1_CG6(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG6_SHIFT)) & CCM_CCGR1_CG6_MASK)

#define	CCM_CCGR1_CG7_MASK (0xC000U)

#define	CCM_CCGR1_CG7_SHIFT (14U)

#define	CCM_CCGR1_CG7(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG7_SHIFT)) & CCM_CCGR1_CG7_MASK)

#define	CCM_CCGR1_CG8_MASK (0x30000U)

#define	CCM_CCGR1_CG8_SHIFT (16U)

#define	CCM_CCGR1_CG8(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG8_SHIFT)) & CCM_CCGR1_CG8_MASK)

#define	CCM_CCGR1_CG9_MASK (0xC0000U)

#define	CCM_CCGR1_CG9_SHIFT (18U)

#define	CCM_CCGR1_CG9(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG9_SHIFT)) & CCM_CCGR1_CG9_MASK)

#define	CCM_CCGR1_CG10_MASK (0x300000U)

#define	CCM_CCGR1_CG10_SHIFT (20U)

#define	CCM_CCGR1_CG10(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG10_SHIFT)) & CCM_CCGR1_CG10_MASK)

#define	CCM_CCGR1_CG11_MASK (0xC00000U)

#define	CCM_CCGR1_CG11_SHIFT (22U)

#define	CCM_CCGR1_CG11(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG11_SHIFT)) & CCM_CCGR1_CG11_MASK)

#define	CCM_CCGR1_CG12_MASK (0x3000000U)

#define	CCM_CCGR1_CG12_SHIFT (24U)

#define	CCM_CCGR1_CG12(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG12_SHIFT)) & CCM_CCGR1_CG12_MASK)

#define	CCM_CCGR1_CG13_MASK (0xC000000U)

#define	CCM_CCGR1_CG13_SHIFT (26U)

#define	CCM_CCGR1_CG13(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG13_SHIFT)) & CCM_CCGR1_CG13_MASK)

#define	CCM_CCGR1_CG14_MASK (0x30000000U)

#define	CCM_CCGR1_CG14_SHIFT (28U)

#define	CCM_CCGR1_CG14(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG14_SHIFT)) & CCM_CCGR1_CG14_MASK)

#define	CCM_CCGR1_CG15_MASK (0xC0000000U)

#define	CCM_CCGR1_CG15_SHIFT (30U)

#define	CCM_CCGR1_CG15(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG15_SHIFT)) & CCM_CCGR1_CG15_MASK)

CCGR2 - CCM Clock Gating Register 2
#define	CCM_CCGR2_CG0_MASK (0x3U)

#define	CCM_CCGR2_CG0_SHIFT (0U)

#define	CCM_CCGR2_CG0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG0_SHIFT)) & CCM_CCGR2_CG0_MASK)

#define	CCM_CCGR2_CG1_MASK (0xCU)

#define	CCM_CCGR2_CG1_SHIFT (2U)

#define	CCM_CCGR2_CG1(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG1_SHIFT)) & CCM_CCGR2_CG1_MASK)

#define	CCM_CCGR2_CG2_MASK (0x30U)

#define	CCM_CCGR2_CG2_SHIFT (4U)

#define	CCM_CCGR2_CG2(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG2_SHIFT)) & CCM_CCGR2_CG2_MASK)

#define	CCM_CCGR2_CG3_MASK (0xC0U)

#define	CCM_CCGR2_CG3_SHIFT (6U)

#define	CCM_CCGR2_CG3(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG3_SHIFT)) & CCM_CCGR2_CG3_MASK)

#define	CCM_CCGR2_CG4_MASK (0x300U)

#define	CCM_CCGR2_CG4_SHIFT (8U)

#define	CCM_CCGR2_CG4(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG4_SHIFT)) & CCM_CCGR2_CG4_MASK)

#define	CCM_CCGR2_CG5_MASK (0xC00U)

#define	CCM_CCGR2_CG5_SHIFT (10U)

#define	CCM_CCGR2_CG5(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG5_SHIFT)) & CCM_CCGR2_CG5_MASK)

#define	CCM_CCGR2_CG6_MASK (0x3000U)

#define	CCM_CCGR2_CG6_SHIFT (12U)

#define	CCM_CCGR2_CG6(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG6_SHIFT)) & CCM_CCGR2_CG6_MASK)

#define	CCM_CCGR2_CG7_MASK (0xC000U)

#define	CCM_CCGR2_CG7_SHIFT (14U)

#define	CCM_CCGR2_CG7(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG7_SHIFT)) & CCM_CCGR2_CG7_MASK)

#define	CCM_CCGR2_CG8_MASK (0x30000U)

#define	CCM_CCGR2_CG8_SHIFT (16U)

#define	CCM_CCGR2_CG8(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG8_SHIFT)) & CCM_CCGR2_CG8_MASK)

#define	CCM_CCGR2_CG9_MASK (0xC0000U)

#define	CCM_CCGR2_CG9_SHIFT (18U)

#define	CCM_CCGR2_CG9(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG9_SHIFT)) & CCM_CCGR2_CG9_MASK)

#define	CCM_CCGR2_CG10_MASK (0x300000U)

#define	CCM_CCGR2_CG10_SHIFT (20U)

#define	CCM_CCGR2_CG10(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG10_SHIFT)) & CCM_CCGR2_CG10_MASK)

#define	CCM_CCGR2_CG11_MASK (0xC00000U)

#define	CCM_CCGR2_CG11_SHIFT (22U)

#define	CCM_CCGR2_CG11(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG11_SHIFT)) & CCM_CCGR2_CG11_MASK)

#define	CCM_CCGR2_CG12_MASK (0x3000000U)

#define	CCM_CCGR2_CG12_SHIFT (24U)

#define	CCM_CCGR2_CG12(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG12_SHIFT)) & CCM_CCGR2_CG12_MASK)

#define	CCM_CCGR2_CG13_MASK (0xC000000U)

#define	CCM_CCGR2_CG13_SHIFT (26U)

#define	CCM_CCGR2_CG13(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG13_SHIFT)) & CCM_CCGR2_CG13_MASK)

#define	CCM_CCGR2_CG14_MASK (0x30000000U)

#define	CCM_CCGR2_CG14_SHIFT (28U)

#define	CCM_CCGR2_CG14(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG14_SHIFT)) & CCM_CCGR2_CG14_MASK)

#define	CCM_CCGR2_CG15_MASK (0xC0000000U)

#define	CCM_CCGR2_CG15_SHIFT (30U)

#define	CCM_CCGR2_CG15(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG15_SHIFT)) & CCM_CCGR2_CG15_MASK)

CCGR3 - CCM Clock Gating Register 3
#define	CCM_CCGR3_CG0_MASK (0x3U)

#define	CCM_CCGR3_CG0_SHIFT (0U)

#define	CCM_CCGR3_CG0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG0_SHIFT)) & CCM_CCGR3_CG0_MASK)

#define	CCM_CCGR3_CG1_MASK (0xCU)

#define	CCM_CCGR3_CG1_SHIFT (2U)

#define	CCM_CCGR3_CG1(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG1_SHIFT)) & CCM_CCGR3_CG1_MASK)

#define	CCM_CCGR3_CG2_MASK (0x30U)

#define	CCM_CCGR3_CG2_SHIFT (4U)

#define	CCM_CCGR3_CG2(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG2_SHIFT)) & CCM_CCGR3_CG2_MASK)

#define	CCM_CCGR3_CG3_MASK (0xC0U)

#define	CCM_CCGR3_CG3_SHIFT (6U)

#define	CCM_CCGR3_CG3(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG3_SHIFT)) & CCM_CCGR3_CG3_MASK)

#define	CCM_CCGR3_CG4_MASK (0x300U)

#define	CCM_CCGR3_CG4_SHIFT (8U)

#define	CCM_CCGR3_CG4(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG4_SHIFT)) & CCM_CCGR3_CG4_MASK)

#define	CCM_CCGR3_CG5_MASK (0xC00U)

#define	CCM_CCGR3_CG5_SHIFT (10U)

#define	CCM_CCGR3_CG5(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG5_SHIFT)) & CCM_CCGR3_CG5_MASK)

#define	CCM_CCGR3_CG6_MASK (0x3000U)

#define	CCM_CCGR3_CG6_SHIFT (12U)

#define	CCM_CCGR3_CG6(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG6_SHIFT)) & CCM_CCGR3_CG6_MASK)

#define	CCM_CCGR3_CG7_MASK (0xC000U)

#define	CCM_CCGR3_CG7_SHIFT (14U)

#define	CCM_CCGR3_CG7(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG7_SHIFT)) & CCM_CCGR3_CG7_MASK)

#define	CCM_CCGR3_CG8_MASK (0x30000U)

#define	CCM_CCGR3_CG8_SHIFT (16U)

#define	CCM_CCGR3_CG8(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG8_SHIFT)) & CCM_CCGR3_CG8_MASK)

#define	CCM_CCGR3_CG9_MASK (0xC0000U)

#define	CCM_CCGR3_CG9_SHIFT (18U)

#define	CCM_CCGR3_CG9(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG9_SHIFT)) & CCM_CCGR3_CG9_MASK)

#define	CCM_CCGR3_CG10_MASK (0x300000U)

#define	CCM_CCGR3_CG10_SHIFT (20U)

#define	CCM_CCGR3_CG10(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG10_SHIFT)) & CCM_CCGR3_CG10_MASK)

#define	CCM_CCGR3_CG11_MASK (0xC00000U)

#define	CCM_CCGR3_CG11_SHIFT (22U)

#define	CCM_CCGR3_CG11(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG11_SHIFT)) & CCM_CCGR3_CG11_MASK)

#define	CCM_CCGR3_CG12_MASK (0x3000000U)

#define	CCM_CCGR3_CG12_SHIFT (24U)

#define	CCM_CCGR3_CG12(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG12_SHIFT)) & CCM_CCGR3_CG12_MASK)

#define	CCM_CCGR3_CG13_MASK (0xC000000U)

#define	CCM_CCGR3_CG13_SHIFT (26U)

#define	CCM_CCGR3_CG13(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG13_SHIFT)) & CCM_CCGR3_CG13_MASK)

#define	CCM_CCGR3_CG14_MASK (0x30000000U)

#define	CCM_CCGR3_CG14_SHIFT (28U)

#define	CCM_CCGR3_CG14(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG14_SHIFT)) & CCM_CCGR3_CG14_MASK)

#define	CCM_CCGR3_CG15_MASK (0xC0000000U)

#define	CCM_CCGR3_CG15_SHIFT (30U)

#define	CCM_CCGR3_CG15(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG15_SHIFT)) & CCM_CCGR3_CG15_MASK)

CCGR4 - CCM Clock Gating Register 4
#define	CCM_CCGR4_CG0_MASK (0x3U)

#define	CCM_CCGR4_CG0_SHIFT (0U)

#define	CCM_CCGR4_CG0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG0_SHIFT)) & CCM_CCGR4_CG0_MASK)

#define	CCM_CCGR4_CG1_MASK (0xCU)

#define	CCM_CCGR4_CG1_SHIFT (2U)

#define	CCM_CCGR4_CG1(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG1_SHIFT)) & CCM_CCGR4_CG1_MASK)

#define	CCM_CCGR4_CG2_MASK (0x30U)

#define	CCM_CCGR4_CG2_SHIFT (4U)

#define	CCM_CCGR4_CG2(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG2_SHIFT)) & CCM_CCGR4_CG2_MASK)

#define	CCM_CCGR4_CG3_MASK (0xC0U)

#define	CCM_CCGR4_CG3_SHIFT (6U)

#define	CCM_CCGR4_CG3(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG3_SHIFT)) & CCM_CCGR4_CG3_MASK)

#define	CCM_CCGR4_CG4_MASK (0x300U)

#define	CCM_CCGR4_CG4_SHIFT (8U)

#define	CCM_CCGR4_CG4(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG4_SHIFT)) & CCM_CCGR4_CG4_MASK)

#define	CCM_CCGR4_CG5_MASK (0xC00U)

#define	CCM_CCGR4_CG5_SHIFT (10U)

#define	CCM_CCGR4_CG5(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG5_SHIFT)) & CCM_CCGR4_CG5_MASK)

#define	CCM_CCGR4_CG6_MASK (0x3000U)

#define	CCM_CCGR4_CG6_SHIFT (12U)

#define	CCM_CCGR4_CG6(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG6_SHIFT)) & CCM_CCGR4_CG6_MASK)

#define	CCM_CCGR4_CG7_MASK (0xC000U)

#define	CCM_CCGR4_CG7_SHIFT (14U)

#define	CCM_CCGR4_CG7(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG7_SHIFT)) & CCM_CCGR4_CG7_MASK)

#define	CCM_CCGR4_CG8_MASK (0x30000U)

#define	CCM_CCGR4_CG8_SHIFT (16U)

#define	CCM_CCGR4_CG8(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG8_SHIFT)) & CCM_CCGR4_CG8_MASK)

#define	CCM_CCGR4_CG9_MASK (0xC0000U)

#define	CCM_CCGR4_CG9_SHIFT (18U)

#define	CCM_CCGR4_CG9(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG9_SHIFT)) & CCM_CCGR4_CG9_MASK)

#define	CCM_CCGR4_CG10_MASK (0x300000U)

#define	CCM_CCGR4_CG10_SHIFT (20U)

#define	CCM_CCGR4_CG10(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG10_SHIFT)) & CCM_CCGR4_CG10_MASK)

#define	CCM_CCGR4_CG11_MASK (0xC00000U)

#define	CCM_CCGR4_CG11_SHIFT (22U)

#define	CCM_CCGR4_CG11(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG11_SHIFT)) & CCM_CCGR4_CG11_MASK)

#define	CCM_CCGR4_CG12_MASK (0x3000000U)

#define	CCM_CCGR4_CG12_SHIFT (24U)

#define	CCM_CCGR4_CG12(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG12_SHIFT)) & CCM_CCGR4_CG12_MASK)

#define	CCM_CCGR4_CG13_MASK (0xC000000U)

#define	CCM_CCGR4_CG13_SHIFT (26U)

#define	CCM_CCGR4_CG13(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG13_SHIFT)) & CCM_CCGR4_CG13_MASK)

#define	CCM_CCGR4_CG14_MASK (0x30000000U)

#define	CCM_CCGR4_CG14_SHIFT (28U)

#define	CCM_CCGR4_CG14(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG14_SHIFT)) & CCM_CCGR4_CG14_MASK)

#define	CCM_CCGR4_CG15_MASK (0xC0000000U)

#define	CCM_CCGR4_CG15_SHIFT (30U)

#define	CCM_CCGR4_CG15(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG15_SHIFT)) & CCM_CCGR4_CG15_MASK)

CCGR5 - CCM Clock Gating Register 5
#define	CCM_CCGR5_CG0_MASK (0x3U)

#define	CCM_CCGR5_CG0_SHIFT (0U)

#define	CCM_CCGR5_CG0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG0_SHIFT)) & CCM_CCGR5_CG0_MASK)

#define	CCM_CCGR5_CG1_MASK (0xCU)

#define	CCM_CCGR5_CG1_SHIFT (2U)

#define	CCM_CCGR5_CG1(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG1_SHIFT)) & CCM_CCGR5_CG1_MASK)

#define	CCM_CCGR5_CG2_MASK (0x30U)

#define	CCM_CCGR5_CG2_SHIFT (4U)

#define	CCM_CCGR5_CG2(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG2_SHIFT)) & CCM_CCGR5_CG2_MASK)

#define	CCM_CCGR5_CG3_MASK (0xC0U)

#define	CCM_CCGR5_CG3_SHIFT (6U)

#define	CCM_CCGR5_CG3(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG3_SHIFT)) & CCM_CCGR5_CG3_MASK)

#define	CCM_CCGR5_CG4_MASK (0x300U)

#define	CCM_CCGR5_CG4_SHIFT (8U)

#define	CCM_CCGR5_CG4(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG4_SHIFT)) & CCM_CCGR5_CG4_MASK)

#define	CCM_CCGR5_CG5_MASK (0xC00U)

#define	CCM_CCGR5_CG5_SHIFT (10U)

#define	CCM_CCGR5_CG5(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG5_SHIFT)) & CCM_CCGR5_CG5_MASK)

#define	CCM_CCGR5_CG6_MASK (0x3000U)

#define	CCM_CCGR5_CG6_SHIFT (12U)

#define	CCM_CCGR5_CG6(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG6_SHIFT)) & CCM_CCGR5_CG6_MASK)

#define	CCM_CCGR5_CG7_MASK (0xC000U)

#define	CCM_CCGR5_CG7_SHIFT (14U)

#define	CCM_CCGR5_CG7(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG7_SHIFT)) & CCM_CCGR5_CG7_MASK)

#define	CCM_CCGR5_CG8_MASK (0x30000U)

#define	CCM_CCGR5_CG8_SHIFT (16U)

#define	CCM_CCGR5_CG8(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG8_SHIFT)) & CCM_CCGR5_CG8_MASK)

#define	CCM_CCGR5_CG9_MASK (0xC0000U)

#define	CCM_CCGR5_CG9_SHIFT (18U)

#define	CCM_CCGR5_CG9(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG9_SHIFT)) & CCM_CCGR5_CG9_MASK)

#define	CCM_CCGR5_CG10_MASK (0x300000U)

#define	CCM_CCGR5_CG10_SHIFT (20U)

#define	CCM_CCGR5_CG10(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG10_SHIFT)) & CCM_CCGR5_CG10_MASK)

#define	CCM_CCGR5_CG11_MASK (0xC00000U)

#define	CCM_CCGR5_CG11_SHIFT (22U)

#define	CCM_CCGR5_CG11(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG11_SHIFT)) & CCM_CCGR5_CG11_MASK)

#define	CCM_CCGR5_CG12_MASK (0x3000000U)

#define	CCM_CCGR5_CG12_SHIFT (24U)

#define	CCM_CCGR5_CG12(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG12_SHIFT)) & CCM_CCGR5_CG12_MASK)

#define	CCM_CCGR5_CG13_MASK (0xC000000U)

#define	CCM_CCGR5_CG13_SHIFT (26U)

#define	CCM_CCGR5_CG13(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG13_SHIFT)) & CCM_CCGR5_CG13_MASK)

#define	CCM_CCGR5_CG14_MASK (0x30000000U)

#define	CCM_CCGR5_CG14_SHIFT (28U)

#define	CCM_CCGR5_CG14(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG14_SHIFT)) & CCM_CCGR5_CG14_MASK)

#define	CCM_CCGR5_CG15_MASK (0xC0000000U)

#define	CCM_CCGR5_CG15_SHIFT (30U)

#define	CCM_CCGR5_CG15(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG15_SHIFT)) & CCM_CCGR5_CG15_MASK)

CCGR6 - CCM Clock Gating Register 6
#define	CCM_CCGR6_CG0_MASK (0x3U)

#define	CCM_CCGR6_CG0_SHIFT (0U)

#define	CCM_CCGR6_CG0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG0_SHIFT)) & CCM_CCGR6_CG0_MASK)

#define	CCM_CCGR6_CG1_MASK (0xCU)

#define	CCM_CCGR6_CG1_SHIFT (2U)

#define	CCM_CCGR6_CG1(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG1_SHIFT)) & CCM_CCGR6_CG1_MASK)

#define	CCM_CCGR6_CG2_MASK (0x30U)

#define	CCM_CCGR6_CG2_SHIFT (4U)

#define	CCM_CCGR6_CG2(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG2_SHIFT)) & CCM_CCGR6_CG2_MASK)

#define	CCM_CCGR6_CG3_MASK (0xC0U)

#define	CCM_CCGR6_CG3_SHIFT (6U)

#define	CCM_CCGR6_CG3(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG3_SHIFT)) & CCM_CCGR6_CG3_MASK)

#define	CCM_CCGR6_CG4_MASK (0x300U)

#define	CCM_CCGR6_CG4_SHIFT (8U)

#define	CCM_CCGR6_CG4(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG4_SHIFT)) & CCM_CCGR6_CG4_MASK)

#define	CCM_CCGR6_CG5_MASK (0xC00U)

#define	CCM_CCGR6_CG5_SHIFT (10U)

#define	CCM_CCGR6_CG5(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG5_SHIFT)) & CCM_CCGR6_CG5_MASK)

#define	CCM_CCGR6_CG6_MASK (0x3000U)

#define	CCM_CCGR6_CG6_SHIFT (12U)

#define	CCM_CCGR6_CG6(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG6_SHIFT)) & CCM_CCGR6_CG6_MASK)

#define	CCM_CCGR6_CG7_MASK (0xC000U)

#define	CCM_CCGR6_CG7_SHIFT (14U)

#define	CCM_CCGR6_CG7(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG7_SHIFT)) & CCM_CCGR6_CG7_MASK)

#define	CCM_CCGR6_CG8_MASK (0x30000U)

#define	CCM_CCGR6_CG8_SHIFT (16U)

#define	CCM_CCGR6_CG8(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG8_SHIFT)) & CCM_CCGR6_CG8_MASK)

#define	CCM_CCGR6_CG9_MASK (0xC0000U)

#define	CCM_CCGR6_CG9_SHIFT (18U)

#define	CCM_CCGR6_CG9(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG9_SHIFT)) & CCM_CCGR6_CG9_MASK)

#define	CCM_CCGR6_CG10_MASK (0x300000U)

#define	CCM_CCGR6_CG10_SHIFT (20U)

#define	CCM_CCGR6_CG10(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG10_SHIFT)) & CCM_CCGR6_CG10_MASK)

#define	CCM_CCGR6_CG11_MASK (0xC00000U)

#define	CCM_CCGR6_CG11_SHIFT (22U)

#define	CCM_CCGR6_CG11(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG11_SHIFT)) & CCM_CCGR6_CG11_MASK)

#define	CCM_CCGR6_CG12_MASK (0x3000000U)

#define	CCM_CCGR6_CG12_SHIFT (24U)

#define	CCM_CCGR6_CG12(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG12_SHIFT)) & CCM_CCGR6_CG12_MASK)

#define	CCM_CCGR6_CG13_MASK (0xC000000U)

#define	CCM_CCGR6_CG13_SHIFT (26U)

#define	CCM_CCGR6_CG13(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG13_SHIFT)) & CCM_CCGR6_CG13_MASK)

#define	CCM_CCGR6_CG14_MASK (0x30000000U)

#define	CCM_CCGR6_CG14_SHIFT (28U)

#define	CCM_CCGR6_CG14(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG14_SHIFT)) & CCM_CCGR6_CG14_MASK)

#define	CCM_CCGR6_CG15_MASK (0xC0000000U)

#define	CCM_CCGR6_CG15_SHIFT (30U)

#define	CCM_CCGR6_CG15(x) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG15_SHIFT)) & CCM_CCGR6_CG15_MASK)

CMEOR - CCM Module Enable Overide Register
#define	CCM_CMEOR_MOD_EN_OV_GPT_MASK (0x20U)

#define	CCM_CMEOR_MOD_EN_OV_GPT_SHIFT (5U)

#define	CCM_CMEOR_MOD_EN_OV_GPT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_GPT_SHIFT)) & CCM_CMEOR_MOD_EN_OV_GPT_MASK)

#define	CCM_CMEOR_MOD_EN_OV_PIT_MASK (0x40U)

#define	CCM_CMEOR_MOD_EN_OV_PIT_SHIFT (6U)

#define	CCM_CMEOR_MOD_EN_OV_PIT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_PIT_SHIFT)) & CCM_CMEOR_MOD_EN_OV_PIT_MASK)

#define	CCM_CMEOR_MOD_EN_USDHC_MASK (0x80U)

#define	CCM_CMEOR_MOD_EN_USDHC_SHIFT (7U)

#define	CCM_CMEOR_MOD_EN_USDHC(x) (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_USDHC_SHIFT)) & CCM_CMEOR_MOD_EN_USDHC_MASK)

#define	CCM_CMEOR_MOD_EN_OV_TRNG_MASK (0x200U)

#define	CCM_CMEOR_MOD_EN_OV_TRNG_SHIFT (9U)

#define	CCM_CMEOR_MOD_EN_OV_TRNG(x) (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_TRNG_SHIFT)) & CCM_CMEOR_MOD_EN_OV_TRNG_MASK)

#define	CCM_CMEOR_MOD_EN_OV_CAN2_CPI_MASK (0x10000000U)

#define	CCM_CMEOR_MOD_EN_OV_CAN2_CPI_SHIFT (28U)

#define	CCM_CMEOR_MOD_EN_OV_CAN2_CPI(x) (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_CAN2_CPI_SHIFT)) & CCM_CMEOR_MOD_EN_OV_CAN2_CPI_MASK)

#define	CCM_CMEOR_MOD_EN_OV_CAN1_CPI_MASK (0x40000000U)

#define	CCM_CMEOR_MOD_EN_OV_CAN1_CPI_SHIFT (30U)

#define	CCM_CMEOR_MOD_EN_OV_CAN1_CPI(x) (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_CAN1_CPI_SHIFT)) & CCM_CMEOR_MOD_EN_OV_CAN1_CPI_MASK)

CLOCK_ROOT_CONTROL - Clock root control
#define	CCM_CLOCK_ROOT_CONTROL_DIV_MASK (0xFFU)

#define	CCM_CLOCK_ROOT_CONTROL_DIV_SHIFT (0U)

#define	CCM_CLOCK_ROOT_CONTROL_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_DIV_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_MUX_MASK (0x700U)

#define	CCM_CLOCK_ROOT_CONTROL_MUX_SHIFT (8U)

#define	CCM_CLOCK_ROOT_CONTROL_MUX(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_MUX_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_CONTROL_OFF_SHIFT (24U)

#define	CCM_CLOCK_ROOT_CONTROL_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_OFF_MASK)

CLOCK_ROOT_CONTROL_SET - Clock root control
#define	CCM_CLOCK_ROOT_CONTROL_SET_DIV_MASK (0xFFU)

#define	CCM_CLOCK_ROOT_CONTROL_SET_DIV_SHIFT (0U)

#define	CCM_CLOCK_ROOT_CONTROL_SET_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_SET_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_SET_DIV_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_SET_MUX_MASK (0x700U)

#define	CCM_CLOCK_ROOT_CONTROL_SET_MUX_SHIFT (8U)

#define	CCM_CLOCK_ROOT_CONTROL_SET_MUX(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_SET_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_SET_MUX_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_SET_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_CONTROL_SET_OFF_SHIFT (24U)

#define	CCM_CLOCK_ROOT_CONTROL_SET_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_SET_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_SET_OFF_MASK)

CLOCK_ROOT_CONTROL_CLR - Clock root control
#define	CCM_CLOCK_ROOT_CONTROL_CLR_DIV_MASK (0xFFU)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_DIV_SHIFT (0U)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_CLR_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_CLR_DIV_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_MUX_MASK (0x700U)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_MUX_SHIFT (8U)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_MUX(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_CLR_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_CLR_MUX_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_OFF_SHIFT (24U)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_CLR_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_CLR_OFF_MASK)

CLOCK_ROOT_CONTROL_TOG - Clock root control
#define	CCM_CLOCK_ROOT_CONTROL_TOG_DIV_MASK (0xFFU)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_DIV_SHIFT (0U)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_TOG_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_TOG_DIV_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_MUX_MASK (0x700U)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_MUX_SHIFT (8U)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_MUX(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_TOG_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_TOG_MUX_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_OFF_SHIFT (24U)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_TOG_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_TOG_OFF_MASK)

CLOCK_ROOT_STATUS0 - Clock root working status
#define	CCM_CLOCK_ROOT_STATUS0_DIV_MASK (0xFFU)

#define	CCM_CLOCK_ROOT_STATUS0_DIV_SHIFT (0U)

#define	CCM_CLOCK_ROOT_STATUS0_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_DIV_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_DIV_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_MUX_MASK (0x700U)

#define	CCM_CLOCK_ROOT_STATUS0_MUX_SHIFT (8U)

#define	CCM_CLOCK_ROOT_STATUS0_MUX(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_MUX_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_MUX_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_STATUS0_OFF_SHIFT (24U)

#define	CCM_CLOCK_ROOT_STATUS0_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_OFF_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_OFF_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_POWERDOWN_MASK (0x8000000U)

#define	CCM_CLOCK_ROOT_STATUS0_POWERDOWN_SHIFT (27U)

#define	CCM_CLOCK_ROOT_STATUS0_POWERDOWN(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_POWERDOWN_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_POWERDOWN_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY_MASK (0x10000000U)

#define	CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY_SHIFT (28U)

#define	CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD_MASK (0x20000000U)

#define	CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD_SHIFT (29U)

#define	CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE_MASK (0x40000000U)

#define	CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE_SHIFT (30U)

#define	CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_CHANGING_MASK (0x80000000U)

#define	CCM_CLOCK_ROOT_STATUS0_CHANGING_SHIFT (31U)

#define	CCM_CLOCK_ROOT_STATUS0_CHANGING(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_CHANGING_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_CHANGING_MASK)

CLOCK_ROOT_STATUS1 - Clock root low power status
#define	CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT_MASK (0xF0000U)

#define	CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT_SHIFT (16U)

#define	CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT_MASK)

#define	CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT_MASK (0xF00000U)

#define	CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT_SHIFT (20U)

#define	CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT_MASK)

#define	CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST_SHIFT (24U)

#define	CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST_MASK)

#define	CCM_CLOCK_ROOT_STATUS1_DOWN_DONE_MASK (0x2000000U)

#define	CCM_CLOCK_ROOT_STATUS1_DOWN_DONE_SHIFT (25U)

#define	CCM_CLOCK_ROOT_STATUS1_DOWN_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_DOWN_DONE_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_DOWN_DONE_MASK)

#define	CCM_CLOCK_ROOT_STATUS1_UP_REQUEST_MASK (0x4000000U)

#define	CCM_CLOCK_ROOT_STATUS1_UP_REQUEST_SHIFT (26U)

#define	CCM_CLOCK_ROOT_STATUS1_UP_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_UP_REQUEST_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_UP_REQUEST_MASK)

#define	CCM_CLOCK_ROOT_STATUS1_UP_DONE_MASK (0x8000000U)

#define	CCM_CLOCK_ROOT_STATUS1_UP_DONE_SHIFT (27U)

#define	CCM_CLOCK_ROOT_STATUS1_UP_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_UP_DONE_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_UP_DONE_MASK)

CLOCK_ROOT_CONFIG - Clock root configuration
#define	CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_MASK (0x10U)

#define	CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_SHIFT (4U)

#define	CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_MASK)

CLOCK_ROOT_AUTHEN - Clock root access control
#define	CCM_CLOCK_ROOT_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_ROOT_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_ROOT_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TZ_USER_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_ROOT_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_ROOT_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TZ_NS_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE_MASK)

CLOCK_ROOT_AUTHEN_SET - Clock root access control
#define	CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE_MASK)

CLOCK_ROOT_AUTHEN_CLR - Clock root access control
#define	CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE_MASK)

CLOCK_ROOT_AUTHEN_TOG - Clock root access control
#define	CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE_MASK)

CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT - Setpoint setting
#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV_MASK (0xFFU)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV_SHIFT (0U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV_MASK)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX_MASK (0x700U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX_SHIFT (8U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX_MASK)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF_SHIFT (24U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF_MASK)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE_MASK (0xF0000000U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE_SHIFT (28U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE_MASK)

CLOCK_GROUP_CONTROL - Clock group control
#define	CCM_CLOCK_GROUP_CONTROL_DIV0_MASK (0xFU)

#define	CCM_CLOCK_GROUP_CONTROL_DIV0_SHIFT (0U)

#define	CCM_CLOCK_GROUP_CONTROL_DIV0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_DIV0_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_RSTDIV_MASK (0xFF0000U)

#define	CCM_CLOCK_GROUP_CONTROL_RSTDIV_SHIFT (16U)

#define	CCM_CLOCK_GROUP_CONTROL_RSTDIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_RSTDIV_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_CONTROL_OFF_SHIFT (24U)

#define	CCM_CLOCK_GROUP_CONTROL_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_OFF_MASK)

CLOCK_GROUP_CONTROL_SET - Clock group control
#define	CCM_CLOCK_GROUP_CONTROL_SET_DIV0_MASK (0xFU)

#define	CCM_CLOCK_GROUP_CONTROL_SET_DIV0_SHIFT (0U)

#define	CCM_CLOCK_GROUP_CONTROL_SET_DIV0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_SET_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_SET_DIV0_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV_MASK (0xFF0000U)

#define	CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV_SHIFT (16U)

#define	CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_SET_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_CONTROL_SET_OFF_SHIFT (24U)

#define	CCM_CLOCK_GROUP_CONTROL_SET_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_SET_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_SET_OFF_MASK)

CLOCK_GROUP_CONTROL_CLR - Clock group control
#define	CCM_CLOCK_GROUP_CONTROL_CLR_DIV0_MASK (0xFU)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_DIV0_SHIFT (0U)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_DIV0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_CLR_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_CLR_DIV0_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV_MASK (0xFF0000U)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV_SHIFT (16U)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_OFF_SHIFT (24U)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_CLR_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_CLR_OFF_MASK)

CLOCK_GROUP_CONTROL_TOG - Clock group control
#define	CCM_CLOCK_GROUP_CONTROL_TOG_DIV0_MASK (0xFU)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_DIV0_SHIFT (0U)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_DIV0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_TOG_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_TOG_DIV0_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV_MASK (0xFF0000U)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV_SHIFT (16U)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_OFF_SHIFT (24U)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_TOG_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_TOG_OFF_MASK)

CLOCK_GROUP_STATUS0 - Clock group working status
#define	CCM_CLOCK_GROUP_STATUS0_DIV0_MASK (0xFU)

#define	CCM_CLOCK_GROUP_STATUS0_DIV0_SHIFT (0U)

#define	CCM_CLOCK_GROUP_STATUS0_DIV0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_DIV0_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_DIV0_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_RSTDIV_MASK (0xFF0000U)

#define	CCM_CLOCK_GROUP_STATUS0_RSTDIV_SHIFT (16U)

#define	CCM_CLOCK_GROUP_STATUS0_RSTDIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_RSTDIV_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_STATUS0_OFF_SHIFT (24U)

#define	CCM_CLOCK_GROUP_STATUS0_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_OFF_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_OFF_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_POWERDOWN_MASK (0x8000000U)

#define	CCM_CLOCK_GROUP_STATUS0_POWERDOWN_SHIFT (27U)

#define	CCM_CLOCK_GROUP_STATUS0_POWERDOWN(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_POWERDOWN_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_POWERDOWN_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY_MASK (0x10000000U)

#define	CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY_SHIFT (28U)

#define	CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD_MASK (0x20000000U)

#define	CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD_SHIFT (29U)

#define	CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE_MASK (0x40000000U)

#define	CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE_SHIFT (30U)

#define	CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_CHANGING_MASK (0x80000000U)

#define	CCM_CLOCK_GROUP_STATUS0_CHANGING_SHIFT (31U)

#define	CCM_CLOCK_GROUP_STATUS0_CHANGING(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_CHANGING_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_CHANGING_MASK)

CLOCK_GROUP_STATUS1 - Clock group low power/extend status
#define	CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT_MASK (0xF0000U)

#define	CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT_SHIFT (16U)

#define	CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT_MASK)

#define	CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT_MASK (0xF00000U)

#define	CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT_SHIFT (20U)

#define	CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT_MASK)

#define	CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST_SHIFT (24U)

#define	CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST_MASK)

#define	CCM_CLOCK_GROUP_STATUS1_DOWN_DONE_MASK (0x2000000U)

#define	CCM_CLOCK_GROUP_STATUS1_DOWN_DONE_SHIFT (25U)

#define	CCM_CLOCK_GROUP_STATUS1_DOWN_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_DOWN_DONE_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_DOWN_DONE_MASK)

#define	CCM_CLOCK_GROUP_STATUS1_UP_REQUEST_MASK (0x4000000U)

#define	CCM_CLOCK_GROUP_STATUS1_UP_REQUEST_SHIFT (26U)

#define	CCM_CLOCK_GROUP_STATUS1_UP_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_UP_REQUEST_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_UP_REQUEST_MASK)

#define	CCM_CLOCK_GROUP_STATUS1_UP_DONE_MASK (0x8000000U)

#define	CCM_CLOCK_GROUP_STATUS1_UP_DONE_SHIFT (27U)

#define	CCM_CLOCK_GROUP_STATUS1_UP_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_UP_DONE_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_UP_DONE_MASK)

CLOCK_GROUP_CONFIG - Clock group configuration
#define	CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT_MASK (0x10U)

#define	CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT_SHIFT (4U)

#define	CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT_MASK)

CLOCK_GROUP_AUTHEN - Clock group access control
#define	CCM_CLOCK_GROUP_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_GROUP_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_GROUP_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TZ_USER_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_GROUP_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_GROUP_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TZ_NS_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE_MASK)

CLOCK_GROUP_AUTHEN_SET - Clock group access control
#define	CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE_MASK)

CLOCK_GROUP_AUTHEN_CLR - Clock group access control
#define	CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE_MASK)

CLOCK_GROUP_AUTHEN_TOG - Clock group access control
#define	CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE_MASK)

CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT - Setpoint setting
#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0_MASK (0xFU)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0_SHIFT (0U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0_MASK)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV_MASK (0xFF0000U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV_SHIFT (16U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV_MASK)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF_SHIFT (24U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF_MASK)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE_MASK (0xF0000000U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE_SHIFT (28U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE_MASK)

GPR_SHARED - General Purpose Register
#define	CCM_GPR_SHARED_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_SHARED_GPR_SHIFT (0U)

#define	CCM_GPR_SHARED_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_GPR_SHIFT)) & CCM_GPR_SHARED_GPR_MASK)

GPR_SHARED_SET - General Purpose Register
#define	CCM_GPR_SHARED_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_SHARED_SET_GPR_SHIFT (0U)

#define	CCM_GPR_SHARED_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_SET_GPR_SHIFT)) & CCM_GPR_SHARED_SET_GPR_MASK)

GPR_SHARED_CLR - General Purpose Register
#define	CCM_GPR_SHARED_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_SHARED_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_SHARED_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_CLR_GPR_SHIFT)) & CCM_GPR_SHARED_CLR_GPR_MASK)

GPR_SHARED_TOG - General Purpose Register
#define	CCM_GPR_SHARED_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_SHARED_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_SHARED_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_TOG_GPR_SHIFT)) & CCM_GPR_SHARED_TOG_GPR_MASK)

GPR_SHARED_AUTHEN - GPR access control
#define	CCM_GPR_SHARED_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_SHARED_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_SHARED_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_SHARED_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_SHARED_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_SHARED_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_SHARED_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_SHARED_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_LOCK_MODE_MASK)

GPR_SHARED_AUTHEN_SET - GPR access control
#define	CCM_GPR_SHARED_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_SHARED_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_SHARED_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_SHARED_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_SHARED_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_SHARED_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE_MASK)

GPR_SHARED_AUTHEN_CLR - GPR access control
#define	CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_SHARED_AUTHEN_TOG - GPR access control
#define	CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE1 - General Purpose Register
#define	CCM_GPR_PRIVATE1_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE1_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_GPR_SHIFT)) & CCM_GPR_PRIVATE1_GPR_MASK)

GPR_PRIVATE1_SET - General Purpose Register
#define	CCM_GPR_PRIVATE1_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE1_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE1_SET_GPR_MASK)

GPR_PRIVATE1_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE1_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE1_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE1_CLR_GPR_MASK)

GPR_PRIVATE1_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE1_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE1_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE1_TOG_GPR_MASK)

GPR_PRIVATE1_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE1_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE1_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE1_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE1_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE2 - General Purpose Register
#define	CCM_GPR_PRIVATE2_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE2_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_GPR_SHIFT)) & CCM_GPR_PRIVATE2_GPR_MASK)

GPR_PRIVATE2_SET - General Purpose Register
#define	CCM_GPR_PRIVATE2_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE2_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE2_SET_GPR_MASK)

GPR_PRIVATE2_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE2_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE2_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE2_CLR_GPR_MASK)

GPR_PRIVATE2_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE2_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE2_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE2_TOG_GPR_MASK)

GPR_PRIVATE2_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE2_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE2_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE2_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE2_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE3 - General Purpose Register
#define	CCM_GPR_PRIVATE3_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE3_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_GPR_SHIFT)) & CCM_GPR_PRIVATE3_GPR_MASK)

GPR_PRIVATE3_SET - General Purpose Register
#define	CCM_GPR_PRIVATE3_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE3_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE3_SET_GPR_MASK)

GPR_PRIVATE3_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE3_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE3_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE3_CLR_GPR_MASK)

GPR_PRIVATE3_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE3_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE3_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE3_TOG_GPR_MASK)

GPR_PRIVATE3_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE3_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE3_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE3_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE3_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE4 - General Purpose Register
#define	CCM_GPR_PRIVATE4_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE4_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_GPR_SHIFT)) & CCM_GPR_PRIVATE4_GPR_MASK)

GPR_PRIVATE4_SET - General Purpose Register
#define	CCM_GPR_PRIVATE4_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE4_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE4_SET_GPR_MASK)

GPR_PRIVATE4_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE4_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE4_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE4_CLR_GPR_MASK)

GPR_PRIVATE4_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE4_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE4_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE4_TOG_GPR_MASK)

GPR_PRIVATE4_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE4_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE4_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE4_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE4_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE5 - General Purpose Register
#define	CCM_GPR_PRIVATE5_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE5_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_GPR_SHIFT)) & CCM_GPR_PRIVATE5_GPR_MASK)

GPR_PRIVATE5_SET - General Purpose Register
#define	CCM_GPR_PRIVATE5_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE5_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE5_SET_GPR_MASK)

GPR_PRIVATE5_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE5_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE5_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE5_CLR_GPR_MASK)

GPR_PRIVATE5_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE5_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE5_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE5_TOG_GPR_MASK)

GPR_PRIVATE5_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE5_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE5_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE5_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE5_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE6 - General Purpose Register
#define	CCM_GPR_PRIVATE6_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE6_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_GPR_SHIFT)) & CCM_GPR_PRIVATE6_GPR_MASK)

GPR_PRIVATE6_SET - General Purpose Register
#define	CCM_GPR_PRIVATE6_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE6_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE6_SET_GPR_MASK)

GPR_PRIVATE6_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE6_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE6_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE6_CLR_GPR_MASK)

GPR_PRIVATE6_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE6_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE6_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE6_TOG_GPR_MASK)

GPR_PRIVATE6_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE6_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE6_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE6_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE6_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE7 - General Purpose Register
#define	CCM_GPR_PRIVATE7_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE7_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_GPR_SHIFT)) & CCM_GPR_PRIVATE7_GPR_MASK)

GPR_PRIVATE7_SET - General Purpose Register
#define	CCM_GPR_PRIVATE7_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE7_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE7_SET_GPR_MASK)

GPR_PRIVATE7_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE7_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE7_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE7_CLR_GPR_MASK)

GPR_PRIVATE7_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE7_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE7_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE7_TOG_GPR_MASK)

GPR_PRIVATE7_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE7_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE7_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE7_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE7_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE_MASK)

OSCPLL_DIRECT - Clock source direct control
#define	CCM_OSCPLL_DIRECT_ON_MASK (0x1U)

#define	CCM_OSCPLL_DIRECT_ON_SHIFT (0U)

#define	CCM_OSCPLL_DIRECT_ON(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DIRECT_ON_SHIFT)) & CCM_OSCPLL_DIRECT_ON_MASK)

OSCPLL_DOMAIN - Clock source domain control
#define	CCM_OSCPLL_DOMAIN_LEVEL_MASK (0x7U)

#define	CCM_OSCPLL_DOMAIN_LEVEL_SHIFT (0U)

#define	CCM_OSCPLL_DOMAIN_LEVEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL_MASK)

#define	CCM_OSCPLL_DOMAIN_LEVEL0_MASK (0x70000U)

#define	CCM_OSCPLL_DOMAIN_LEVEL0_SHIFT (16U)

#define	CCM_OSCPLL_DOMAIN_LEVEL0(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL0_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL0_MASK)

#define	CCM_OSCPLL_DOMAIN_LEVEL1_MASK (0x700000U)

#define	CCM_OSCPLL_DOMAIN_LEVEL1_SHIFT (20U)

#define	CCM_OSCPLL_DOMAIN_LEVEL1(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL1_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL1_MASK)

#define	CCM_OSCPLL_DOMAIN_LEVEL2_MASK (0x7000000U)

#define	CCM_OSCPLL_DOMAIN_LEVEL2_SHIFT (24U)

#define	CCM_OSCPLL_DOMAIN_LEVEL2(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL2_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL2_MASK)

#define	CCM_OSCPLL_DOMAIN_LEVEL3_MASK (0x70000000U)

#define	CCM_OSCPLL_DOMAIN_LEVEL3_SHIFT (28U)

#define	CCM_OSCPLL_DOMAIN_LEVEL3(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL3_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL3_MASK)

OSCPLL_SETPOINT - Clock source Setpoint setting
#define	CCM_OSCPLL_SETPOINT_SETPOINT_MASK (0xFFFFU)

#define	CCM_OSCPLL_SETPOINT_SETPOINT_SHIFT (0U)

#define	CCM_OSCPLL_SETPOINT_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_SETPOINT_SETPOINT_SHIFT)) & CCM_OSCPLL_SETPOINT_SETPOINT_MASK)

#define	CCM_OSCPLL_SETPOINT_STANDBY_MASK (0xFFFF0000U)

#define	CCM_OSCPLL_SETPOINT_STANDBY_SHIFT (16U)

#define	CCM_OSCPLL_SETPOINT_STANDBY(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_SETPOINT_STANDBY_SHIFT)) & CCM_OSCPLL_SETPOINT_STANDBY_MASK)

OSCPLL_STATUS0 - Clock source working status
#define	CCM_OSCPLL_STATUS0_ON_MASK (0x1U)

#define	CCM_OSCPLL_STATUS0_ON_SHIFT (0U)

#define	CCM_OSCPLL_STATUS0_ON(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_ON_SHIFT)) & CCM_OSCPLL_STATUS0_ON_MASK)

#define	CCM_OSCPLL_STATUS0_STATUS_EARLY_MASK (0x10U)

#define	CCM_OSCPLL_STATUS0_STATUS_EARLY_SHIFT (4U)

#define	CCM_OSCPLL_STATUS0_STATUS_EARLY(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_STATUS_EARLY_SHIFT)) & CCM_OSCPLL_STATUS0_STATUS_EARLY_MASK)

#define	CCM_OSCPLL_STATUS0_STATUS_LATE_MASK (0x20U)

#define	CCM_OSCPLL_STATUS0_STATUS_LATE_SHIFT (5U)

#define	CCM_OSCPLL_STATUS0_STATUS_LATE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_STATUS_LATE_SHIFT)) & CCM_OSCPLL_STATUS0_STATUS_LATE_MASK)

#define	CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN_MASK (0xF00U)

#define	CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN_SHIFT (8U)

#define	CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN_SHIFT)) & CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN_MASK)

#define	CCM_OSCPLL_STATUS0_DOMAIN_ENABLE_MASK (0xF000U)

#define	CCM_OSCPLL_STATUS0_DOMAIN_ENABLE_SHIFT (12U)

#define	CCM_OSCPLL_STATUS0_DOMAIN_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_DOMAIN_ENABLE_SHIFT)) & CCM_OSCPLL_STATUS0_DOMAIN_ENABLE_MASK)

#define	CCM_OSCPLL_STATUS0_IN_USE_MASK (0x10000000U)

#define	CCM_OSCPLL_STATUS0_IN_USE_SHIFT (28U)

#define	CCM_OSCPLL_STATUS0_IN_USE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_IN_USE_SHIFT)) & CCM_OSCPLL_STATUS0_IN_USE_MASK)

OSCPLL_STATUS1 - Clock source low power status
#define	CCM_OSCPLL_STATUS1_CPU0_MODE_MASK (0x3U)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_SHIFT (0U)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU0_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU0_MODE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST_MASK (0x4U)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST_SHIFT (2U)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_DONE_MASK (0x8U)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_DONE_SHIFT (3U)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU0_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU0_MODE_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT (4U)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST_MASK (0x40U)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST_SHIFT (6U)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_DONE_MASK (0x80U)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_DONE_SHIFT (7U)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT (8U)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST_MASK (0x400U)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST_SHIFT (10U)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_DONE_MASK (0x800U)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_DONE_SHIFT (11U)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_MASK (0x3000U)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_SHIFT (12U)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU3_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU3_MODE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST_MASK (0x4000U)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST_SHIFT (14U)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_DONE_MASK (0x8000U)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_DONE_SHIFT (15U)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU3_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU3_MODE_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_TARGET_SETPOINT_MASK (0xF0000U)

#define	CCM_OSCPLL_STATUS1_TARGET_SETPOINT_SHIFT (16U)

#define	CCM_OSCPLL_STATUS1_TARGET_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_OSCPLL_STATUS1_TARGET_SETPOINT_MASK)

#define	CCM_OSCPLL_STATUS1_CURRENT_SETPOINT_MASK (0xF00000U)

#define	CCM_OSCPLL_STATUS1_CURRENT_SETPOINT_SHIFT (20U)

#define	CCM_OSCPLL_STATUS1_CURRENT_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_OSCPLL_STATUS1_CURRENT_SETPOINT_MASK)

#define	CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST_MASK (0x1000000U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST_SHIFT (24U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE_MASK (0x2000000U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE_SHIFT (25U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST_MASK (0x4000000U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST_SHIFT (26U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE_MASK (0x8000000U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE_SHIFT (27U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST_MASK (0x10000000U)

#define	CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST_SHIFT (28U)

#define	CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_STANDBY_IN_DONE_MASK (0x20000000U)

#define	CCM_OSCPLL_STATUS1_STANDBY_IN_DONE_SHIFT (29U)

#define	CCM_OSCPLL_STATUS1_STANDBY_IN_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_IN_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_IN_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE_MASK (0x40000000U)

#define	CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE_SHIFT (30U)

#define	CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST_MASK (0x80000000U)

#define	CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST_SHIFT (31U)

#define	CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST_MASK)

OSCPLL_CONFIG - Clock source configuration
#define	CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT_MASK (0x2U)

#define	CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT_SHIFT (1U)

#define	CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT_SHIFT)) & CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT_MASK)

#define	CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_MASK (0x10U)

#define	CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_SHIFT (4U)

#define	CCM_OSCPLL_CONFIG_SETPOINT_PRESENT(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_MASK)

OSCPLL_AUTHEN - Clock source access control
#define	CCM_OSCPLL_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_OSCPLL_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_OSCPLL_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_TZ_USER_SHIFT)) & CCM_OSCPLL_AUTHEN_TZ_USER_MASK)

#define	CCM_OSCPLL_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_OSCPLL_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_OSCPLL_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_TZ_NS_SHIFT)) & CCM_OSCPLL_AUTHEN_TZ_NS_MASK)

#define	CCM_OSCPLL_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_OSCPLL_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_OSCPLL_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_LOCK_TZ_SHIFT)) & CCM_OSCPLL_AUTHEN_LOCK_TZ_MASK)

#define	CCM_OSCPLL_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_OSCPLL_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_OSCPLL_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_WHITE_LIST_SHIFT)) & CCM_OSCPLL_AUTHEN_WHITE_LIST_MASK)

#define	CCM_OSCPLL_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_OSCPLL_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_OSCPLL_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_LOCK_LIST_SHIFT)) & CCM_OSCPLL_AUTHEN_LOCK_LIST_MASK)

#define	CCM_OSCPLL_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_OSCPLL_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_OSCPLL_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_OSCPLL_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_OSCPLL_AUTHEN_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_OSCPLL_AUTHEN_SETPOINT_MODE_SHIFT (17U)

#define	CCM_OSCPLL_AUTHEN_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_OSCPLL_AUTHEN_SETPOINT_MODE_MASK)

#define	CCM_OSCPLL_AUTHEN_CPULPM_MASK (0x40000U)

#define	CCM_OSCPLL_AUTHEN_CPULPM_SHIFT (18U)

#define	CCM_OSCPLL_AUTHEN_CPULPM(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_CPULPM_SHIFT)) & CCM_OSCPLL_AUTHEN_CPULPM_MASK)

#define	CCM_OSCPLL_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_OSCPLL_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_OSCPLL_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_LOCK_MODE_SHIFT)) & CCM_OSCPLL_AUTHEN_LOCK_MODE_MASK)

LPCG_DIRECT - LPCG direct control
#define	CCM_LPCG_DIRECT_ON_MASK (0x1U)

#define	CCM_LPCG_DIRECT_ON_SHIFT (0U)

#define	CCM_LPCG_DIRECT_ON(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DIRECT_ON_SHIFT)) & CCM_LPCG_DIRECT_ON_MASK)

LPCG_DOMAIN - LPCG domain control
#define	CCM_LPCG_DOMAIN_LEVEL_MASK (0x7U)

#define	CCM_LPCG_DOMAIN_LEVEL_SHIFT (0U)

#define	CCM_LPCG_DOMAIN_LEVEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL_MASK)

#define	CCM_LPCG_DOMAIN_LEVEL0_MASK (0x70000U)

#define	CCM_LPCG_DOMAIN_LEVEL0_SHIFT (16U)

#define	CCM_LPCG_DOMAIN_LEVEL0(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL0_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL0_MASK)

#define	CCM_LPCG_DOMAIN_LEVEL1_MASK (0x700000U)

#define	CCM_LPCG_DOMAIN_LEVEL1_SHIFT (20U)

#define	CCM_LPCG_DOMAIN_LEVEL1(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL1_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL1_MASK)

#define	CCM_LPCG_DOMAIN_LEVEL2_MASK (0x7000000U)

#define	CCM_LPCG_DOMAIN_LEVEL2_SHIFT (24U)

#define	CCM_LPCG_DOMAIN_LEVEL2(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL2_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL2_MASK)

#define	CCM_LPCG_DOMAIN_LEVEL3_MASK (0x70000000U)

#define	CCM_LPCG_DOMAIN_LEVEL3_SHIFT (28U)

#define	CCM_LPCG_DOMAIN_LEVEL3(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL3_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL3_MASK)

LPCG_SETPOINT - LPCG Setpoint setting
#define	CCM_LPCG_SETPOINT_SETPOINT_MASK (0xFFFFU)

#define	CCM_LPCG_SETPOINT_SETPOINT_SHIFT (0U)

#define	CCM_LPCG_SETPOINT_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_SETPOINT_SETPOINT_SHIFT)) & CCM_LPCG_SETPOINT_SETPOINT_MASK)

#define	CCM_LPCG_SETPOINT_STANDBY_MASK (0xFFFF0000U)

#define	CCM_LPCG_SETPOINT_STANDBY_SHIFT (16U)

#define	CCM_LPCG_SETPOINT_STANDBY(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_SETPOINT_STANDBY_SHIFT)) & CCM_LPCG_SETPOINT_STANDBY_MASK)

LPCG_STATUS0 - LPCG working status
#define	CCM_LPCG_STATUS0_ON_MASK (0x1U)

#define	CCM_LPCG_STATUS0_ON_SHIFT (0U)

#define	CCM_LPCG_STATUS0_ON(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS0_ON_SHIFT)) & CCM_LPCG_STATUS0_ON_MASK)

#define	CCM_LPCG_STATUS0_ACTIVE_DOMAIN_MASK (0xF00U)

#define	CCM_LPCG_STATUS0_ACTIVE_DOMAIN_SHIFT (8U)

#define	CCM_LPCG_STATUS0_ACTIVE_DOMAIN(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS0_ACTIVE_DOMAIN_SHIFT)) & CCM_LPCG_STATUS0_ACTIVE_DOMAIN_MASK)

#define	CCM_LPCG_STATUS0_DOMAIN_ENABLE_MASK (0xF000U)

#define	CCM_LPCG_STATUS0_DOMAIN_ENABLE_SHIFT (12U)

#define	CCM_LPCG_STATUS0_DOMAIN_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS0_DOMAIN_ENABLE_SHIFT)) & CCM_LPCG_STATUS0_DOMAIN_ENABLE_MASK)

LPCG_STATUS1 - LPCG low power status
#define	CCM_LPCG_STATUS1_CPU0_MODE_MASK (0x3U)

#define	CCM_LPCG_STATUS1_CPU0_MODE_SHIFT (0U)

#define	CCM_LPCG_STATUS1_CPU0_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU0_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU0_MODE_MASK)

#define	CCM_LPCG_STATUS1_CPU0_MODE_REQUEST_MASK (0x4U)

#define	CCM_LPCG_STATUS1_CPU0_MODE_REQUEST_SHIFT (2U)

#define	CCM_LPCG_STATUS1_CPU0_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU0_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU0_MODE_REQUEST_MASK)

#define	CCM_LPCG_STATUS1_CPU0_MODE_DONE_MASK (0x8U)

#define	CCM_LPCG_STATUS1_CPU0_MODE_DONE_SHIFT (3U)

#define	CCM_LPCG_STATUS1_CPU0_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU0_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU0_MODE_DONE_MASK)

#define	CCM_LPCG_STATUS1_CPU1_MODE_MASK (0x30U)

#define	CCM_LPCG_STATUS1_CPU1_MODE_SHIFT (4U)

#define	CCM_LPCG_STATUS1_CPU1_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU1_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU1_MODE_MASK)

#define	CCM_LPCG_STATUS1_CPU1_MODE_REQUEST_MASK (0x40U)

#define	CCM_LPCG_STATUS1_CPU1_MODE_REQUEST_SHIFT (6U)

#define	CCM_LPCG_STATUS1_CPU1_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU1_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU1_MODE_REQUEST_MASK)

#define	CCM_LPCG_STATUS1_CPU1_MODE_DONE_MASK (0x80U)

#define	CCM_LPCG_STATUS1_CPU1_MODE_DONE_SHIFT (7U)

#define	CCM_LPCG_STATUS1_CPU1_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU1_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU1_MODE_DONE_MASK)

#define	CCM_LPCG_STATUS1_CPU2_MODE_MASK (0x300U)

#define	CCM_LPCG_STATUS1_CPU2_MODE_SHIFT (8U)

#define	CCM_LPCG_STATUS1_CPU2_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU2_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU2_MODE_MASK)

#define	CCM_LPCG_STATUS1_CPU2_MODE_REQUEST_MASK (0x400U)

#define	CCM_LPCG_STATUS1_CPU2_MODE_REQUEST_SHIFT (10U)

#define	CCM_LPCG_STATUS1_CPU2_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU2_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU2_MODE_REQUEST_MASK)

#define	CCM_LPCG_STATUS1_CPU2_MODE_DONE_MASK (0x800U)

#define	CCM_LPCG_STATUS1_CPU2_MODE_DONE_SHIFT (11U)

#define	CCM_LPCG_STATUS1_CPU2_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU2_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU2_MODE_DONE_MASK)

#define	CCM_LPCG_STATUS1_CPU3_MODE_MASK (0x3000U)

#define	CCM_LPCG_STATUS1_CPU3_MODE_SHIFT (12U)

#define	CCM_LPCG_STATUS1_CPU3_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU3_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU3_MODE_MASK)

#define	CCM_LPCG_STATUS1_CPU3_MODE_REQUEST_MASK (0x4000U)

#define	CCM_LPCG_STATUS1_CPU3_MODE_REQUEST_SHIFT (14U)

#define	CCM_LPCG_STATUS1_CPU3_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU3_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU3_MODE_REQUEST_MASK)

#define	CCM_LPCG_STATUS1_CPU3_MODE_DONE_MASK (0x8000U)

#define	CCM_LPCG_STATUS1_CPU3_MODE_DONE_SHIFT (15U)

#define	CCM_LPCG_STATUS1_CPU3_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU3_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU3_MODE_DONE_MASK)

#define	CCM_LPCG_STATUS1_TARGET_SETPOINT_MASK (0xF0000U)

#define	CCM_LPCG_STATUS1_TARGET_SETPOINT_SHIFT (16U)

#define	CCM_LPCG_STATUS1_TARGET_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_LPCG_STATUS1_TARGET_SETPOINT_MASK)

#define	CCM_LPCG_STATUS1_CURRENT_SETPOINT_MASK (0xF00000U)

#define	CCM_LPCG_STATUS1_CURRENT_SETPOINT_SHIFT (20U)

#define	CCM_LPCG_STATUS1_CURRENT_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_LPCG_STATUS1_CURRENT_SETPOINT_MASK)

#define	CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST_MASK (0x1000000U)

#define	CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST_SHIFT (24U)

#define	CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST_MASK)

#define	CCM_LPCG_STATUS1_SETPOINT_OFF_DONE_MASK (0x2000000U)

#define	CCM_LPCG_STATUS1_SETPOINT_OFF_DONE_SHIFT (25U)

#define	CCM_LPCG_STATUS1_SETPOINT_OFF_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_OFF_DONE_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_OFF_DONE_MASK)

#define	CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST_MASK (0x4000000U)

#define	CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST_SHIFT (26U)

#define	CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST_MASK)

#define	CCM_LPCG_STATUS1_SETPOINT_ON_DONE_MASK (0x8000000U)

#define	CCM_LPCG_STATUS1_SETPOINT_ON_DONE_SHIFT (27U)

#define	CCM_LPCG_STATUS1_SETPOINT_ON_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_ON_DONE_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_ON_DONE_MASK)

LPCG_CONFIG - LPCG configuration
#define	CCM_LPCG_CONFIG_SETPOINT_PRESENT_MASK (0x10U)

#define	CCM_LPCG_CONFIG_SETPOINT_PRESENT_SHIFT (4U)

#define	CCM_LPCG_CONFIG_SETPOINT_PRESENT(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_LPCG_CONFIG_SETPOINT_PRESENT_MASK)

LPCG_AUTHEN - LPCG access control
#define	CCM_LPCG_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_LPCG_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_LPCG_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_TZ_USER_SHIFT)) & CCM_LPCG_AUTHEN_TZ_USER_MASK)

#define	CCM_LPCG_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_LPCG_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_LPCG_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_TZ_NS_SHIFT)) & CCM_LPCG_AUTHEN_TZ_NS_MASK)

#define	CCM_LPCG_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_LPCG_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_LPCG_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_LOCK_TZ_SHIFT)) & CCM_LPCG_AUTHEN_LOCK_TZ_MASK)

#define	CCM_LPCG_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_LPCG_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_LPCG_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_WHITE_LIST_SHIFT)) & CCM_LPCG_AUTHEN_WHITE_LIST_MASK)

#define	CCM_LPCG_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_LPCG_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_LPCG_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_LOCK_LIST_SHIFT)) & CCM_LPCG_AUTHEN_LOCK_LIST_MASK)

#define	CCM_LPCG_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_LPCG_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_LPCG_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_LPCG_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_LPCG_AUTHEN_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_LPCG_AUTHEN_SETPOINT_MODE_SHIFT (17U)

#define	CCM_LPCG_AUTHEN_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_LPCG_AUTHEN_SETPOINT_MODE_MASK)

#define	CCM_LPCG_AUTHEN_CPULPM_MASK (0x40000U)

#define	CCM_LPCG_AUTHEN_CPULPM_SHIFT (18U)

#define	CCM_LPCG_AUTHEN_CPULPM(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_CPULPM_SHIFT)) & CCM_LPCG_AUTHEN_CPULPM_MASK)

#define	CCM_LPCG_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_LPCG_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_LPCG_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_LOCK_MODE_SHIFT)) & CCM_LPCG_AUTHEN_LOCK_MODE_MASK)

CLOCK_ROOT_CONTROL - Clock root control
#define	CCM_CLOCK_ROOT_CONTROL_DIV_MASK (0xFFU)

#define	CCM_CLOCK_ROOT_CONTROL_DIV_SHIFT (0U)

#define	CCM_CLOCK_ROOT_CONTROL_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_DIV_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_MUX_MASK (0x700U)

#define	CCM_CLOCK_ROOT_CONTROL_MUX_SHIFT (8U)

#define	CCM_CLOCK_ROOT_CONTROL_MUX(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_MUX_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_CONTROL_OFF_SHIFT (24U)

#define	CCM_CLOCK_ROOT_CONTROL_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_OFF_MASK)

CLOCK_ROOT_CONTROL_SET - Clock root control
#define	CCM_CLOCK_ROOT_CONTROL_SET_DIV_MASK (0xFFU)

#define	CCM_CLOCK_ROOT_CONTROL_SET_DIV_SHIFT (0U)

#define	CCM_CLOCK_ROOT_CONTROL_SET_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_SET_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_SET_DIV_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_SET_MUX_MASK (0x700U)

#define	CCM_CLOCK_ROOT_CONTROL_SET_MUX_SHIFT (8U)

#define	CCM_CLOCK_ROOT_CONTROL_SET_MUX(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_SET_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_SET_MUX_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_SET_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_CONTROL_SET_OFF_SHIFT (24U)

#define	CCM_CLOCK_ROOT_CONTROL_SET_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_SET_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_SET_OFF_MASK)

CLOCK_ROOT_CONTROL_CLR - Clock root control
#define	CCM_CLOCK_ROOT_CONTROL_CLR_DIV_MASK (0xFFU)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_DIV_SHIFT (0U)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_CLR_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_CLR_DIV_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_MUX_MASK (0x700U)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_MUX_SHIFT (8U)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_MUX(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_CLR_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_CLR_MUX_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_OFF_SHIFT (24U)

#define	CCM_CLOCK_ROOT_CONTROL_CLR_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_CLR_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_CLR_OFF_MASK)

CLOCK_ROOT_CONTROL_TOG - Clock root control
#define	CCM_CLOCK_ROOT_CONTROL_TOG_DIV_MASK (0xFFU)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_DIV_SHIFT (0U)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_TOG_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_TOG_DIV_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_MUX_MASK (0x700U)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_MUX_SHIFT (8U)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_MUX(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_TOG_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_TOG_MUX_MASK)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_OFF_SHIFT (24U)

#define	CCM_CLOCK_ROOT_CONTROL_TOG_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_TOG_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_TOG_OFF_MASK)

CLOCK_ROOT_STATUS0 - Clock root working status
#define	CCM_CLOCK_ROOT_STATUS0_DIV_MASK (0xFFU)

#define	CCM_CLOCK_ROOT_STATUS0_DIV_SHIFT (0U)

#define	CCM_CLOCK_ROOT_STATUS0_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_DIV_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_DIV_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_MUX_MASK (0x700U)

#define	CCM_CLOCK_ROOT_STATUS0_MUX_SHIFT (8U)

#define	CCM_CLOCK_ROOT_STATUS0_MUX(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_MUX_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_MUX_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_STATUS0_OFF_SHIFT (24U)

#define	CCM_CLOCK_ROOT_STATUS0_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_OFF_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_OFF_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_POWERDOWN_MASK (0x8000000U)

#define	CCM_CLOCK_ROOT_STATUS0_POWERDOWN_SHIFT (27U)

#define	CCM_CLOCK_ROOT_STATUS0_POWERDOWN(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_POWERDOWN_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_POWERDOWN_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY_MASK (0x10000000U)

#define	CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY_SHIFT (28U)

#define	CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD_MASK (0x20000000U)

#define	CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD_SHIFT (29U)

#define	CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE_MASK (0x40000000U)

#define	CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE_SHIFT (30U)

#define	CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE_MASK)

#define	CCM_CLOCK_ROOT_STATUS0_CHANGING_MASK (0x80000000U)

#define	CCM_CLOCK_ROOT_STATUS0_CHANGING_SHIFT (31U)

#define	CCM_CLOCK_ROOT_STATUS0_CHANGING(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_CHANGING_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_CHANGING_MASK)

CLOCK_ROOT_STATUS1 - Clock root low power status
#define	CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT_MASK (0xF0000U)

#define	CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT_SHIFT (16U)

#define	CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT_MASK)

#define	CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT_MASK (0xF00000U)

#define	CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT_SHIFT (20U)

#define	CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT_MASK)

#define	CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST_SHIFT (24U)

#define	CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST_MASK)

#define	CCM_CLOCK_ROOT_STATUS1_DOWN_DONE_MASK (0x2000000U)

#define	CCM_CLOCK_ROOT_STATUS1_DOWN_DONE_SHIFT (25U)

#define	CCM_CLOCK_ROOT_STATUS1_DOWN_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_DOWN_DONE_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_DOWN_DONE_MASK)

#define	CCM_CLOCK_ROOT_STATUS1_UP_REQUEST_MASK (0x4000000U)

#define	CCM_CLOCK_ROOT_STATUS1_UP_REQUEST_SHIFT (26U)

#define	CCM_CLOCK_ROOT_STATUS1_UP_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_UP_REQUEST_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_UP_REQUEST_MASK)

#define	CCM_CLOCK_ROOT_STATUS1_UP_DONE_MASK (0x8000000U)

#define	CCM_CLOCK_ROOT_STATUS1_UP_DONE_SHIFT (27U)

#define	CCM_CLOCK_ROOT_STATUS1_UP_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_UP_DONE_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_UP_DONE_MASK)

CLOCK_ROOT_CONFIG - Clock root configuration
#define	CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_MASK (0x10U)

#define	CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_SHIFT (4U)

#define	CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_MASK)

CLOCK_ROOT_AUTHEN - Clock root access control
#define	CCM_CLOCK_ROOT_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_ROOT_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_ROOT_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TZ_USER_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_ROOT_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_ROOT_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TZ_NS_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE_MASK)

CLOCK_ROOT_AUTHEN_SET - Clock root access control
#define	CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE_MASK)

CLOCK_ROOT_AUTHEN_CLR - Clock root access control
#define	CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE_MASK)

CLOCK_ROOT_AUTHEN_TOG - Clock root access control
#define	CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE_MASK)

CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT - Setpoint setting
#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV_MASK (0xFFU)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV_SHIFT (0U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV_MASK)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX_MASK (0x700U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX_SHIFT (8U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX_MASK)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF_SHIFT (24U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF_MASK)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE_MASK (0xF0000000U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE_SHIFT (28U)

#define	CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE_MASK)

CLOCK_GROUP_CONTROL - Clock group control
#define	CCM_CLOCK_GROUP_CONTROL_DIV0_MASK (0xFU)

#define	CCM_CLOCK_GROUP_CONTROL_DIV0_SHIFT (0U)

#define	CCM_CLOCK_GROUP_CONTROL_DIV0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_DIV0_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_RSTDIV_MASK (0xFF0000U)

#define	CCM_CLOCK_GROUP_CONTROL_RSTDIV_SHIFT (16U)

#define	CCM_CLOCK_GROUP_CONTROL_RSTDIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_RSTDIV_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_CONTROL_OFF_SHIFT (24U)

#define	CCM_CLOCK_GROUP_CONTROL_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_OFF_MASK)

CLOCK_GROUP_CONTROL_SET - Clock group control
#define	CCM_CLOCK_GROUP_CONTROL_SET_DIV0_MASK (0xFU)

#define	CCM_CLOCK_GROUP_CONTROL_SET_DIV0_SHIFT (0U)

#define	CCM_CLOCK_GROUP_CONTROL_SET_DIV0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_SET_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_SET_DIV0_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV_MASK (0xFF0000U)

#define	CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV_SHIFT (16U)

#define	CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_SET_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_CONTROL_SET_OFF_SHIFT (24U)

#define	CCM_CLOCK_GROUP_CONTROL_SET_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_SET_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_SET_OFF_MASK)

CLOCK_GROUP_CONTROL_CLR - Clock group control
#define	CCM_CLOCK_GROUP_CONTROL_CLR_DIV0_MASK (0xFU)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_DIV0_SHIFT (0U)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_DIV0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_CLR_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_CLR_DIV0_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV_MASK (0xFF0000U)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV_SHIFT (16U)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_OFF_SHIFT (24U)

#define	CCM_CLOCK_GROUP_CONTROL_CLR_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_CLR_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_CLR_OFF_MASK)

CLOCK_GROUP_CONTROL_TOG - Clock group control
#define	CCM_CLOCK_GROUP_CONTROL_TOG_DIV0_MASK (0xFU)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_DIV0_SHIFT (0U)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_DIV0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_TOG_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_TOG_DIV0_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV_MASK (0xFF0000U)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV_SHIFT (16U)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV_MASK)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_OFF_SHIFT (24U)

#define	CCM_CLOCK_GROUP_CONTROL_TOG_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_TOG_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_TOG_OFF_MASK)

CLOCK_GROUP_STATUS0 - Clock group working status
#define	CCM_CLOCK_GROUP_STATUS0_DIV0_MASK (0xFU)

#define	CCM_CLOCK_GROUP_STATUS0_DIV0_SHIFT (0U)

#define	CCM_CLOCK_GROUP_STATUS0_DIV0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_DIV0_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_DIV0_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_RSTDIV_MASK (0xFF0000U)

#define	CCM_CLOCK_GROUP_STATUS0_RSTDIV_SHIFT (16U)

#define	CCM_CLOCK_GROUP_STATUS0_RSTDIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_RSTDIV_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_STATUS0_OFF_SHIFT (24U)

#define	CCM_CLOCK_GROUP_STATUS0_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_OFF_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_OFF_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_POWERDOWN_MASK (0x8000000U)

#define	CCM_CLOCK_GROUP_STATUS0_POWERDOWN_SHIFT (27U)

#define	CCM_CLOCK_GROUP_STATUS0_POWERDOWN(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_POWERDOWN_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_POWERDOWN_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY_MASK (0x10000000U)

#define	CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY_SHIFT (28U)

#define	CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD_MASK (0x20000000U)

#define	CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD_SHIFT (29U)

#define	CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE_MASK (0x40000000U)

#define	CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE_SHIFT (30U)

#define	CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE_MASK)

#define	CCM_CLOCK_GROUP_STATUS0_CHANGING_MASK (0x80000000U)

#define	CCM_CLOCK_GROUP_STATUS0_CHANGING_SHIFT (31U)

#define	CCM_CLOCK_GROUP_STATUS0_CHANGING(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_CHANGING_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_CHANGING_MASK)

CLOCK_GROUP_STATUS1 - Clock group low power/extend status
#define	CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT_MASK (0xF0000U)

#define	CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT_SHIFT (16U)

#define	CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT_MASK)

#define	CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT_MASK (0xF00000U)

#define	CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT_SHIFT (20U)

#define	CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT_MASK)

#define	CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST_SHIFT (24U)

#define	CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST_MASK)

#define	CCM_CLOCK_GROUP_STATUS1_DOWN_DONE_MASK (0x2000000U)

#define	CCM_CLOCK_GROUP_STATUS1_DOWN_DONE_SHIFT (25U)

#define	CCM_CLOCK_GROUP_STATUS1_DOWN_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_DOWN_DONE_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_DOWN_DONE_MASK)

#define	CCM_CLOCK_GROUP_STATUS1_UP_REQUEST_MASK (0x4000000U)

#define	CCM_CLOCK_GROUP_STATUS1_UP_REQUEST_SHIFT (26U)

#define	CCM_CLOCK_GROUP_STATUS1_UP_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_UP_REQUEST_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_UP_REQUEST_MASK)

#define	CCM_CLOCK_GROUP_STATUS1_UP_DONE_MASK (0x8000000U)

#define	CCM_CLOCK_GROUP_STATUS1_UP_DONE_SHIFT (27U)

#define	CCM_CLOCK_GROUP_STATUS1_UP_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_UP_DONE_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_UP_DONE_MASK)

CLOCK_GROUP_CONFIG - Clock group configuration
#define	CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT_MASK (0x10U)

#define	CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT_SHIFT (4U)

#define	CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT_MASK)

CLOCK_GROUP_AUTHEN - Clock group access control
#define	CCM_CLOCK_GROUP_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_GROUP_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_GROUP_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TZ_USER_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_GROUP_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_GROUP_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TZ_NS_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE_MASK)

CLOCK_GROUP_AUTHEN_SET - Clock group access control
#define	CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE_MASK)

CLOCK_GROUP_AUTHEN_CLR - Clock group access control
#define	CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE_MASK)

CLOCK_GROUP_AUTHEN_TOG - Clock group access control
#define	CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE_SHIFT (17U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE_MASK)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE_MASK)

CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT - Setpoint setting
#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0_MASK (0xFU)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0_SHIFT (0U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0_MASK)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV_MASK (0xFF0000U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV_SHIFT (16U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV_MASK)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF_MASK (0x1000000U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF_SHIFT (24U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF_MASK)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE_MASK (0xF0000000U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE_SHIFT (28U)

#define	CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE(x) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE_MASK)

GPR_SHARED - General Purpose Register
#define	CCM_GPR_SHARED_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_SHARED_GPR_SHIFT (0U)

#define	CCM_GPR_SHARED_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_GPR_SHIFT)) & CCM_GPR_SHARED_GPR_MASK)

GPR_SHARED_SET - General Purpose Register
#define	CCM_GPR_SHARED_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_SHARED_SET_GPR_SHIFT (0U)

#define	CCM_GPR_SHARED_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_SET_GPR_SHIFT)) & CCM_GPR_SHARED_SET_GPR_MASK)

GPR_SHARED_CLR - General Purpose Register
#define	CCM_GPR_SHARED_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_SHARED_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_SHARED_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_CLR_GPR_SHIFT)) & CCM_GPR_SHARED_CLR_GPR_MASK)

GPR_SHARED_TOG - General Purpose Register
#define	CCM_GPR_SHARED_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_SHARED_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_SHARED_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_TOG_GPR_SHIFT)) & CCM_GPR_SHARED_TOG_GPR_MASK)

GPR_SHARED_AUTHEN - GPR access control
#define	CCM_GPR_SHARED_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_SHARED_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_SHARED_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_SHARED_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_SHARED_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_SHARED_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_SHARED_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_SHARED_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_SHARED_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_LOCK_MODE_MASK)

GPR_SHARED_AUTHEN_SET - GPR access control
#define	CCM_GPR_SHARED_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_SHARED_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_SHARED_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_SHARED_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_SHARED_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_SHARED_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE_MASK)

GPR_SHARED_AUTHEN_CLR - GPR access control
#define	CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_SHARED_AUTHEN_TOG - GPR access control
#define	CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE1 - General Purpose Register
#define	CCM_GPR_PRIVATE1_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE1_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_GPR_SHIFT)) & CCM_GPR_PRIVATE1_GPR_MASK)

GPR_PRIVATE1_SET - General Purpose Register
#define	CCM_GPR_PRIVATE1_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE1_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE1_SET_GPR_MASK)

GPR_PRIVATE1_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE1_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE1_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE1_CLR_GPR_MASK)

GPR_PRIVATE1_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE1_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE1_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE1_TOG_GPR_MASK)

GPR_PRIVATE1_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE1_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE1_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE1_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE1_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE2 - General Purpose Register
#define	CCM_GPR_PRIVATE2_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE2_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_GPR_SHIFT)) & CCM_GPR_PRIVATE2_GPR_MASK)

GPR_PRIVATE2_SET - General Purpose Register
#define	CCM_GPR_PRIVATE2_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE2_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE2_SET_GPR_MASK)

GPR_PRIVATE2_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE2_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE2_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE2_CLR_GPR_MASK)

GPR_PRIVATE2_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE2_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE2_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE2_TOG_GPR_MASK)

GPR_PRIVATE2_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE2_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE2_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE2_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE2_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE3 - General Purpose Register
#define	CCM_GPR_PRIVATE3_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE3_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_GPR_SHIFT)) & CCM_GPR_PRIVATE3_GPR_MASK)

GPR_PRIVATE3_SET - General Purpose Register
#define	CCM_GPR_PRIVATE3_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE3_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE3_SET_GPR_MASK)

GPR_PRIVATE3_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE3_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE3_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE3_CLR_GPR_MASK)

GPR_PRIVATE3_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE3_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE3_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE3_TOG_GPR_MASK)

GPR_PRIVATE3_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE3_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE3_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE3_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE3_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE4 - General Purpose Register
#define	CCM_GPR_PRIVATE4_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE4_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_GPR_SHIFT)) & CCM_GPR_PRIVATE4_GPR_MASK)

GPR_PRIVATE4_SET - General Purpose Register
#define	CCM_GPR_PRIVATE4_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE4_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE4_SET_GPR_MASK)

GPR_PRIVATE4_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE4_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE4_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE4_CLR_GPR_MASK)

GPR_PRIVATE4_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE4_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE4_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE4_TOG_GPR_MASK)

GPR_PRIVATE4_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE4_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE4_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE4_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE4_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE5 - General Purpose Register
#define	CCM_GPR_PRIVATE5_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE5_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_GPR_SHIFT)) & CCM_GPR_PRIVATE5_GPR_MASK)

GPR_PRIVATE5_SET - General Purpose Register
#define	CCM_GPR_PRIVATE5_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE5_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE5_SET_GPR_MASK)

GPR_PRIVATE5_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE5_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE5_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE5_CLR_GPR_MASK)

GPR_PRIVATE5_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE5_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE5_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE5_TOG_GPR_MASK)

GPR_PRIVATE5_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE5_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE5_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE5_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE5_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE6 - General Purpose Register
#define	CCM_GPR_PRIVATE6_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE6_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_GPR_SHIFT)) & CCM_GPR_PRIVATE6_GPR_MASK)

GPR_PRIVATE6_SET - General Purpose Register
#define	CCM_GPR_PRIVATE6_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE6_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE6_SET_GPR_MASK)

GPR_PRIVATE6_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE6_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE6_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE6_CLR_GPR_MASK)

GPR_PRIVATE6_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE6_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE6_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE6_TOG_GPR_MASK)

GPR_PRIVATE6_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE6_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE6_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE6_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE6_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE_MASK)

GPR_PRIVATE7 - General Purpose Register
#define	CCM_GPR_PRIVATE7_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE7_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_GPR_SHIFT)) & CCM_GPR_PRIVATE7_GPR_MASK)

GPR_PRIVATE7_SET - General Purpose Register
#define	CCM_GPR_PRIVATE7_SET_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE7_SET_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_SET_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE7_SET_GPR_MASK)

GPR_PRIVATE7_CLR - General Purpose Register
#define	CCM_GPR_PRIVATE7_CLR_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE7_CLR_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_CLR_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE7_CLR_GPR_MASK)

GPR_PRIVATE7_TOG - General Purpose Register
#define	CCM_GPR_PRIVATE7_TOG_GPR_MASK (0xFFFFFFFFU)

#define	CCM_GPR_PRIVATE7_TOG_GPR_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_TOG_GPR(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE7_TOG_GPR_MASK)

GPR_PRIVATE7_AUTHEN - GPR access control
#define	CCM_GPR_PRIVATE7_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE_MASK)

GPR_PRIVATE7_AUTHEN_SET - GPR access control
#define	CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE_MASK)

GPR_PRIVATE7_AUTHEN_CLR - GPR access control
#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE_MASK)

GPR_PRIVATE7_AUTHEN_TOG - GPR access control
#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER_MASK (0x1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER_SHIFT (0U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS_MASK (0x2U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS_SHIFT (1U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ_MASK (0x10U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ_SHIFT (4U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST_MASK (0xF00U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST_SHIFT (8U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST_MASK (0x1000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST_SHIFT (12U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE_SHIFT (16U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE_MASK)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE_MASK (0x100000U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE_SHIFT (20U)

#define	CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE_MASK)

OSCPLL_DIRECT - Clock source direct control
#define	CCM_OSCPLL_DIRECT_ON_MASK (0x1U)

#define	CCM_OSCPLL_DIRECT_ON_SHIFT (0U)

#define	CCM_OSCPLL_DIRECT_ON(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DIRECT_ON_SHIFT)) & CCM_OSCPLL_DIRECT_ON_MASK)

OSCPLL_DOMAIN - Clock source domain control
#define	CCM_OSCPLL_DOMAIN_LEVEL_MASK (0x7U)

#define	CCM_OSCPLL_DOMAIN_LEVEL_SHIFT (0U)

#define	CCM_OSCPLL_DOMAIN_LEVEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL_MASK)

#define	CCM_OSCPLL_DOMAIN_LEVEL0_MASK (0x70000U)

#define	CCM_OSCPLL_DOMAIN_LEVEL0_SHIFT (16U)

#define	CCM_OSCPLL_DOMAIN_LEVEL0(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL0_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL0_MASK)

#define	CCM_OSCPLL_DOMAIN_LEVEL1_MASK (0x700000U)

#define	CCM_OSCPLL_DOMAIN_LEVEL1_SHIFT (20U)

#define	CCM_OSCPLL_DOMAIN_LEVEL1(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL1_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL1_MASK)

#define	CCM_OSCPLL_DOMAIN_LEVEL2_MASK (0x7000000U)

#define	CCM_OSCPLL_DOMAIN_LEVEL2_SHIFT (24U)

#define	CCM_OSCPLL_DOMAIN_LEVEL2(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL2_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL2_MASK)

#define	CCM_OSCPLL_DOMAIN_LEVEL3_MASK (0x70000000U)

#define	CCM_OSCPLL_DOMAIN_LEVEL3_SHIFT (28U)

#define	CCM_OSCPLL_DOMAIN_LEVEL3(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL3_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL3_MASK)

OSCPLL_SETPOINT - Clock source Setpoint setting
#define	CCM_OSCPLL_SETPOINT_SETPOINT_MASK (0xFFFFU)

#define	CCM_OSCPLL_SETPOINT_SETPOINT_SHIFT (0U)

#define	CCM_OSCPLL_SETPOINT_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_SETPOINT_SETPOINT_SHIFT)) & CCM_OSCPLL_SETPOINT_SETPOINT_MASK)

#define	CCM_OSCPLL_SETPOINT_STANDBY_MASK (0xFFFF0000U)

#define	CCM_OSCPLL_SETPOINT_STANDBY_SHIFT (16U)

#define	CCM_OSCPLL_SETPOINT_STANDBY(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_SETPOINT_STANDBY_SHIFT)) & CCM_OSCPLL_SETPOINT_STANDBY_MASK)

OSCPLL_STATUS0 - Clock source working status
#define	CCM_OSCPLL_STATUS0_ON_MASK (0x1U)

#define	CCM_OSCPLL_STATUS0_ON_SHIFT (0U)

#define	CCM_OSCPLL_STATUS0_ON(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_ON_SHIFT)) & CCM_OSCPLL_STATUS0_ON_MASK)

#define	CCM_OSCPLL_STATUS0_STATUS_EARLY_MASK (0x10U)

#define	CCM_OSCPLL_STATUS0_STATUS_EARLY_SHIFT (4U)

#define	CCM_OSCPLL_STATUS0_STATUS_EARLY(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_STATUS_EARLY_SHIFT)) & CCM_OSCPLL_STATUS0_STATUS_EARLY_MASK)

#define	CCM_OSCPLL_STATUS0_STATUS_LATE_MASK (0x20U)

#define	CCM_OSCPLL_STATUS0_STATUS_LATE_SHIFT (5U)

#define	CCM_OSCPLL_STATUS0_STATUS_LATE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_STATUS_LATE_SHIFT)) & CCM_OSCPLL_STATUS0_STATUS_LATE_MASK)

#define	CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN_MASK (0xF00U)

#define	CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN_SHIFT (8U)

#define	CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN_SHIFT)) & CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN_MASK)

#define	CCM_OSCPLL_STATUS0_DOMAIN_ENABLE_MASK (0xF000U)

#define	CCM_OSCPLL_STATUS0_DOMAIN_ENABLE_SHIFT (12U)

#define	CCM_OSCPLL_STATUS0_DOMAIN_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_DOMAIN_ENABLE_SHIFT)) & CCM_OSCPLL_STATUS0_DOMAIN_ENABLE_MASK)

#define	CCM_OSCPLL_STATUS0_IN_USE_MASK (0x10000000U)

#define	CCM_OSCPLL_STATUS0_IN_USE_SHIFT (28U)

#define	CCM_OSCPLL_STATUS0_IN_USE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_IN_USE_SHIFT)) & CCM_OSCPLL_STATUS0_IN_USE_MASK)

OSCPLL_STATUS1 - Clock source low power status
#define	CCM_OSCPLL_STATUS1_CPU0_MODE_MASK (0x3U)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_SHIFT (0U)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU0_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU0_MODE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST_MASK (0x4U)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST_SHIFT (2U)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_DONE_MASK (0x8U)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_DONE_SHIFT (3U)

#define	CCM_OSCPLL_STATUS1_CPU0_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU0_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU0_MODE_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT (4U)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST_MASK (0x40U)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST_SHIFT (6U)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_DONE_MASK (0x80U)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_DONE_SHIFT (7U)

#define	CCM_OSCPLL_STATUS1_CPU1_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT (8U)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST_MASK (0x400U)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST_SHIFT (10U)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_DONE_MASK (0x800U)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_DONE_SHIFT (11U)

#define	CCM_OSCPLL_STATUS1_CPU2_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_MASK (0x3000U)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_SHIFT (12U)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU3_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU3_MODE_MASK)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST_MASK (0x4000U)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST_SHIFT (14U)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_DONE_MASK (0x8000U)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_DONE_SHIFT (15U)

#define	CCM_OSCPLL_STATUS1_CPU3_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU3_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU3_MODE_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_TARGET_SETPOINT_MASK (0xF0000U)

#define	CCM_OSCPLL_STATUS1_TARGET_SETPOINT_SHIFT (16U)

#define	CCM_OSCPLL_STATUS1_TARGET_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_OSCPLL_STATUS1_TARGET_SETPOINT_MASK)

#define	CCM_OSCPLL_STATUS1_CURRENT_SETPOINT_MASK (0xF00000U)

#define	CCM_OSCPLL_STATUS1_CURRENT_SETPOINT_SHIFT (20U)

#define	CCM_OSCPLL_STATUS1_CURRENT_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_OSCPLL_STATUS1_CURRENT_SETPOINT_MASK)

#define	CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST_MASK (0x1000000U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST_SHIFT (24U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE_MASK (0x2000000U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE_SHIFT (25U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST_MASK (0x4000000U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST_SHIFT (26U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE_MASK (0x8000000U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE_SHIFT (27U)

#define	CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST_MASK (0x10000000U)

#define	CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST_SHIFT (28U)

#define	CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST_MASK)

#define	CCM_OSCPLL_STATUS1_STANDBY_IN_DONE_MASK (0x20000000U)

#define	CCM_OSCPLL_STATUS1_STANDBY_IN_DONE_SHIFT (29U)

#define	CCM_OSCPLL_STATUS1_STANDBY_IN_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_IN_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_IN_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE_MASK (0x40000000U)

#define	CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE_SHIFT (30U)

#define	CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE_MASK)

#define	CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST_MASK (0x80000000U)

#define	CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST_SHIFT (31U)

#define	CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST_MASK)

OSCPLL_CONFIG - Clock source configuration
#define	CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT_MASK (0x2U)

#define	CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT_SHIFT (1U)

#define	CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT_SHIFT)) & CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT_MASK)

#define	CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_MASK (0x10U)

#define	CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_SHIFT (4U)

#define	CCM_OSCPLL_CONFIG_SETPOINT_PRESENT(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_MASK)

OSCPLL_AUTHEN - Clock source access control
#define	CCM_OSCPLL_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_OSCPLL_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_OSCPLL_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_TZ_USER_SHIFT)) & CCM_OSCPLL_AUTHEN_TZ_USER_MASK)

#define	CCM_OSCPLL_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_OSCPLL_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_OSCPLL_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_TZ_NS_SHIFT)) & CCM_OSCPLL_AUTHEN_TZ_NS_MASK)

#define	CCM_OSCPLL_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_OSCPLL_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_OSCPLL_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_LOCK_TZ_SHIFT)) & CCM_OSCPLL_AUTHEN_LOCK_TZ_MASK)

#define	CCM_OSCPLL_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_OSCPLL_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_OSCPLL_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_WHITE_LIST_SHIFT)) & CCM_OSCPLL_AUTHEN_WHITE_LIST_MASK)

#define	CCM_OSCPLL_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_OSCPLL_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_OSCPLL_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_LOCK_LIST_SHIFT)) & CCM_OSCPLL_AUTHEN_LOCK_LIST_MASK)

#define	CCM_OSCPLL_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_OSCPLL_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_OSCPLL_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_OSCPLL_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_OSCPLL_AUTHEN_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_OSCPLL_AUTHEN_SETPOINT_MODE_SHIFT (17U)

#define	CCM_OSCPLL_AUTHEN_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_OSCPLL_AUTHEN_SETPOINT_MODE_MASK)

#define	CCM_OSCPLL_AUTHEN_CPULPM_MASK (0x40000U)

#define	CCM_OSCPLL_AUTHEN_CPULPM_SHIFT (18U)

#define	CCM_OSCPLL_AUTHEN_CPULPM(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_CPULPM_SHIFT)) & CCM_OSCPLL_AUTHEN_CPULPM_MASK)

#define	CCM_OSCPLL_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_OSCPLL_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_OSCPLL_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_LOCK_MODE_SHIFT)) & CCM_OSCPLL_AUTHEN_LOCK_MODE_MASK)

LPCG_DIRECT - LPCG direct control
#define	CCM_LPCG_DIRECT_ON_MASK (0x1U)

#define	CCM_LPCG_DIRECT_ON_SHIFT (0U)

#define	CCM_LPCG_DIRECT_ON(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DIRECT_ON_SHIFT)) & CCM_LPCG_DIRECT_ON_MASK)

LPCG_DOMAIN - LPCG domain control
#define	CCM_LPCG_DOMAIN_LEVEL_MASK (0x7U)

#define	CCM_LPCG_DOMAIN_LEVEL_SHIFT (0U)

#define	CCM_LPCG_DOMAIN_LEVEL(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL_MASK)

#define	CCM_LPCG_DOMAIN_LEVEL0_MASK (0x70000U)

#define	CCM_LPCG_DOMAIN_LEVEL0_SHIFT (16U)

#define	CCM_LPCG_DOMAIN_LEVEL0(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL0_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL0_MASK)

#define	CCM_LPCG_DOMAIN_LEVEL1_MASK (0x700000U)

#define	CCM_LPCG_DOMAIN_LEVEL1_SHIFT (20U)

#define	CCM_LPCG_DOMAIN_LEVEL1(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL1_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL1_MASK)

#define	CCM_LPCG_DOMAIN_LEVEL2_MASK (0x7000000U)

#define	CCM_LPCG_DOMAIN_LEVEL2_SHIFT (24U)

#define	CCM_LPCG_DOMAIN_LEVEL2(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL2_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL2_MASK)

#define	CCM_LPCG_DOMAIN_LEVEL3_MASK (0x70000000U)

#define	CCM_LPCG_DOMAIN_LEVEL3_SHIFT (28U)

#define	CCM_LPCG_DOMAIN_LEVEL3(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL3_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL3_MASK)

LPCG_SETPOINT - LPCG Setpoint setting
#define	CCM_LPCG_SETPOINT_SETPOINT_MASK (0xFFFFU)

#define	CCM_LPCG_SETPOINT_SETPOINT_SHIFT (0U)

#define	CCM_LPCG_SETPOINT_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_SETPOINT_SETPOINT_SHIFT)) & CCM_LPCG_SETPOINT_SETPOINT_MASK)

#define	CCM_LPCG_SETPOINT_STANDBY_MASK (0xFFFF0000U)

#define	CCM_LPCG_SETPOINT_STANDBY_SHIFT (16U)

#define	CCM_LPCG_SETPOINT_STANDBY(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_SETPOINT_STANDBY_SHIFT)) & CCM_LPCG_SETPOINT_STANDBY_MASK)

LPCG_STATUS0 - LPCG working status
#define	CCM_LPCG_STATUS0_ON_MASK (0x1U)

#define	CCM_LPCG_STATUS0_ON_SHIFT (0U)

#define	CCM_LPCG_STATUS0_ON(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS0_ON_SHIFT)) & CCM_LPCG_STATUS0_ON_MASK)

#define	CCM_LPCG_STATUS0_ACTIVE_DOMAIN_MASK (0xF00U)

#define	CCM_LPCG_STATUS0_ACTIVE_DOMAIN_SHIFT (8U)

#define	CCM_LPCG_STATUS0_ACTIVE_DOMAIN(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS0_ACTIVE_DOMAIN_SHIFT)) & CCM_LPCG_STATUS0_ACTIVE_DOMAIN_MASK)

#define	CCM_LPCG_STATUS0_DOMAIN_ENABLE_MASK (0xF000U)

#define	CCM_LPCG_STATUS0_DOMAIN_ENABLE_SHIFT (12U)

#define	CCM_LPCG_STATUS0_DOMAIN_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS0_DOMAIN_ENABLE_SHIFT)) & CCM_LPCG_STATUS0_DOMAIN_ENABLE_MASK)

LPCG_STATUS1 - LPCG low power status
#define	CCM_LPCG_STATUS1_CPU0_MODE_MASK (0x3U)

#define	CCM_LPCG_STATUS1_CPU0_MODE_SHIFT (0U)

#define	CCM_LPCG_STATUS1_CPU0_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU0_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU0_MODE_MASK)

#define	CCM_LPCG_STATUS1_CPU0_MODE_REQUEST_MASK (0x4U)

#define	CCM_LPCG_STATUS1_CPU0_MODE_REQUEST_SHIFT (2U)

#define	CCM_LPCG_STATUS1_CPU0_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU0_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU0_MODE_REQUEST_MASK)

#define	CCM_LPCG_STATUS1_CPU0_MODE_DONE_MASK (0x8U)

#define	CCM_LPCG_STATUS1_CPU0_MODE_DONE_SHIFT (3U)

#define	CCM_LPCG_STATUS1_CPU0_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU0_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU0_MODE_DONE_MASK)

#define	CCM_LPCG_STATUS1_CPU1_MODE_MASK (0x30U)

#define	CCM_LPCG_STATUS1_CPU1_MODE_SHIFT (4U)

#define	CCM_LPCG_STATUS1_CPU1_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU1_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU1_MODE_MASK)

#define	CCM_LPCG_STATUS1_CPU1_MODE_REQUEST_MASK (0x40U)

#define	CCM_LPCG_STATUS1_CPU1_MODE_REQUEST_SHIFT (6U)

#define	CCM_LPCG_STATUS1_CPU1_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU1_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU1_MODE_REQUEST_MASK)

#define	CCM_LPCG_STATUS1_CPU1_MODE_DONE_MASK (0x80U)

#define	CCM_LPCG_STATUS1_CPU1_MODE_DONE_SHIFT (7U)

#define	CCM_LPCG_STATUS1_CPU1_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU1_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU1_MODE_DONE_MASK)

#define	CCM_LPCG_STATUS1_CPU2_MODE_MASK (0x300U)

#define	CCM_LPCG_STATUS1_CPU2_MODE_SHIFT (8U)

#define	CCM_LPCG_STATUS1_CPU2_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU2_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU2_MODE_MASK)

#define	CCM_LPCG_STATUS1_CPU2_MODE_REQUEST_MASK (0x400U)

#define	CCM_LPCG_STATUS1_CPU2_MODE_REQUEST_SHIFT (10U)

#define	CCM_LPCG_STATUS1_CPU2_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU2_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU2_MODE_REQUEST_MASK)

#define	CCM_LPCG_STATUS1_CPU2_MODE_DONE_MASK (0x800U)

#define	CCM_LPCG_STATUS1_CPU2_MODE_DONE_SHIFT (11U)

#define	CCM_LPCG_STATUS1_CPU2_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU2_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU2_MODE_DONE_MASK)

#define	CCM_LPCG_STATUS1_CPU3_MODE_MASK (0x3000U)

#define	CCM_LPCG_STATUS1_CPU3_MODE_SHIFT (12U)

#define	CCM_LPCG_STATUS1_CPU3_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU3_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU3_MODE_MASK)

#define	CCM_LPCG_STATUS1_CPU3_MODE_REQUEST_MASK (0x4000U)

#define	CCM_LPCG_STATUS1_CPU3_MODE_REQUEST_SHIFT (14U)

#define	CCM_LPCG_STATUS1_CPU3_MODE_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU3_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU3_MODE_REQUEST_MASK)

#define	CCM_LPCG_STATUS1_CPU3_MODE_DONE_MASK (0x8000U)

#define	CCM_LPCG_STATUS1_CPU3_MODE_DONE_SHIFT (15U)

#define	CCM_LPCG_STATUS1_CPU3_MODE_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU3_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU3_MODE_DONE_MASK)

#define	CCM_LPCG_STATUS1_TARGET_SETPOINT_MASK (0xF0000U)

#define	CCM_LPCG_STATUS1_TARGET_SETPOINT_SHIFT (16U)

#define	CCM_LPCG_STATUS1_TARGET_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_LPCG_STATUS1_TARGET_SETPOINT_MASK)

#define	CCM_LPCG_STATUS1_CURRENT_SETPOINT_MASK (0xF00000U)

#define	CCM_LPCG_STATUS1_CURRENT_SETPOINT_SHIFT (20U)

#define	CCM_LPCG_STATUS1_CURRENT_SETPOINT(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_LPCG_STATUS1_CURRENT_SETPOINT_MASK)

#define	CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST_MASK (0x1000000U)

#define	CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST_SHIFT (24U)

#define	CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST_MASK)

#define	CCM_LPCG_STATUS1_SETPOINT_OFF_DONE_MASK (0x2000000U)

#define	CCM_LPCG_STATUS1_SETPOINT_OFF_DONE_SHIFT (25U)

#define	CCM_LPCG_STATUS1_SETPOINT_OFF_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_OFF_DONE_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_OFF_DONE_MASK)

#define	CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST_MASK (0x4000000U)

#define	CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST_SHIFT (26U)

#define	CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST_MASK)

#define	CCM_LPCG_STATUS1_SETPOINT_ON_DONE_MASK (0x8000000U)

#define	CCM_LPCG_STATUS1_SETPOINT_ON_DONE_SHIFT (27U)

#define	CCM_LPCG_STATUS1_SETPOINT_ON_DONE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_ON_DONE_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_ON_DONE_MASK)

LPCG_CONFIG - LPCG configuration
#define	CCM_LPCG_CONFIG_SETPOINT_PRESENT_MASK (0x10U)

#define	CCM_LPCG_CONFIG_SETPOINT_PRESENT_SHIFT (4U)

#define	CCM_LPCG_CONFIG_SETPOINT_PRESENT(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_LPCG_CONFIG_SETPOINT_PRESENT_MASK)

LPCG_AUTHEN - LPCG access control
#define	CCM_LPCG_AUTHEN_TZ_USER_MASK (0x1U)

#define	CCM_LPCG_AUTHEN_TZ_USER_SHIFT (0U)

#define	CCM_LPCG_AUTHEN_TZ_USER(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_TZ_USER_SHIFT)) & CCM_LPCG_AUTHEN_TZ_USER_MASK)

#define	CCM_LPCG_AUTHEN_TZ_NS_MASK (0x2U)

#define	CCM_LPCG_AUTHEN_TZ_NS_SHIFT (1U)

#define	CCM_LPCG_AUTHEN_TZ_NS(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_TZ_NS_SHIFT)) & CCM_LPCG_AUTHEN_TZ_NS_MASK)

#define	CCM_LPCG_AUTHEN_LOCK_TZ_MASK (0x10U)

#define	CCM_LPCG_AUTHEN_LOCK_TZ_SHIFT (4U)

#define	CCM_LPCG_AUTHEN_LOCK_TZ(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_LOCK_TZ_SHIFT)) & CCM_LPCG_AUTHEN_LOCK_TZ_MASK)

#define	CCM_LPCG_AUTHEN_WHITE_LIST_MASK (0xF00U)

#define	CCM_LPCG_AUTHEN_WHITE_LIST_SHIFT (8U)

#define	CCM_LPCG_AUTHEN_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_WHITE_LIST_SHIFT)) & CCM_LPCG_AUTHEN_WHITE_LIST_MASK)

#define	CCM_LPCG_AUTHEN_LOCK_LIST_MASK (0x1000U)

#define	CCM_LPCG_AUTHEN_LOCK_LIST_SHIFT (12U)

#define	CCM_LPCG_AUTHEN_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_LOCK_LIST_SHIFT)) & CCM_LPCG_AUTHEN_LOCK_LIST_MASK)

#define	CCM_LPCG_AUTHEN_DOMAIN_MODE_MASK (0x10000U)

#define	CCM_LPCG_AUTHEN_DOMAIN_MODE_SHIFT (16U)

#define	CCM_LPCG_AUTHEN_DOMAIN_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_LPCG_AUTHEN_DOMAIN_MODE_MASK)

#define	CCM_LPCG_AUTHEN_SETPOINT_MODE_MASK (0x20000U)

#define	CCM_LPCG_AUTHEN_SETPOINT_MODE_SHIFT (17U)

#define	CCM_LPCG_AUTHEN_SETPOINT_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_LPCG_AUTHEN_SETPOINT_MODE_MASK)

#define	CCM_LPCG_AUTHEN_CPULPM_MASK (0x40000U)

#define	CCM_LPCG_AUTHEN_CPULPM_SHIFT (18U)

#define	CCM_LPCG_AUTHEN_CPULPM(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_CPULPM_SHIFT)) & CCM_LPCG_AUTHEN_CPULPM_MASK)

#define	CCM_LPCG_AUTHEN_LOCK_MODE_MASK (0x100000U)

#define	CCM_LPCG_AUTHEN_LOCK_MODE_SHIFT (20U)

#define	CCM_LPCG_AUTHEN_LOCK_MODE(x) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_LOCK_MODE_SHIFT)) & CCM_LPCG_AUTHEN_LOCK_MODE_MASK)

Detailed Description

Macro Definition Documentation

◆ CCM_CACRR_ARM_PODF

#define CCM_CACRR_ARM_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CACRR_ARM_PODF_SHIFT)) & CCM_CACRR_ARM_PODF_MASK)

ARM_PODF 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CBCDR_AHB_PODF

#define CCM_CBCDR_AHB_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_AHB_PODF_SHIFT)) & CCM_CBCDR_AHB_PODF_MASK)

AHB_PODF 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CBCDR_IPG_PODF

#define CCM_CBCDR_IPG_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_IPG_PODF_SHIFT)) & CCM_CBCDR_IPG_PODF_MASK)

IPG_PODF 0b00..divide by 1 0b01..divide by 2 0b10..divide by 3 0b11..divide by 4

◆ CCM_CBCDR_PERIPH_CLK2_PODF

#define CCM_CBCDR_PERIPH_CLK2_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT)) & CCM_CBCDR_PERIPH_CLK2_PODF_MASK)

PERIPH_CLK2_PODF 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CBCDR_PERIPH_CLK_SEL

#define CCM_CBCDR_PERIPH_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_PERIPH_CLK_SEL_SHIFT)) & CCM_CBCDR_PERIPH_CLK_SEL_MASK)

PERIPH_CLK_SEL 0b0..derive clock from pre_periph_clk_sel 0b1..derive clock from periph_clk2_clk_divided

◆ CCM_CBCDR_SEMC_ALT_CLK_SEL

#define CCM_CBCDR_SEMC_ALT_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_ALT_CLK_SEL_SHIFT)) & CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK)

SEMC_ALT_CLK_SEL 0b0..PLL2 PFD2 will be selected as alternative clock for SEMC root clock 0b1..PLL3 PFD1 will be selected as alternative clock for SEMC root clock

◆ CCM_CBCDR_SEMC_CLK_SEL

#define CCM_CBCDR_SEMC_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_CLK_SEL_SHIFT)) & CCM_CBCDR_SEMC_CLK_SEL_MASK)

SEMC_CLK_SEL 0b0..Periph_clk output will be used as SEMC clock root 0b1..SEMC alternative clock will be used as SEMC clock root

◆ CCM_CBCDR_SEMC_PODF

#define CCM_CBCDR_SEMC_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_PODF_SHIFT)) & CCM_CBCDR_SEMC_PODF_MASK)

SEMC_PODF 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CBCMR_LCDIF_PODF

#define CCM_CBCMR_LCDIF_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LCDIF_PODF_SHIFT)) & CCM_CBCMR_LCDIF_PODF_MASK)

LCDIF_PODF 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CBCMR_LPSPI_CLK_SEL

#define CCM_CBCMR_LPSPI_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LPSPI_CLK_SEL_SHIFT)) & CCM_CBCMR_LPSPI_CLK_SEL_MASK)

LPSPI_CLK_SEL 0b00..derive clock from PLL3 PFD1 clk 0b01..derive clock from PLL3 PFD0 0b10..derive clock from PLL2 0b11..derive clock from PLL2 PFD2

◆ CCM_CBCMR_LPSPI_PODF

#define CCM_CBCMR_LPSPI_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LPSPI_PODF_SHIFT)) & CCM_CBCMR_LPSPI_PODF_MASK)

LPSPI_PODF 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CBCMR_PERIPH_CLK2_SEL

#define CCM_CBCMR_PERIPH_CLK2_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_PERIPH_CLK2_SEL_SHIFT)) & CCM_CBCMR_PERIPH_CLK2_SEL_MASK)

PERIPH_CLK2_SEL 0b00..derive clock from pll3_sw_clk 0b01..derive clock from osc_clk (pll1_ref_clk) 0b10..derive clock from pll2_bypass_clk 0b11..reserved

◆ CCM_CBCMR_PRE_PERIPH_CLK_SEL

#define CCM_CBCMR_PRE_PERIPH_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT)) & CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK)

PRE_PERIPH_CLK_SEL 0b00..derive clock from PLL2 0b01..derive clock from PLL2 PFD2 0b10..derive clock from PLL2 PFD0 0b11..derive clock from divided PLL1

◆ CCM_CBCMR_TRACE_CLK_SEL

#define CCM_CBCMR_TRACE_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_TRACE_CLK_SEL_SHIFT)) & CCM_CBCMR_TRACE_CLK_SEL_MASK)

TRACE_CLK_SEL 0b00..derive clock from PLL2 0b01..derive clock from PLL2 PFD2 0b10..derive clock from PLL2 PFD0 0b11..derive clock from PLL2 PFD1

◆ CCM_CCGR3_CG14

#define CCM_CCGR3_CG14 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG14_SHIFT)) & CCM_CCGR3_CG14_MASK)

CG14 - The OCRAM clock cannot be turned off when the CM cache is running on this device.

◆ CCM_CCOSR_CLK_OUT_SEL

#define CCM_CCOSR_CLK_OUT_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLK_OUT_SEL_SHIFT)) & CCM_CCOSR_CLK_OUT_SEL_MASK)

CLK_OUT_SEL 0b0..CCM_CLKO1 output drives CCM_CLKO1 clock 0b1..CCM_CLKO1 output drives CCM_CLKO2 clock

◆ CCM_CCOSR_CLKO1_DIV

#define CCM_CCOSR_CLKO1_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_DIV_SHIFT)) & CCM_CCOSR_CLKO1_DIV_MASK)

CLKO1_DIV 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CCOSR_CLKO1_EN

#define CCM_CCOSR_CLKO1_EN ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_EN_SHIFT)) & CCM_CCOSR_CLKO1_EN_MASK)

CLKO1_EN 0b0..CCM_CLKO1 disabled. 0b1..CCM_CLKO1 enabled.

◆ CCM_CCOSR_CLKO1_SEL

#define CCM_CCOSR_CLKO1_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_SEL_SHIFT)) & CCM_CCOSR_CLKO1_SEL_MASK)

CLKO1_SEL 0b0000..USB1 PLL clock (divided by 2) 0b0001..SYS PLL clock (divided by 2) 0b0011..VIDEO PLL clock (divided by 2) 0b0101..semc_clk_root 0b0110..Reserved 0b1010..lcdif_pix_clk_root 0b1011..ahb_clk_root 0b1100..ipg_clk_root 0b1101..perclk_root 0b1110..ckil_sync_clk_root 0b1111..pll4_main_clk

◆ CCM_CCOSR_CLKO2_DIV

#define CCM_CCOSR_CLKO2_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_DIV_SHIFT)) & CCM_CCOSR_CLKO2_DIV_MASK)

CLKO2_DIV 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CCOSR_CLKO2_EN

#define CCM_CCOSR_CLKO2_EN ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_EN_SHIFT)) & CCM_CCOSR_CLKO2_EN_MASK)

CLKO2_EN 0b0..CCM_CLKO2 disabled. 0b1..CCM_CLKO2 enabled.

◆ CCM_CCOSR_CLKO2_SEL

#define CCM_CCOSR_CLKO2_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_SEL_SHIFT)) & CCM_CCOSR_CLKO2_SEL_MASK)

CLKO2_SEL 0b00011..usdhc1_clk_root 0b00110..lpi2c_clk_root 0b01011..csi_clk_root 0b01110..osc_clk 0b10001..usdhc2_clk_root 0b10010..sai1_clk_root 0b10011..sai2_clk_root 0b10100..sai3_clk_root 0b10111..can_clk_root 0b11011..flexspi_clk_root 0b11100..uart_clk_root 0b11101..spdif0_clk_root 0b11111..Reserved

◆ CCM_CCR_COSC_EN

#define CCM_CCR_COSC_EN ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CCR_COSC_EN_SHIFT)) & CCM_CCR_COSC_EN_MASK)

COSC_EN 0b0..disable on chip oscillator 0b1..enable on chip oscillator

◆ CCM_CCR_OSCNT

#define CCM_CCR_OSCNT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CCR_OSCNT_SHIFT)) & CCM_CCR_OSCNT_MASK)

OSCNT - Oscillator ready counter value. These bits define value of 32KHz counter, that serve as counter for oscillator lock time (count to n+1 ckil's). This is used for oscillator lock time. Current estimation is ~5ms. This counter will be used in ignition sequence and in wake from stop sequence if sbyos bit was defined, to notify that on chip oscillator output is ready for the dpll_ip to use and only then the gate in dpll_ip can be opened.

◆ CCM_CCR_RBC_EN

#define CCM_CCR_RBC_EN ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CCR_RBC_EN_SHIFT)) & CCM_CCR_RBC_EN_MASK)

RBC_EN 0b1..REG_BYPASS_COUNTER enabled. 0b0..REG_BYPASS_COUNTER disabled

◆ CCM_CCR_REG_BYPASS_COUNT

#define CCM_CCR_REG_BYPASS_COUNT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CCR_REG_BYPASS_COUNT_SHIFT)) & CCM_CCR_REG_BYPASS_COUNT_MASK)

REG_BYPASS_COUNT 0b000000..no delay 0b000001..1 CKIL clock period delay 0b111111..63 CKIL clock periods delay

◆ CCM_CCSR_PLL3_SW_CLK_SEL

#define CCM_CCSR_PLL3_SW_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CCSR_PLL3_SW_CLK_SEL_SHIFT)) & CCM_CCSR_PLL3_SW_CLK_SEL_MASK)

PLL3_SW_CLK_SEL 0b0..pll3_main_clk 0b1..pll3 bypass clock

◆ CCM_CDCDR_FLEXIO1_CLK_PODF

#define CCM_CDCDR_FLEXIO1_CLK_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_PODF_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_PODF_MASK)

FLEXIO1_CLK_PODF - Divider for flexio1 clock podf. Divider should be updated when output clock is gated. 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 3 0b011..Divide by 4 0b100..Divide by 5 0b101..Divide by 6 0b110..Divide by 7 0b111..Divide by 8

◆ CCM_CDCDR_FLEXIO1_CLK_PRED

#define CCM_CDCDR_FLEXIO1_CLK_PRED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_PRED_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_PRED_MASK)

FLEXIO1_CLK_PRED - Divider for flexio1 clock pred. Divider should be updated when output clock is gated. 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 3 0b011..Divide by 4 0b100..Divide by 5 0b101..Divide by 6 0b110..Divide by 7 0b111..Divide by 8

◆ CCM_CDCDR_FLEXIO1_CLK_SEL

#define CCM_CDCDR_FLEXIO1_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_SEL_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_SEL_MASK)

FLEXIO1_CLK_SEL 0b00..derive clock from PLL4 0b01..derive clock from PLL3 PFD2 0b10..derive clock from PLL5 0b11..derive clock from pll3_sw_clk

◆ CCM_CDCDR_SPDIF0_CLK_PODF

#define CCM_CDCDR_SPDIF0_CLK_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_PODF_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_PODF_MASK)

SPDIF0_CLK_PODF - Divider for spdif0 clock podf. Divider should be updated when output clock is gated. 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 3 0b011..Divide by 4 0b100..Divide by 5 0b101..Divide by 6 0b110..Divide by 7 0b111..Divide by 8

◆ CCM_CDCDR_SPDIF0_CLK_PRED

#define CCM_CDCDR_SPDIF0_CLK_PRED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_PRED_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_PRED_MASK)

SPDIF0_CLK_PRED - Divider for spdif0 clock pred. Divider should be updated when output clock is gated. 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 3 0b011..Divide by 4 0b100..Divide by 5 0b101..Divide by 6 0b110..Divide by 7 0b111..Divide by 8

◆ CCM_CDCDR_SPDIF0_CLK_SEL

#define CCM_CDCDR_SPDIF0_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_SEL_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_SEL_MASK)

SPDIF0_CLK_SEL 0b00..derive clock from PLL4 0b01..derive clock from PLL3 PFD2 0b10..derive clock from PLL5 0b11..derive clock from pll3_sw_clk

◆ CCM_CDHIPR_AHB_PODF_BUSY

#define CCM_CDHIPR_AHB_PODF_BUSY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_AHB_PODF_BUSY_SHIFT)) & CCM_CDHIPR_AHB_PODF_BUSY_MASK)

AHB_PODF_BUSY 0b0..divider is not busy and its value represents the actual division. 0b1..divider is busy with handshake process with module. The value read in the divider represents the previous value of the division factor, and after the handshake the written value of the ahb_podf will be applied.

◆ CCM_CDHIPR_ARM_PODF_BUSY

#define CCM_CDHIPR_ARM_PODF_BUSY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_ARM_PODF_BUSY_SHIFT)) & CCM_CDHIPR_ARM_PODF_BUSY_MASK)

ARM_PODF_BUSY 0b0..divider is not busy and its value represents the actual division. 0b1..divider is busy with handshake process with module. The value read in the divider represents the previous value of the division factor, and after the handshake the written value of the arm_podf will be applied.

◆ CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY

#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_SHIFT)) & CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_MASK)

PERIPH2_CLK_SEL_BUSY 0b0..mux is not busy and its value represents the actual division. 0b1..mux is busy with handshake process with module. The value read in the periph2_clk_sel represents the previous value of select, and after the handshake periph2_clk_sel value will be applied.

◆ CCM_CDHIPR_PERIPH_CLK_SEL_BUSY

#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_SHIFT)) & CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_MASK)

PERIPH_CLK_SEL_BUSY 0b0..mux is not busy and its value represents the actual division. 0b1..mux is busy with handshake process with module. The value read in the periph_clk_sel represents the previous value of select, and after the handshake periph_clk_sel value will be applied.

◆ CCM_CDHIPR_SEMC_PODF_BUSY

#define CCM_CDHIPR_SEMC_PODF_BUSY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_SEMC_PODF_BUSY_SHIFT)) & CCM_CDHIPR_SEMC_PODF_BUSY_MASK)

SEMC_PODF_BUSY 0b0..divider is not busy and its value represents the actual division. 0b1..divider is busy with handshake process with module. The value read in the divider represents the previous value of the division factor, and after the handshake the written value of the semc_podf will be applied.

◆ CCM_CGPR_EFUSE_PROG_SUPPLY_GATE

#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_SHIFT)) & CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_MASK)

EFUSE_PROG_SUPPLY_GATE 0b0..fuse programing supply voltage is gated off to the efuse module 0b1..allow fuse programing.

◆ CCM_CGPR_FPL

#define CCM_CGPR_FPL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_FPL_SHIFT)) & CCM_CGPR_FPL_MASK)

FPL - Fast PLL enable. 0b0..Engage PLL enable default way. 0b1..Engage PLL enable 3 CKIL clocks earlier at exiting low power mode (STOP). Should be used only if 24MHz OSC was active in low power mode.

◆ CCM_CGPR_INT_MEM_CLK_LPM

#define CCM_CGPR_INT_MEM_CLK_LPM ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_INT_MEM_CLK_LPM_SHIFT)) & CCM_CGPR_INT_MEM_CLK_LPM_MASK)

INT_MEM_CLK_LPM 0b0..Disable the clock to the Arm platform memories when entering Low Power Mode 0b1..Keep the clocks to the Arm platform memories enabled only if an interrupt is pending when entering Low Power Modes (WAIT and STOP without power gating)

◆ CCM_CGPR_PMIC_DELAY_SCALER

#define CCM_CGPR_PMIC_DELAY_SCALER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_PMIC_DELAY_SCALER_SHIFT)) & CCM_CGPR_PMIC_DELAY_SCALER_MASK)

PMIC_DELAY_SCALER 0b0..clock is not divided 0b1..clock is divided /8

◆ CCM_CGPR_SYS_MEM_DS_CTRL

#define CCM_CGPR_SYS_MEM_DS_CTRL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT)) & CCM_CGPR_SYS_MEM_DS_CTRL_MASK)

SYS_MEM_DS_CTRL 0b00..Disable memory DS mode always 0b01..Enable memory (outside Arm platform) DS mode when system STOP and PLL are disabled 0b1x..enable memory (outside Arm platform) DS mode when system is in STOP mode

◆ CCM_CIMR_ARM_PODF_LOADED

#define CCM_CIMR_ARM_PODF_LOADED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_ARM_PODF_LOADED_SHIFT)) & CCM_CIMR_ARM_PODF_LOADED_MASK)

ARM_PODF_LOADED 0b0..don't mask interrupt due to frequency change of arm_podf - interrupt will be created 0b1..mask interrupt due to frequency change of arm_podf

◆ CCM_CIMR_MASK_AHB_PODF_LOADED

#define CCM_CIMR_MASK_AHB_PODF_LOADED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_AHB_PODF_LOADED_SHIFT)) & CCM_CIMR_MASK_AHB_PODF_LOADED_MASK)

MASK_AHB_PODF_LOADED 0b0..don't mask interrupt due to frequency change of ahb_podf - interrupt will be created 0b1..mask interrupt due to frequency change of ahb_podf

◆ CCM_CIMR_MASK_COSC_READY

#define CCM_CIMR_MASK_COSC_READY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_COSC_READY_SHIFT)) & CCM_CIMR_MASK_COSC_READY_MASK)

MASK_COSC_READY 0b0..don't mask interrupt due to on board oscillator ready - interrupt will be created 0b1..mask interrupt due to on board oscillator ready

◆ CCM_CIMR_MASK_LRF_PLL

#define CCM_CIMR_MASK_LRF_PLL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_LRF_PLL_SHIFT)) & CCM_CIMR_MASK_LRF_PLL_MASK)

MASK_LRF_PLL 0b0..don't mask interrupt due to lrf of PLLs - interrupt will be created 0b1..mask interrupt due to lrf of PLLs

◆ CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED

#define CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_SHIFT)) & CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_MASK)

MASK_PERIPH2_CLK_SEL_LOADED 0b0..don't mask interrupt due to update of periph2_clk_sel - interrupt will be created 0b1..mask interrupt due to update of periph2_clk_sel

◆ CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED

#define CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_SHIFT)) & CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_MASK)

MASK_PERIPH_CLK_SEL_LOADED 0b0..don't mask interrupt due to update of periph_clk_sel - interrupt will be created 0b1..mask interrupt due to update of periph_clk_sel

◆ CCM_CIMR_MASK_SEMC_PODF_LOADED

#define CCM_CIMR_MASK_SEMC_PODF_LOADED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_SEMC_PODF_LOADED_SHIFT)) & CCM_CIMR_MASK_SEMC_PODF_LOADED_MASK)

MASK_SEMC_PODF_LOADED 0b0..don't mask interrupt due to frequency change of semc_podf - interrupt will be created 0b1..mask interrupt due to frequency change of semc_podf

◆ CCM_CISR_AHB_PODF_LOADED

#define CCM_CISR_AHB_PODF_LOADED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_AHB_PODF_LOADED_SHIFT)) & CCM_CISR_AHB_PODF_LOADED_MASK)

AHB_PODF_LOADED 0b0..interrupt is not generated due to frequency change of ahb_podf 0b1..interrupt generated due to frequency change of ahb_podf

◆ CCM_CISR_ARM_PODF_LOADED

#define CCM_CISR_ARM_PODF_LOADED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_ARM_PODF_LOADED_SHIFT)) & CCM_CISR_ARM_PODF_LOADED_MASK)

ARM_PODF_LOADED 0b0..interrupt is not generated due to frequency change of arm_podf 0b1..interrupt generated due to frequency change of arm_podf

◆ CCM_CISR_COSC_READY

#define CCM_CISR_COSC_READY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_COSC_READY_SHIFT)) & CCM_CISR_COSC_READY_MASK)

COSC_READY 0b0..interrupt is not generated due to on board oscillator ready 0b1..interrupt generated due to on board oscillator ready

◆ CCM_CISR_LRF_PLL

#define CCM_CISR_LRF_PLL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_LRF_PLL_SHIFT)) & CCM_CISR_LRF_PLL_MASK)

LRF_PLL 0b0..interrupt is not generated due to lock ready of all enabled and not bypaseed PLLs 0b1..interrupt generated due to lock ready of all enabled and not bypaseed PLLs

◆ CCM_CISR_PERIPH2_CLK_SEL_LOADED

#define CCM_CISR_PERIPH2_CLK_SEL_LOADED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_PERIPH2_CLK_SEL_LOADED_SHIFT)) & CCM_CISR_PERIPH2_CLK_SEL_LOADED_MASK)

PERIPH2_CLK_SEL_LOADED 0b0..interrupt is not generated due to frequency change of periph2_clk_sel 0b1..interrupt generated due to frequency change of periph2_clk_sel

◆ CCM_CISR_PERIPH_CLK_SEL_LOADED

#define CCM_CISR_PERIPH_CLK_SEL_LOADED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_PERIPH_CLK_SEL_LOADED_SHIFT)) & CCM_CISR_PERIPH_CLK_SEL_LOADED_MASK)

PERIPH_CLK_SEL_LOADED 0b0..interrupt is not generated due to update of periph_clk_sel. 0b1..interrupt generated due to update of periph_clk_sel.

◆ CCM_CISR_SEMC_PODF_LOADED

#define CCM_CISR_SEMC_PODF_LOADED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CISR_SEMC_PODF_LOADED_SHIFT)) & CCM_CISR_SEMC_PODF_LOADED_MASK)

SEMC_PODF_LOADED 0b0..interrupt is not generated due to frequency change of semc_podf 0b1..interrupt generated due to frequency change of semc_podf

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain 0b1..Clock works in Domain Mode. 0b0..Clock does not work in Domain Mode.

◆ CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain 0b1..Clock works in Domain Mode. 0b0..Clock does not work in Domain Mode.

◆ CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_GROUP_AUTHEN_TZ_NS [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_CLOCK_GROUP_AUTHEN_TZ_NS [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TZ_NS_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_CLOCK_GROUP_AUTHEN_TZ_USER [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_CLOCK_GROUP_AUTHEN_TZ_USER [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_TZ_USER_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST [1/2]

#define CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST [2/2]

#define CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST_SHIFT)) & CCM_CLOCK_GROUP_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0 [1/2]

#define CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0_MASK)

DIV0 - Clock divider 0b0000..Direct output. 0b0001..Divide by 2. 0b0010..Divide by 3. 0b0011..Divide by 4. 0b1111..Divide by 16.

◆ CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0 [2/2]

#define CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_DIV0_MASK)

DIV0 - Clock divider 0b0000..Direct output. 0b0001..Divide by 2. 0b0010..Divide by 3. 0b0011..Divide by 4. 0b1111..Divide by 16.

◆ CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE [1/2]

#define CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE_MASK)

GRADE - Grade

◆ CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE [2/2]

#define CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_GRADE_MASK)

GRADE - Grade

◆ CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF [1/2]

#define CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF_MASK)

OFF - OFF 0b0..Clock is running. 0b1..Turn off clock.

◆ CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF [2/2]

#define CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_OFF_MASK)

OFF - OFF 0b0..Clock is running. 0b1..Turn off clock.

◆ CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV [1/2]

#define CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV_MASK)

RSTDIV - Clock group global restart count

◆ CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV [2/2]

#define CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT_RSTDIV_MASK)

RSTDIV - Clock group global restart count

◆ CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT [1/2]

#define CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT_MASK)

SETPOINT_PRESENT - Setpoint present 0b1..Setpoint is implemented. 0b0..Setpoint is not implemented.

◆ CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT [2/2]

#define CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_CLOCK_GROUP_CONFIG_SETPOINT_PRESENT_MASK)

SETPOINT_PRESENT - Setpoint present 0b1..Setpoint is implemented. 0b0..Setpoint is not implemented.

◆ CCM_CLOCK_GROUP_CONTROL_CLR_DIV0 [1/2]

#define CCM_CLOCK_GROUP_CONTROL_CLR_DIV0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_CLR_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_CLR_DIV0_MASK)

DIV0 - Clock divider0

◆ CCM_CLOCK_GROUP_CONTROL_CLR_DIV0 [2/2]

#define CCM_CLOCK_GROUP_CONTROL_CLR_DIV0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_CLR_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_CLR_DIV0_MASK)

DIV0 - Clock divider0

◆ CCM_CLOCK_GROUP_CONTROL_CLR_OFF [1/2]

#define CCM_CLOCK_GROUP_CONTROL_CLR_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_CLR_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_CLR_OFF_MASK)

OFF - OFF

◆ CCM_CLOCK_GROUP_CONTROL_CLR_OFF [2/2]

#define CCM_CLOCK_GROUP_CONTROL_CLR_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_CLR_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_CLR_OFF_MASK)

OFF - OFF

◆ CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV [1/2]

#define CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV_MASK)

RSTDIV - Clock group global restart count

◆ CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV [2/2]

#define CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_CLR_RSTDIV_MASK)

RSTDIV - Clock group global restart count

◆ CCM_CLOCK_GROUP_CONTROL_DIV0 [1/2]

#define CCM_CLOCK_GROUP_CONTROL_DIV0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_DIV0_MASK)

DIV0 - Clock divider0

◆ CCM_CLOCK_GROUP_CONTROL_DIV0 [2/2]

#define CCM_CLOCK_GROUP_CONTROL_DIV0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_DIV0_MASK)

DIV0 - Clock divider0

◆ CCM_CLOCK_GROUP_CONTROL_OFF [1/2]

#define CCM_CLOCK_GROUP_CONTROL_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_OFF_MASK)

OFF - OFF 0b0..Clock is running 0b1..Turn off clock

◆ CCM_CLOCK_GROUP_CONTROL_OFF [2/2]

#define CCM_CLOCK_GROUP_CONTROL_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_OFF_MASK)

OFF - OFF 0b0..Clock is running 0b1..Turn off clock

◆ CCM_CLOCK_GROUP_CONTROL_RSTDIV [1/2]

#define CCM_CLOCK_GROUP_CONTROL_RSTDIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_RSTDIV_MASK)

RSTDIV - Clock group global restart count

◆ CCM_CLOCK_GROUP_CONTROL_RSTDIV [2/2]

#define CCM_CLOCK_GROUP_CONTROL_RSTDIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_RSTDIV_MASK)

RSTDIV - Clock group global restart count

◆ CCM_CLOCK_GROUP_CONTROL_SET_DIV0 [1/2]

#define CCM_CLOCK_GROUP_CONTROL_SET_DIV0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_SET_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_SET_DIV0_MASK)

DIV0 - Clock divider0

◆ CCM_CLOCK_GROUP_CONTROL_SET_DIV0 [2/2]

#define CCM_CLOCK_GROUP_CONTROL_SET_DIV0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_SET_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_SET_DIV0_MASK)

DIV0 - Clock divider0

◆ CCM_CLOCK_GROUP_CONTROL_SET_OFF [1/2]

#define CCM_CLOCK_GROUP_CONTROL_SET_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_SET_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_SET_OFF_MASK)

OFF - OFF

◆ CCM_CLOCK_GROUP_CONTROL_SET_OFF [2/2]

#define CCM_CLOCK_GROUP_CONTROL_SET_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_SET_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_SET_OFF_MASK)

OFF - OFF

◆ CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV [1/2]

#define CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV_MASK)

RSTDIV - Clock group global restart count

◆ CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV [2/2]

#define CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_SET_RSTDIV_MASK)

RSTDIV - Clock group global restart count

◆ CCM_CLOCK_GROUP_CONTROL_TOG_DIV0 [1/2]

#define CCM_CLOCK_GROUP_CONTROL_TOG_DIV0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_TOG_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_TOG_DIV0_MASK)

DIV0 - Clock divider0

◆ CCM_CLOCK_GROUP_CONTROL_TOG_DIV0 [2/2]

#define CCM_CLOCK_GROUP_CONTROL_TOG_DIV0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_TOG_DIV0_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_TOG_DIV0_MASK)

DIV0 - Clock divider0

◆ CCM_CLOCK_GROUP_CONTROL_TOG_OFF [1/2]

#define CCM_CLOCK_GROUP_CONTROL_TOG_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_TOG_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_TOG_OFF_MASK)

OFF - OFF

◆ CCM_CLOCK_GROUP_CONTROL_TOG_OFF [2/2]

#define CCM_CLOCK_GROUP_CONTROL_TOG_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_TOG_OFF_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_TOG_OFF_MASK)

OFF - OFF

◆ CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV [1/2]

#define CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV_MASK)

RSTDIV - Clock group global restart count

◆ CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV [2/2]

#define CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_CONTROL_TOG_RSTDIV_MASK)

RSTDIV - Clock group global restart count

◆ CCM_CLOCK_GROUP_STATUS0_CHANGING [1/2]

#define CCM_CLOCK_GROUP_STATUS0_CHANGING ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_CHANGING_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_CHANGING_MASK)

CHANGING - Internal updating in clock group 0b1..Clock root logic is updating currently 0b0..Clock root is not updating currently

◆ CCM_CLOCK_GROUP_STATUS0_CHANGING [2/2]

#define CCM_CLOCK_GROUP_STATUS0_CHANGING ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_CHANGING_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_CHANGING_MASK)

CHANGING - Internal updating in clock group 0b1..Clock root logic is updating currently 0b0..Clock root is not updating currently

◆ CCM_CLOCK_GROUP_STATUS0_DIV0 [1/2]

#define CCM_CLOCK_GROUP_STATUS0_DIV0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_DIV0_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_DIV0_MASK)

DIV0 - Clock divider

◆ CCM_CLOCK_GROUP_STATUS0_DIV0 [2/2]

#define CCM_CLOCK_GROUP_STATUS0_DIV0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_DIV0_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_DIV0_MASK)

DIV0 - Clock divider

◆ CCM_CLOCK_GROUP_STATUS0_OFF [1/2]

#define CCM_CLOCK_GROUP_STATUS0_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_OFF_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_OFF_MASK)

OFF - OFF 0b0..Clock is running. 0b1..Turn off clock.

◆ CCM_CLOCK_GROUP_STATUS0_OFF [2/2]

#define CCM_CLOCK_GROUP_STATUS0_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_OFF_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_OFF_MASK)

OFF - OFF 0b0..Clock is running. 0b1..Turn off clock.

◆ CCM_CLOCK_GROUP_STATUS0_POWERDOWN [1/2]

#define CCM_CLOCK_GROUP_STATUS0_POWERDOWN ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_POWERDOWN_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_POWERDOWN_MASK)

POWERDOWN - Current clock root POWERDOWN setting 0b1..Clock root is Powered Down 0b0..Clock root is running

◆ CCM_CLOCK_GROUP_STATUS0_POWERDOWN [2/2]

#define CCM_CLOCK_GROUP_STATUS0_POWERDOWN ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_POWERDOWN_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_POWERDOWN_MASK)

POWERDOWN - Current clock root POWERDOWN setting 0b1..Clock root is Powered Down 0b0..Clock root is running

◆ CCM_CLOCK_GROUP_STATUS0_RSTDIV [1/2]

#define CCM_CLOCK_GROUP_STATUS0_RSTDIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_RSTDIV_MASK)

RSTDIV - Clock divider

◆ CCM_CLOCK_GROUP_STATUS0_RSTDIV [2/2]

#define CCM_CLOCK_GROUP_STATUS0_RSTDIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_RSTDIV_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_RSTDIV_MASK)

RSTDIV - Clock divider

◆ CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY [1/2]

#define CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY_MASK)

SLICE_BUSY - Internal updating in generation logic 0b1..Clock generation logic is applying the new setting 0b0..Clock generation logic is not busy

◆ CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY [2/2]

#define CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_SLICE_BUSY_MASK)

SLICE_BUSY - Internal updating in generation logic 0b1..Clock generation logic is applying the new setting 0b0..Clock generation logic is not busy

◆ CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD [1/2]

#define CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD_MASK)

UPDATE_FORWARD - Internal status synchronization to clock generation logic 0b1..Synchronization in process 0b0..Synchronization not in process

◆ CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD [2/2]

#define CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_UPDATE_FORWARD_MASK)

UPDATE_FORWARD - Internal status synchronization to clock generation logic 0b1..Synchronization in process 0b0..Synchronization not in process

◆ CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE [1/2]

#define CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE_MASK)

UPDATE_REVERSE - Internal status synchronization from clock generation logic 0b1..Synchronization in process 0b0..Synchronization not in process

◆ CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE [2/2]

#define CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE_SHIFT)) & CCM_CLOCK_GROUP_STATUS0_UPDATE_REVERSE_MASK)

UPDATE_REVERSE - Internal status synchronization from clock generation logic 0b1..Synchronization in process 0b0..Synchronization not in process

◆ CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT [1/2]

#define CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT_MASK)

CURRENT_SETPOINT - Current Setpoint

◆ CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT [2/2]

#define CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_CURRENT_SETPOINT_MASK)

CURRENT_SETPOINT - Current Setpoint

◆ CCM_CLOCK_GROUP_STATUS1_DOWN_DONE [1/2]

#define CCM_CLOCK_GROUP_STATUS1_DOWN_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_DOWN_DONE_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_DOWN_DONE_MASK)

DOWN_DONE - Clock frequency decrease complete 0b1..Handshake signal with GPC status indicating frequency decrease is complete 0b0..Handshake signal with GPC status indicating frequency decrease is not complete

◆ CCM_CLOCK_GROUP_STATUS1_DOWN_DONE [2/2]

#define CCM_CLOCK_GROUP_STATUS1_DOWN_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_DOWN_DONE_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_DOWN_DONE_MASK)

DOWN_DONE - Clock frequency decrease complete 0b1..Handshake signal with GPC status indicating frequency decrease is complete 0b0..Handshake signal with GPC status indicating frequency decrease is not complete

◆ CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST [1/2]

#define CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST_MASK)

DOWN_REQUEST - Clock frequency decrease request 0b1..Handshake signal with GPC status indicating frequency decrease is requested 0b0..No handshake signal is not requested

◆ CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST [2/2]

#define CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_DOWN_REQUEST_MASK)

DOWN_REQUEST - Clock frequency decrease request 0b1..Handshake signal with GPC status indicating frequency decrease is requested 0b0..No handshake signal is not requested

◆ CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT [1/2]

#define CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT_MASK)

TARGET_SETPOINT - Next Setpoint to change to

◆ CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT [2/2]

#define CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_TARGET_SETPOINT_MASK)

TARGET_SETPOINT - Next Setpoint to change to

◆ CCM_CLOCK_GROUP_STATUS1_UP_DONE [1/2]

#define CCM_CLOCK_GROUP_STATUS1_UP_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_UP_DONE_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_UP_DONE_MASK)

UP_DONE - Clock frequency increase complete 0b1..Handshake signal with GPC status indicating frequency increase is complete 0b0..Handshake signal with GPC status indicating frequency increase is not complete

◆ CCM_CLOCK_GROUP_STATUS1_UP_DONE [2/2]

#define CCM_CLOCK_GROUP_STATUS1_UP_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_UP_DONE_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_UP_DONE_MASK)

UP_DONE - Clock frequency increase complete 0b1..Handshake signal with GPC status indicating frequency increase is complete 0b0..Handshake signal with GPC status indicating frequency increase is not complete

◆ CCM_CLOCK_GROUP_STATUS1_UP_REQUEST [1/2]

#define CCM_CLOCK_GROUP_STATUS1_UP_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_UP_REQUEST_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_UP_REQUEST_MASK)

UP_REQUEST - Clock frequency increase request 0b1..Handshake signal with GPC status indicating frequency increase is requested 0b0..No handshake signal is not requested

◆ CCM_CLOCK_GROUP_STATUS1_UP_REQUEST [2/2]

#define CCM_CLOCK_GROUP_STATUS1_UP_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_GROUP_STATUS1_UP_REQUEST_SHIFT)) & CCM_CLOCK_GROUP_STATUS1_UP_REQUEST_MASK)

UP_REQUEST - Clock frequency increase request 0b1..Handshake signal with GPC status indicating frequency increase is requested 0b0..No handshake signal is not requested

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain 0b1..Clock works in Domain Mode 0b0..Clock does NOT work in Domain Mode

◆ CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain 0b1..Clock works in Domain Mode 0b0..Clock does NOT work in Domain Mode

◆ CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked 0b1..Whitelist is locked

◆ CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked 0b1..Whitelist is locked

◆ CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked 0b1..MODE is locked

◆ CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked 0b1..MODE is locked

◆ CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked 0b1..Trustzone setting is locked

◆ CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked 0b1..Trustzone setting is locked

◆ CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint 0b1..Clock works in Setpoint Mode 0b0..Clock does NOT work in Setpoint Mode

◆ CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint 0b1..Clock works in Setpoint Mode 0b0..Clock does NOT work in Setpoint Mode

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_CLOCK_ROOT_AUTHEN_TZ_NS [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode 0b1..Can be changed in Non-secure mode

◆ CCM_CLOCK_ROOT_AUTHEN_TZ_NS [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TZ_NS_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode 0b1..Can be changed in Non-secure mode

◆ CCM_CLOCK_ROOT_AUTHEN_TZ_USER [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode 0b0..Clock cannot be changed in user mode

◆ CCM_CLOCK_ROOT_AUTHEN_TZ_USER [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_TZ_USER_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode 0b0..Clock cannot be changed in user mode

◆ CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST [1/2]

#define CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock 0b0001..This domain is allowed to change clock

◆ CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST [2/2]

#define CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST_SHIFT)) & CCM_CLOCK_ROOT_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock 0b0001..This domain is allowed to change clock

◆ CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV [1/2]

#define CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV_MASK)

DIV - Clock divider

◆ CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV [2/2]

#define CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_DIV_MASK)

DIV - Clock divider

◆ CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE [1/2]

#define CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE_MASK)

GRADE - Grade

◆ CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE [2/2]

#define CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_GRADE_MASK)

GRADE - Grade

◆ CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX [1/2]

#define CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX_MASK)

MUX - Clock multiplexer

◆ CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX [2/2]

#define CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_MUX_MASK)

MUX - Clock multiplexer

◆ CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF [1/2]

#define CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF_MASK)

OFF - OFF 0b1..OFF 0b0..ON

◆ CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF [2/2]

#define CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF_SHIFT)) & CCM_CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT_OFF_MASK)

OFF - OFF 0b1..OFF 0b0..ON

◆ CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT [1/2]

#define CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_MASK)

SETPOINT_PRESENT - Setpoint present 0b1..Setpoint is implemented. 0b0..Setpoint is not implemented.

◆ CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT [2/2]

#define CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_MASK)

SETPOINT_PRESENT - Setpoint present 0b1..Setpoint is implemented. 0b0..Setpoint is not implemented.

◆ CCM_CLOCK_ROOT_CONTROL_CLR_DIV [1/2]

#define CCM_CLOCK_ROOT_CONTROL_CLR_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_CLR_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_CLR_DIV_MASK)

DIV - Clock divider

◆ CCM_CLOCK_ROOT_CONTROL_CLR_DIV [2/2]

#define CCM_CLOCK_ROOT_CONTROL_CLR_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_CLR_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_CLR_DIV_MASK)

DIV - Clock divider

◆ CCM_CLOCK_ROOT_CONTROL_CLR_MUX [1/2]

#define CCM_CLOCK_ROOT_CONTROL_CLR_MUX ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_CLR_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_CLR_MUX_MASK)

MUX - Clock multiplexer

◆ CCM_CLOCK_ROOT_CONTROL_CLR_MUX [2/2]

#define CCM_CLOCK_ROOT_CONTROL_CLR_MUX ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_CLR_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_CLR_MUX_MASK)

MUX - Clock multiplexer

◆ CCM_CLOCK_ROOT_CONTROL_CLR_OFF [1/2]

#define CCM_CLOCK_ROOT_CONTROL_CLR_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_CLR_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_CLR_OFF_MASK)

OFF - OFF

◆ CCM_CLOCK_ROOT_CONTROL_CLR_OFF [2/2]

#define CCM_CLOCK_ROOT_CONTROL_CLR_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_CLR_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_CLR_OFF_MASK)

OFF - OFF

◆ CCM_CLOCK_ROOT_CONTROL_DIV [1/2]

#define CCM_CLOCK_ROOT_CONTROL_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_DIV_MASK)

DIV - Clock divider

◆ CCM_CLOCK_ROOT_CONTROL_DIV [2/2]

#define CCM_CLOCK_ROOT_CONTROL_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_DIV_MASK)

DIV - Clock divider

◆ CCM_CLOCK_ROOT_CONTROL_MUX [1/2]

#define CCM_CLOCK_ROOT_CONTROL_MUX ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_MUX_MASK)

MUX - Clock multiplexer

◆ CCM_CLOCK_ROOT_CONTROL_MUX [2/2]

#define CCM_CLOCK_ROOT_CONTROL_MUX ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_MUX_MASK)

MUX - Clock multiplexer

◆ CCM_CLOCK_ROOT_CONTROL_OFF [1/2]

#define CCM_CLOCK_ROOT_CONTROL_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_OFF_MASK)

OFF - OFF 0b0..Turn on clock 0b1..Turn off clock

◆ CCM_CLOCK_ROOT_CONTROL_OFF [2/2]

#define CCM_CLOCK_ROOT_CONTROL_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_OFF_MASK)

OFF - OFF 0b0..Turn on clock 0b1..Turn off clock

◆ CCM_CLOCK_ROOT_CONTROL_SET_DIV [1/2]

#define CCM_CLOCK_ROOT_CONTROL_SET_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_SET_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_SET_DIV_MASK)

DIV - Clock divider

◆ CCM_CLOCK_ROOT_CONTROL_SET_DIV [2/2]

#define CCM_CLOCK_ROOT_CONTROL_SET_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_SET_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_SET_DIV_MASK)

DIV - Clock divider

◆ CCM_CLOCK_ROOT_CONTROL_SET_MUX [1/2]

#define CCM_CLOCK_ROOT_CONTROL_SET_MUX ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_SET_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_SET_MUX_MASK)

MUX - Clock multiplexer

◆ CCM_CLOCK_ROOT_CONTROL_SET_MUX [2/2]

#define CCM_CLOCK_ROOT_CONTROL_SET_MUX ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_SET_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_SET_MUX_MASK)

MUX - Clock multiplexer

◆ CCM_CLOCK_ROOT_CONTROL_SET_OFF [1/2]

#define CCM_CLOCK_ROOT_CONTROL_SET_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_SET_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_SET_OFF_MASK)

OFF - OFF

◆ CCM_CLOCK_ROOT_CONTROL_SET_OFF [2/2]

#define CCM_CLOCK_ROOT_CONTROL_SET_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_SET_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_SET_OFF_MASK)

OFF - OFF

◆ CCM_CLOCK_ROOT_CONTROL_TOG_DIV [1/2]

#define CCM_CLOCK_ROOT_CONTROL_TOG_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_TOG_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_TOG_DIV_MASK)

DIV - Clock divider

◆ CCM_CLOCK_ROOT_CONTROL_TOG_DIV [2/2]

#define CCM_CLOCK_ROOT_CONTROL_TOG_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_TOG_DIV_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_TOG_DIV_MASK)

DIV - Clock divider

◆ CCM_CLOCK_ROOT_CONTROL_TOG_MUX [1/2]

#define CCM_CLOCK_ROOT_CONTROL_TOG_MUX ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_TOG_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_TOG_MUX_MASK)

MUX - Clock multiplexer

◆ CCM_CLOCK_ROOT_CONTROL_TOG_MUX [2/2]

#define CCM_CLOCK_ROOT_CONTROL_TOG_MUX ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_TOG_MUX_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_TOG_MUX_MASK)

MUX - Clock multiplexer

◆ CCM_CLOCK_ROOT_CONTROL_TOG_OFF [1/2]

#define CCM_CLOCK_ROOT_CONTROL_TOG_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_TOG_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_TOG_OFF_MASK)

OFF - OFF

◆ CCM_CLOCK_ROOT_CONTROL_TOG_OFF [2/2]

#define CCM_CLOCK_ROOT_CONTROL_TOG_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_CONTROL_TOG_OFF_SHIFT)) & CCM_CLOCK_ROOT_CONTROL_TOG_OFF_MASK)

OFF - OFF

◆ CCM_CLOCK_ROOT_STATUS0_CHANGING [1/2]

#define CCM_CLOCK_ROOT_STATUS0_CHANGING ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_CHANGING_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_CHANGING_MASK)

CHANGING - Internal updating in clock root 0b1..Clock generation logic is updating currently 0b0..Clock Status is not updating currently

◆ CCM_CLOCK_ROOT_STATUS0_CHANGING [2/2]

#define CCM_CLOCK_ROOT_STATUS0_CHANGING ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_CHANGING_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_CHANGING_MASK)

CHANGING - Internal updating in clock root 0b1..Clock generation logic is updating currently 0b0..Clock Status is not updating currently

◆ CCM_CLOCK_ROOT_STATUS0_DIV [1/2]

#define CCM_CLOCK_ROOT_STATUS0_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_DIV_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_DIV_MASK)

DIV - Current clock root DIV setting

◆ CCM_CLOCK_ROOT_STATUS0_DIV [2/2]

#define CCM_CLOCK_ROOT_STATUS0_DIV ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_DIV_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_DIV_MASK)

DIV - Current clock root DIV setting

◆ CCM_CLOCK_ROOT_STATUS0_MUX [1/2]

#define CCM_CLOCK_ROOT_STATUS0_MUX ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_MUX_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_MUX_MASK)

MUX - Current clock root MUX setting

◆ CCM_CLOCK_ROOT_STATUS0_MUX [2/2]

#define CCM_CLOCK_ROOT_STATUS0_MUX ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_MUX_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_MUX_MASK)

MUX - Current clock root MUX setting

◆ CCM_CLOCK_ROOT_STATUS0_OFF [1/2]

#define CCM_CLOCK_ROOT_STATUS0_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_OFF_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_OFF_MASK)

OFF - Current clock root OFF setting 0b0..Clock is running 0b1..Clock is disabled/off

◆ CCM_CLOCK_ROOT_STATUS0_OFF [2/2]

#define CCM_CLOCK_ROOT_STATUS0_OFF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_OFF_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_OFF_MASK)

OFF - Current clock root OFF setting 0b0..Clock is running 0b1..Clock is disabled/off

◆ CCM_CLOCK_ROOT_STATUS0_POWERDOWN [1/2]

#define CCM_CLOCK_ROOT_STATUS0_POWERDOWN ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_POWERDOWN_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_POWERDOWN_MASK)

POWERDOWN - Current clock root POWERDOWN setting 0b1..Clock root is Powered Down 0b0..Clock root is running

◆ CCM_CLOCK_ROOT_STATUS0_POWERDOWN [2/2]

#define CCM_CLOCK_ROOT_STATUS0_POWERDOWN ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_POWERDOWN_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_POWERDOWN_MASK)

POWERDOWN - Current clock root POWERDOWN setting 0b1..Clock root is Powered Down 0b0..Clock root is running

◆ CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY [1/2]

#define CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY_MASK)

SLICE_BUSY - Internal updating in generation logic 0b1..Clock generation logic is applying the new setting 0b0..Clock generation logic is not busy

◆ CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY [2/2]

#define CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_SLICE_BUSY_MASK)

SLICE_BUSY - Internal updating in generation logic 0b1..Clock generation logic is applying the new setting 0b0..Clock generation logic is not busy

◆ CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD [1/2]

#define CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD_MASK)

UPDATE_FORWARD - Internal status synchronization to clock generation logic 0b1..Synchronization in process 0b0..Synchronization not in process

◆ CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD [2/2]

#define CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_UPDATE_FORWARD_MASK)

UPDATE_FORWARD - Internal status synchronization to clock generation logic 0b1..Synchronization in process 0b0..Synchronization not in process

◆ CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE [1/2]

#define CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE_MASK)

UPDATE_REVERSE - Internal status synchronization from clock generation logic 0b1..Synchronization in process 0b0..Synchronization not in process

◆ CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE [2/2]

#define CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE_SHIFT)) & CCM_CLOCK_ROOT_STATUS0_UPDATE_REVERSE_MASK)

UPDATE_REVERSE - Internal status synchronization from clock generation logic 0b1..Synchronization in process 0b0..Synchronization not in process

◆ CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT [1/2]

#define CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT_MASK)

CURRENT_SETPOINT - Current Setpoint

◆ CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT [2/2]

#define CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_CURRENT_SETPOINT_MASK)

CURRENT_SETPOINT - Current Setpoint

◆ CCM_CLOCK_ROOT_STATUS1_DOWN_DONE [1/2]

#define CCM_CLOCK_ROOT_STATUS1_DOWN_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_DOWN_DONE_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_DOWN_DONE_MASK)

DOWN_DONE - Clock frequency decrease finish 0b1..Frequency decrease completed 0b0..Frequency decrease not completed

◆ CCM_CLOCK_ROOT_STATUS1_DOWN_DONE [2/2]

#define CCM_CLOCK_ROOT_STATUS1_DOWN_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_DOWN_DONE_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_DOWN_DONE_MASK)

DOWN_DONE - Clock frequency decrease finish 0b1..Frequency decrease completed 0b0..Frequency decrease not completed

◆ CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST [1/2]

#define CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST_MASK)

DOWN_REQUEST - Clock frequency decrease request 0b1..Frequency decrease requested 0b0..Frequency decrease not requested

◆ CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST [2/2]

#define CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_DOWN_REQUEST_MASK)

DOWN_REQUEST - Clock frequency decrease request 0b1..Frequency decrease requested 0b0..Frequency decrease not requested

◆ CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT [1/2]

#define CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT_MASK)

TARGET_SETPOINT - Target Setpoint

◆ CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT [2/2]

#define CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_TARGET_SETPOINT_MASK)

TARGET_SETPOINT - Target Setpoint

◆ CCM_CLOCK_ROOT_STATUS1_UP_DONE [1/2]

#define CCM_CLOCK_ROOT_STATUS1_UP_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_UP_DONE_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_UP_DONE_MASK)

UP_DONE - Clock frequency increase finish 0b1..Frequency increase completed 0b0..Frequency increase not completed

◆ CCM_CLOCK_ROOT_STATUS1_UP_DONE [2/2]

#define CCM_CLOCK_ROOT_STATUS1_UP_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_UP_DONE_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_UP_DONE_MASK)

UP_DONE - Clock frequency increase finish 0b1..Frequency increase completed 0b0..Frequency increase not completed

◆ CCM_CLOCK_ROOT_STATUS1_UP_REQUEST [1/2]

#define CCM_CLOCK_ROOT_STATUS1_UP_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_UP_REQUEST_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_UP_REQUEST_MASK)

UP_REQUEST - Clock frequency increase request 0b1..Frequency increase requested 0b0..Frequency increase not requested

◆ CCM_CLOCK_ROOT_STATUS1_UP_REQUEST [2/2]

#define CCM_CLOCK_ROOT_STATUS1_UP_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLOCK_ROOT_STATUS1_UP_REQUEST_SHIFT)) & CCM_CLOCK_ROOT_STATUS1_UP_REQUEST_MASK)

UP_REQUEST - Clock frequency increase request 0b1..Frequency increase requested 0b0..Frequency increase not requested

◆ CCM_CLPCR_ARM_CLK_DIS_ON_LPM

#define CCM_CLPCR_ARM_CLK_DIS_ON_LPM ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_ARM_CLK_DIS_ON_LPM_SHIFT)) & CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK)

ARM_CLK_DIS_ON_LPM 0b0..Arm clock enabled on wait mode. 0b1..Arm clock disabled on wait mode. .

◆ CCM_CLPCR_COSC_PWRDOWN

#define CCM_CLPCR_COSC_PWRDOWN ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_COSC_PWRDOWN_SHIFT)) & CCM_CLPCR_COSC_PWRDOWN_MASK)

COSC_PWRDOWN 0b0..On chip oscillator will not be powered down, i.e. cosc_pwrdown = '0'. 0b1..On chip oscillator will be powered down, i.e. cosc_pwrdown = '1'.

◆ CCM_CLPCR_DIS_REF_OSC

#define CCM_CLPCR_DIS_REF_OSC ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_DIS_REF_OSC_SHIFT)) & CCM_CLPCR_DIS_REF_OSC_MASK)

DIS_REF_OSC 0b0..external high frequency oscillator will be enabled, i.e. CCM_REF_EN_B = '0'. 0b1..external high frequency oscillator will be disabled, i.e. CCM_REF_EN_B = '1'

◆ CCM_CLPCR_LPM

#define CCM_CLPCR_LPM ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_LPM_SHIFT)) & CCM_CLPCR_LPM_MASK)

LPM 0b00..Remain in run mode 0b01..Transfer to wait mode 0b10..Transfer to stop mode 0b11..Reserved

◆ CCM_CLPCR_MASK_CORE0_WFI

#define CCM_CLPCR_MASK_CORE0_WFI ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_CORE0_WFI_SHIFT)) & CCM_CLPCR_MASK_CORE0_WFI_MASK)

MASK_CORE0_WFI 0b0..WFI of core0 is not masked 0b1..WFI of core0 is masked

◆ CCM_CLPCR_MASK_L2CC_IDLE

#define CCM_CLPCR_MASK_L2CC_IDLE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_L2CC_IDLE_SHIFT)) & CCM_CLPCR_MASK_L2CC_IDLE_MASK)

MASK_L2CC_IDLE 0b1..L2CC IDLE is masked 0b0..L2CC IDLE is not masked

◆ CCM_CLPCR_MASK_SCU_IDLE

#define CCM_CLPCR_MASK_SCU_IDLE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_SCU_IDLE_SHIFT)) & CCM_CLPCR_MASK_SCU_IDLE_MASK)

MASK_SCU_IDLE 0b1..SCU IDLE is masked 0b0..SCU IDLE is not masked

◆ CCM_CLPCR_SBYOS

#define CCM_CLPCR_SBYOS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_SBYOS_SHIFT)) & CCM_CLPCR_SBYOS_MASK)

SBYOS 0b0..On-chip oscillator will not be powered down, after next entrance to STOP mode. (CCM_REF_EN_B will remain asserted - '0' and cosc_pwrdown will remain de asserted - '0') 0b1..On-chip oscillator will be powered down, after next entrance to STOP mode. (CCM_REF_EN_B will be deasserted - '1' and cosc_pwrdown will be asserted - '1'). When returning from STOP mode, external oscillator will be enabled again, on-chip oscillator will return to oscillator mode, and after oscnt count, CCM will continue with the exit from the STOP mode process.

◆ CCM_CLPCR_STBY_COUNT

#define CCM_CLPCR_STBY_COUNT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_STBY_COUNT_SHIFT)) & CCM_CLPCR_STBY_COUNT_MASK)

STBY_COUNT 0b00..CCM will wait (1*pmic_delay_scaler)+1 ckil clock cycles 0b01..CCM will wait (3*pmic_delay_scaler)+1 ckil clock cycles 0b10..CCM will wait (7*pmic_delay_scaler)+1 ckil clock cycles 0b11..CCM will wait (15*pmic_delay_scaler)+1 ckil clock cycles

◆ CCM_CLPCR_VSTBY

#define CCM_CLPCR_VSTBY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_VSTBY_SHIFT)) & CCM_CLPCR_VSTBY_MASK)

VSTBY 0b0..Voltage will not be changed to standby voltage after next entrance to STOP mode. ( PMIC_STBY_REQ will remain negated - '0') 0b1..Voltage will be requested to change to standby voltage after next entrance to stop mode. ( PMIC_STBY_REQ will be asserted - '1').

◆ CCM_CMEOR_MOD_EN_OV_CAN1_CPI

#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_CAN1_CPI_SHIFT)) & CCM_CMEOR_MOD_EN_OV_CAN1_CPI_MASK)

MOD_EN_OV_CAN1_CPI 0b0..don't overide module enable signal 0b1..overide module enable signal

◆ CCM_CMEOR_MOD_EN_OV_CAN2_CPI

#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_CAN2_CPI_SHIFT)) & CCM_CMEOR_MOD_EN_OV_CAN2_CPI_MASK)

MOD_EN_OV_CAN2_CPI 0b0..don't override module enable signal 0b1..override module enable signal

◆ CCM_CMEOR_MOD_EN_OV_GPT

#define CCM_CMEOR_MOD_EN_OV_GPT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_GPT_SHIFT)) & CCM_CMEOR_MOD_EN_OV_GPT_MASK)

MOD_EN_OV_GPT 0b0..don't override module enable signal 0b1..override module enable signal

◆ CCM_CMEOR_MOD_EN_OV_PIT

#define CCM_CMEOR_MOD_EN_OV_PIT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_PIT_SHIFT)) & CCM_CMEOR_MOD_EN_OV_PIT_MASK)

MOD_EN_OV_PIT 0b0..don't override module enable signal 0b1..override module enable signal

◆ CCM_CMEOR_MOD_EN_OV_TRNG

#define CCM_CMEOR_MOD_EN_OV_TRNG ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_TRNG_SHIFT)) & CCM_CMEOR_MOD_EN_OV_TRNG_MASK)

MOD_EN_OV_TRNG 0b0..don't override module enable signal 0b1..override module enable signal

◆ CCM_CMEOR_MOD_EN_USDHC

#define CCM_CMEOR_MOD_EN_USDHC ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_USDHC_SHIFT)) & CCM_CMEOR_MOD_EN_USDHC_MASK)

MOD_EN_USDHC 0b0..don't override module enable signal 0b1..override module enable signal

◆ CCM_CS1CDR_FLEXIO2_CLK_PODF

#define CCM_CS1CDR_FLEXIO2_CLK_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT)) & CCM_CS1CDR_FLEXIO2_CLK_PODF_MASK)

FLEXIO2_CLK_PODF - Divider for flexio2 clock. Divider should be updated when output clock is gated. 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 3 0b011..Divide by 4 0b100..Divide by 5 0b101..Divide by 6 0b110..Divide by 7 0b111..Divide by 8

◆ CCM_CS1CDR_FLEXIO2_CLK_PRED

#define CCM_CS1CDR_FLEXIO2_CLK_PRED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_FLEXIO2_CLK_PRED_SHIFT)) & CCM_CS1CDR_FLEXIO2_CLK_PRED_MASK)

FLEXIO2_CLK_PRED 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CS1CDR_SAI1_CLK_PODF

#define CCM_CS1CDR_SAI1_CLK_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI1_CLK_PODF_SHIFT)) & CCM_CS1CDR_SAI1_CLK_PODF_MASK)

SAI1_CLK_PODF - Divider for sai1 clock podf. The input clock to this divider should be lower than 300Mhz, the predivider can be used to achieve this. 0b000000..Divide by 1 0b000001..Divide by 2 0b000010..Divide by 3 0b000011..Divide by 4 0b000100..Divide by 5 0b000101..Divide by 6 0b000110..Divide by 7 0b000111..Divide by 8 0b001000..Divide by 9 0b001001..Divide by 10 0b001010..Divide by 11 0b001011..Divide by 12 0b001100..Divide by 13 0b001101..Divide by 14 0b001110..Divide by 15 0b001111..Divide by 16 0b010000..Divide by 17 0b010001..Divide by 18 0b010010..Divide by 19 0b010011..Divide by 20 0b010100..Divide by 21 0b010101..Divide by 22 0b010110..Divide by 23 0b010111..Divide by 24 0b011000..Divide by 25 0b011001..Divide by 26 0b011010..Divide by 27 0b011011..Divide by 28 0b011100..Divide by 29 0b011101..Divide by 30 0b011110..Divide by 31 0b011111..Divide by 32 0b100000..Divide by 33 0b100001..Divide by 34 0b100010..Divide by 35 0b100011..Divide by 36 0b100100..Divide by 37 0b100101..Divide by 38 0b100110..Divide by 39 0b100111..Divide by 40 0b101000..Divide by 41 0b101001..Divide by 42 0b101010..Divide by 43 0b101011..Divide by 44 0b101100..Divide by 45 0b101101..Divide by 46 0b101110..Divide by 47 0b101111..Divide by 48 0b110000..Divide by 49 0b110001..Divide by 50 0b110010..Divide by 51 0b110011..Divide by 52 0b110100..Divide by 53 0b110101..Divide by 54 0b110110..Divide by 55 0b110111..Divide by 56 0b111000..Divide by 57 0b111001..Divide by 58 0b111010..Divide by 59 0b111011..Divide by 60 0b111100..Divide by 61 0b111101..Divide by 62 0b111110..Divide by 63 0b111111..Divide by 64

◆ CCM_CS1CDR_SAI1_CLK_PRED

#define CCM_CS1CDR_SAI1_CLK_PRED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI1_CLK_PRED_SHIFT)) & CCM_CS1CDR_SAI1_CLK_PRED_MASK)

SAI1_CLK_PRED 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CS1CDR_SAI3_CLK_PODF

#define CCM_CS1CDR_SAI3_CLK_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI3_CLK_PODF_SHIFT)) & CCM_CS1CDR_SAI3_CLK_PODF_MASK)

SAI3_CLK_PODF - Divider for sai3 clock podf. The input clock to this divider should be lower than 300Mhz, the predivider can be used to achieve this. 0b000000..Divide by 1 0b000001..Divide by 2 0b000010..Divide by 3 0b000011..Divide by 4 0b000100..Divide by 5 0b000101..Divide by 6 0b000110..Divide by 7 0b000111..Divide by 8 0b001000..Divide by 9 0b001001..Divide by 10 0b001010..Divide by 11 0b001011..Divide by 12 0b001100..Divide by 13 0b001101..Divide by 14 0b001110..Divide by 15 0b001111..Divide by 16 0b010000..Divide by 17 0b010001..Divide by 18 0b010010..Divide by 19 0b010011..Divide by 20 0b010100..Divide by 21 0b010101..Divide by 22 0b010110..Divide by 23 0b010111..Divide by 24 0b011000..Divide by 25 0b011001..Divide by 26 0b011010..Divide by 27 0b011011..Divide by 28 0b011100..Divide by 29 0b011101..Divide by 30 0b011110..Divide by 31 0b011111..Divide by 32 0b100000..Divide by 33 0b100001..Divide by 34 0b100010..Divide by 35 0b100011..Divide by 36 0b100100..Divide by 37 0b100101..Divide by 38 0b100110..Divide by 39 0b100111..Divide by 40 0b101000..Divide by 41 0b101001..Divide by 42 0b101010..Divide by 43 0b101011..Divide by 44 0b101100..Divide by 45 0b101101..Divide by 46 0b101110..Divide by 47 0b101111..Divide by 48 0b110000..Divide by 49 0b110001..Divide by 50 0b110010..Divide by 51 0b110011..Divide by 52 0b110100..Divide by 53 0b110101..Divide by 54 0b110110..Divide by 55 0b110111..Divide by 56 0b111000..Divide by 57 0b111001..Divide by 58 0b111010..Divide by 59 0b111011..Divide by 60 0b111100..Divide by 61 0b111101..Divide by 62 0b111110..Divide by 63 0b111111..Divide by 64

◆ CCM_CS1CDR_SAI3_CLK_PRED

#define CCM_CS1CDR_SAI3_CLK_PRED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI3_CLK_PRED_SHIFT)) & CCM_CS1CDR_SAI3_CLK_PRED_MASK)

SAI3_CLK_PRED 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CS2CDR_SAI2_CLK_PODF

#define CCM_CS2CDR_SAI2_CLK_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CS2CDR_SAI2_CLK_PODF_SHIFT)) & CCM_CS2CDR_SAI2_CLK_PODF_MASK)

SAI2_CLK_PODF - Divider for sai2 clock podf. The input clock to this divider should be lower than 300Mhz, the predivider can be used to achieve this. 0b000000..Divide by 1 0b000001..Divide by 2 0b000010..Divide by 3 0b000011..Divide by 4 0b000100..Divide by 5 0b000101..Divide by 6 0b000110..Divide by 7 0b000111..Divide by 8 0b001000..Divide by 9 0b001001..Divide by 10 0b001010..Divide by 11 0b001011..Divide by 12 0b001100..Divide by 13 0b001101..Divide by 14 0b001110..Divide by 15 0b001111..Divide by 16 0b010000..Divide by 17 0b010001..Divide by 18 0b010010..Divide by 19 0b010011..Divide by 20 0b010100..Divide by 21 0b010101..Divide by 22 0b010110..Divide by 23 0b010111..Divide by 24 0b011000..Divide by 25 0b011001..Divide by 26 0b011010..Divide by 27 0b011011..Divide by 28 0b011100..Divide by 29 0b011101..Divide by 30 0b011110..Divide by 31 0b011111..Divide by 32 0b100000..Divide by 33 0b100001..Divide by 34 0b100010..Divide by 35 0b100011..Divide by 36 0b100100..Divide by 37 0b100101..Divide by 38 0b100110..Divide by 39 0b100111..Divide by 40 0b101000..Divide by 41 0b101001..Divide by 42 0b101010..Divide by 43 0b101011..Divide by 44 0b101100..Divide by 45 0b101101..Divide by 46 0b101110..Divide by 47 0b101111..Divide by 48 0b110000..Divide by 49 0b110001..Divide by 50 0b110010..Divide by 51 0b110011..Divide by 52 0b110100..Divide by 53 0b110101..Divide by 54 0b110110..Divide by 55 0b110111..Divide by 56 0b111000..Divide by 57 0b111001..Divide by 58 0b111010..Divide by 59 0b111011..Divide by 60 0b111100..Divide by 61 0b111101..Divide by 62 0b111110..Divide by 63 0b111111..Divide by 64

◆ CCM_CS2CDR_SAI2_CLK_PRED

#define CCM_CS2CDR_SAI2_CLK_PRED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CS2CDR_SAI2_CLK_PRED_SHIFT)) & CCM_CS2CDR_SAI2_CLK_PRED_MASK)

SAI2_CLK_PRED 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CSCDR1_TRACE_PODF

#define CCM_CSCDR1_TRACE_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_TRACE_PODF_SHIFT)) & CCM_CSCDR1_TRACE_PODF_MASK)

TRACE_PODF 0b00..divide by 1 0b01..divide by 2 0b10..divide by 3 0b11..divide by 4

◆ CCM_CSCDR1_UART_CLK_PODF

#define CCM_CSCDR1_UART_CLK_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_UART_CLK_PODF_SHIFT)) & CCM_CSCDR1_UART_CLK_PODF_MASK)

UART_CLK_PODF - Divider for uart clock podf. 0b000000..Divide by 1 0b000001..Divide by 2 0b000010..Divide by 3 0b000011..Divide by 4 0b000100..Divide by 5 0b000101..Divide by 6 0b000110..Divide by 7 0b000111..Divide by 8 0b001000..Divide by 9 0b001001..Divide by 10 0b001010..Divide by 11 0b001011..Divide by 12 0b001100..Divide by 13 0b001101..Divide by 14 0b001110..Divide by 15 0b001111..Divide by 16 0b010000..Divide by 17 0b010001..Divide by 18 0b010010..Divide by 19 0b010011..Divide by 20 0b010100..Divide by 21 0b010101..Divide by 22 0b010110..Divide by 23 0b010111..Divide by 24 0b011000..Divide by 25 0b011001..Divide by 26 0b011010..Divide by 27 0b011011..Divide by 28 0b011100..Divide by 29 0b011101..Divide by 30 0b011110..Divide by 31 0b011111..Divide by 32 0b100000..Divide by 33 0b100001..Divide by 34 0b100010..Divide by 35 0b100011..Divide by 36 0b100100..Divide by 37 0b100101..Divide by 38 0b100110..Divide by 39 0b100111..Divide by 40 0b101000..Divide by 41 0b101001..Divide by 42 0b101010..Divide by 43 0b101011..Divide by 44 0b101100..Divide by 45 0b101101..Divide by 46 0b101110..Divide by 47 0b101111..Divide by 48 0b110000..Divide by 49 0b110001..Divide by 50 0b110010..Divide by 51 0b110011..Divide by 52 0b110100..Divide by 53 0b110101..Divide by 54 0b110110..Divide by 55 0b110111..Divide by 56 0b111000..Divide by 57 0b111001..Divide by 58 0b111010..Divide by 59 0b111011..Divide by 60 0b111100..Divide by 61 0b111101..Divide by 62 0b111110..Divide by 63 0b111111..Divide by 64

◆ CCM_CSCDR1_UART_CLK_SEL

#define CCM_CSCDR1_UART_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_UART_CLK_SEL_SHIFT)) & CCM_CSCDR1_UART_CLK_SEL_MASK)

UART_CLK_SEL 0b0..derive clock from pll3_80m 0b1..derive clock from osc_clk

◆ CCM_CSCDR1_USDHC1_PODF

#define CCM_CSCDR1_USDHC1_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_USDHC1_PODF_SHIFT)) & CCM_CSCDR1_USDHC1_PODF_MASK)

USDHC1_PODF 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CSCDR1_USDHC2_PODF

#define CCM_CSCDR1_USDHC2_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_USDHC2_PODF_SHIFT)) & CCM_CSCDR1_USDHC2_PODF_MASK)

USDHC2_PODF 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CSCDR2_LCDIF_PRE_CLK_SEL

#define CCM_CSCDR2_LCDIF_PRE_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LCDIF_PRE_CLK_SEL_SHIFT)) & CCM_CSCDR2_LCDIF_PRE_CLK_SEL_MASK)

LCDIF_PRE_CLK_SEL 0b000..derive clock from PLL2 0b001..derive clock from PLL3 PFD3 0b010..derive clock from PLL5 0b011..derive clock from PLL2 PFD0 0b100..derive clock from PLL2 PFD1 0b101..derive clock from PLL3 PFD1 0b110-0b111..Reserved

◆ CCM_CSCDR2_LCDIF_PRED

#define CCM_CSCDR2_LCDIF_PRED ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LCDIF_PRED_SHIFT)) & CCM_CSCDR2_LCDIF_PRED_MASK)

LCDIF_PRED 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CSCDR2_LPI2C_CLK_PODF

#define CCM_CSCDR2_LPI2C_CLK_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LPI2C_CLK_PODF_SHIFT)) & CCM_CSCDR2_LPI2C_CLK_PODF_MASK)

LPI2C_CLK_PODF - Divider for lpi2c clock podf. Divider should be updated when output clock is gated. The input clock to this divider should be lower than 300Mhz, the predivider can be used to achieve this. 0b000000..Divide by 1 0b000001..Divide by 2 0b000010..Divide by 3 0b000011..Divide by 4 0b000100..Divide by 5 0b000101..Divide by 6 0b000110..Divide by 7 0b000111..Divide by 8 0b001000..Divide by 9 0b001001..Divide by 10 0b001010..Divide by 11 0b001011..Divide by 12 0b001100..Divide by 13 0b001101..Divide by 14 0b001110..Divide by 15 0b001111..Divide by 16 0b010000..Divide by 17 0b010001..Divide by 18 0b010010..Divide by 19 0b010011..Divide by 20 0b010100..Divide by 21 0b010101..Divide by 22 0b010110..Divide by 23 0b010111..Divide by 24 0b011000..Divide by 25 0b011001..Divide by 26 0b011010..Divide by 27 0b011011..Divide by 28 0b011100..Divide by 29 0b011101..Divide by 30 0b011110..Divide by 31 0b011111..Divide by 32 0b100000..Divide by 33 0b100001..Divide by 34 0b100010..Divide by 35 0b100011..Divide by 36 0b100100..Divide by 37 0b100101..Divide by 38 0b100110..Divide by 39 0b100111..Divide by 40 0b101000..Divide by 41 0b101001..Divide by 42 0b101010..Divide by 43 0b101011..Divide by 44 0b101100..Divide by 45 0b101101..Divide by 46 0b101110..Divide by 47 0b101111..Divide by 48 0b110000..Divide by 49 0b110001..Divide by 50 0b110010..Divide by 51 0b110011..Divide by 52 0b110100..Divide by 53 0b110101..Divide by 54 0b110110..Divide by 55 0b110111..Divide by 56 0b111000..Divide by 57 0b111001..Divide by 58 0b111010..Divide by 59 0b111011..Divide by 60 0b111100..Divide by 61 0b111101..Divide by 62 0b111110..Divide by 63 0b111111..Divide by 64

◆ CCM_CSCDR2_LPI2C_CLK_SEL

#define CCM_CSCDR2_LPI2C_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LPI2C_CLK_SEL_SHIFT)) & CCM_CSCDR2_LPI2C_CLK_SEL_MASK)

LPI2C_CLK_SEL 0b0..derive clock from pll3_60m 0b1..derive clock from osc_clk

◆ CCM_CSCDR3_CSI_CLK_SEL

#define CCM_CSCDR3_CSI_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR3_CSI_CLK_SEL_SHIFT)) & CCM_CSCDR3_CSI_CLK_SEL_MASK)

CSI_CLK_SEL 0b00..derive clock from osc_clk (24M) 0b01..derive clock from PLL2 PFD2 0b10..derive clock from pll3_120M 0b11..derive clock from PLL3 PFD1

◆ CCM_CSCDR3_CSI_PODF

#define CCM_CSCDR3_CSI_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR3_CSI_PODF_SHIFT)) & CCM_CSCDR3_CSI_PODF_MASK)

CSI_PODF 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CSCMR1_FLEXSPI_CLK_SEL

#define CCM_CSCMR1_FLEXSPI_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_FLEXSPI_CLK_SEL_SHIFT)) & CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK)

FLEXSPI_CLK_SEL 0b00..derive clock from semc_clk_root_pre 0b01..derive clock from pll3_sw_clk 0b10..derive clock from PLL2 PFD2 0b11..derive clock from PLL3 PFD0

◆ CCM_CSCMR1_FLEXSPI_PODF

#define CCM_CSCMR1_FLEXSPI_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_FLEXSPI_PODF_SHIFT)) & CCM_CSCMR1_FLEXSPI_PODF_MASK)

FLEXSPI_PODF 0b000..divide by 1 0b001..divide by 2 0b010..divide by 3 0b011..divide by 4 0b100..divide by 5 0b101..divide by 6 0b110..divide by 7 0b111..divide by 8

◆ CCM_CSCMR1_PERCLK_CLK_SEL

#define CCM_CSCMR1_PERCLK_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_PERCLK_CLK_SEL_SHIFT)) & CCM_CSCMR1_PERCLK_CLK_SEL_MASK)

PERCLK_CLK_SEL 0b0..derive clock from ipg clk root 0b1..derive clock from osc_clk

◆ CCM_CSCMR1_PERCLK_PODF

#define CCM_CSCMR1_PERCLK_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_PERCLK_PODF_SHIFT)) & CCM_CSCMR1_PERCLK_PODF_MASK)

PERCLK_PODF - Divider for perclk podf. 0b000000..Divide by 1 0b000001..Divide by 2 0b000010..Divide by 3 0b000011..Divide by 4 0b000100..Divide by 5 0b000101..Divide by 6 0b000110..Divide by 7 0b000111..Divide by 8 0b001000..Divide by 9 0b001001..Divide by 10 0b001010..Divide by 11 0b001011..Divide by 12 0b001100..Divide by 13 0b001101..Divide by 14 0b001110..Divide by 15 0b001111..Divide by 16 0b010000..Divide by 17 0b010001..Divide by 18 0b010010..Divide by 19 0b010011..Divide by 20 0b010100..Divide by 21 0b010101..Divide by 22 0b010110..Divide by 23 0b010111..Divide by 24 0b011000..Divide by 25 0b011001..Divide by 26 0b011010..Divide by 27 0b011011..Divide by 28 0b011100..Divide by 29 0b011101..Divide by 30 0b011110..Divide by 31 0b011111..Divide by 32 0b100000..Divide by 33 0b100001..Divide by 34 0b100010..Divide by 35 0b100011..Divide by 36 0b100100..Divide by 37 0b100101..Divide by 38 0b100110..Divide by 39 0b100111..Divide by 40 0b101000..Divide by 41 0b101001..Divide by 42 0b101010..Divide by 43 0b101011..Divide by 44 0b101100..Divide by 45 0b101101..Divide by 46 0b101110..Divide by 47 0b101111..Divide by 48 0b110000..Divide by 49 0b110001..Divide by 50 0b110010..Divide by 51 0b110011..Divide by 52 0b110100..Divide by 53 0b110101..Divide by 54 0b110110..Divide by 55 0b110111..Divide by 56 0b111000..Divide by 57 0b111001..Divide by 58 0b111010..Divide by 59 0b111011..Divide by 60 0b111100..Divide by 61 0b111101..Divide by 62 0b111110..Divide by 63 0b111111..Divide by 64

◆ CCM_CSCMR1_SAI1_CLK_SEL

#define CCM_CSCMR1_SAI1_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI1_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI1_CLK_SEL_MASK)

SAI1_CLK_SEL 0b00..derive clock from PLL3 PFD2 0b01..derive clock from PLL5 0b10..derive clock from PLL4 0b11..Reserved

◆ CCM_CSCMR1_SAI2_CLK_SEL

#define CCM_CSCMR1_SAI2_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI2_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI2_CLK_SEL_MASK)

SAI2_CLK_SEL 0b00..derive clock from PLL3 PFD2 0b01..derive clock from PLL5 0b10..derive clock from PLL4 0b11..Reserved

◆ CCM_CSCMR1_SAI3_CLK_SEL

#define CCM_CSCMR1_SAI3_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI3_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI3_CLK_SEL_MASK)

SAI3_CLK_SEL 0b00..derive clock from PLL3 PFD2 0b01..derive clock from PLL5 0b10..derive clock from PLL4 0b11..Reserved

◆ CCM_CSCMR1_USDHC1_CLK_SEL

#define CCM_CSCMR1_USDHC1_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_USDHC1_CLK_SEL_SHIFT)) & CCM_CSCMR1_USDHC1_CLK_SEL_MASK)

USDHC1_CLK_SEL 0b0..derive clock from PLL2 PFD2 0b1..derive clock from PLL2 PFD0

◆ CCM_CSCMR1_USDHC2_CLK_SEL

#define CCM_CSCMR1_USDHC2_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_USDHC2_CLK_SEL_SHIFT)) & CCM_CSCMR1_USDHC2_CLK_SEL_MASK)

USDHC2_CLK_SEL 0b0..derive clock from PLL2 PFD2 0b1..derive clock from PLL2 PFD0

◆ CCM_CSCMR2_CAN_CLK_PODF

#define CCM_CSCMR2_CAN_CLK_PODF ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_CAN_CLK_PODF_SHIFT)) & CCM_CSCMR2_CAN_CLK_PODF_MASK)

CAN_CLK_PODF - Divider for CAN clock podf. 0b000000..Divide by 1 0b000001..Divide by 2 0b000010..Divide by 3 0b000011..Divide by 4 0b000100..Divide by 5 0b000101..Divide by 6 0b000110..Divide by 7 0b000111..Divide by 8 0b001000..Divide by 9 0b001001..Divide by 10 0b001010..Divide by 11 0b001011..Divide by 12 0b001100..Divide by 13 0b001101..Divide by 14 0b001110..Divide by 15 0b001111..Divide by 16 0b010000..Divide by 17 0b010001..Divide by 18 0b010010..Divide by 19 0b010011..Divide by 20 0b010100..Divide by 21 0b010101..Divide by 22 0b010110..Divide by 23 0b010111..Divide by 24 0b011000..Divide by 25 0b011001..Divide by 26 0b011010..Divide by 27 0b011011..Divide by 28 0b011100..Divide by 29 0b011101..Divide by 30 0b011110..Divide by 31 0b011111..Divide by 32 0b100000..Divide by 33 0b100001..Divide by 34 0b100010..Divide by 35 0b100011..Divide by 36 0b100100..Divide by 37 0b100101..Divide by 38 0b100110..Divide by 39 0b100111..Divide by 40 0b101000..Divide by 41 0b101001..Divide by 42 0b101010..Divide by 43 0b101011..Divide by 44 0b101100..Divide by 45 0b101101..Divide by 46 0b101110..Divide by 47 0b101111..Divide by 48 0b110000..Divide by 49 0b110001..Divide by 50 0b110010..Divide by 51 0b110011..Divide by 52 0b110100..Divide by 53 0b110101..Divide by 54 0b110110..Divide by 55 0b110111..Divide by 56 0b111000..Divide by 57 0b111001..Divide by 58 0b111010..Divide by 59 0b111011..Divide by 60 0b111100..Divide by 61 0b111101..Divide by 62 0b111110..Divide by 63 0b111111..Divide by 64

◆ CCM_CSCMR2_CAN_CLK_SEL

#define CCM_CSCMR2_CAN_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_CAN_CLK_SEL_SHIFT)) & CCM_CSCMR2_CAN_CLK_SEL_MASK)

CAN_CLK_SEL 0b00..derive clock from pll3_sw_clk divided clock (60M) 0b01..derive clock from osc_clk (24M) 0b10..derive clock from pll3_sw_clk divided clock (80M) 0b11..Disable FlexCAN clock

◆ CCM_CSCMR2_FLEXIO2_CLK_SEL

#define CCM_CSCMR2_FLEXIO2_CLK_SEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_FLEXIO2_CLK_SEL_SHIFT)) & CCM_CSCMR2_FLEXIO2_CLK_SEL_MASK)

FLEXIO2_CLK_SEL 0b00..derive clock from PLL4 divided clock 0b01..derive clock from PLL3 PFD2 clock 0b10..derive clock from PLL5 clock 0b11..derive clock from pll3_sw_clk

◆ CCM_CSR_CAMP2_READY

#define CCM_CSR_CAMP2_READY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSR_CAMP2_READY_SHIFT)) & CCM_CSR_CAMP2_READY_MASK)

CAMP2_READY 0b0..CAMP2 is not ready. 0b1..CAMP2 is ready.

◆ CCM_CSR_COSC_READY

#define CCM_CSR_COSC_READY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSR_COSC_READY_SHIFT)) & CCM_CSR_COSC_READY_MASK)

COSC_READY 0b0..on board oscillator is not ready. 0b1..on board oscillator is ready.

◆ CCM_CSR_REF_EN_B

#define CCM_CSR_REF_EN_B ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_CSR_REF_EN_B_SHIFT)) & CCM_CSR_REF_EN_B_MASK)

REF_EN_B 0b0..value of CCM_REF_EN_B is '0' 0b1..value of CCM_REF_EN_B is '1'

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE1_AUTHEN_TZ_NS [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE1_AUTHEN_TZ_NS [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE1_AUTHEN_TZ_USER [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE1_AUTHEN_TZ_USER [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE1_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE1_CLR_GPR [1/2]

#define CCM_GPR_PRIVATE1_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE1_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE1_CLR_GPR [2/2]

#define CCM_GPR_PRIVATE1_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE1_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE1_GPR [1/2]

#define CCM_GPR_PRIVATE1_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_GPR_SHIFT)) & CCM_GPR_PRIVATE1_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE1_GPR [2/2]

#define CCM_GPR_PRIVATE1_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_GPR_SHIFT)) & CCM_GPR_PRIVATE1_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE1_SET_GPR [1/2]

#define CCM_GPR_PRIVATE1_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE1_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE1_SET_GPR [2/2]

#define CCM_GPR_PRIVATE1_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE1_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE1_TOG_GPR [1/2]

#define CCM_GPR_PRIVATE1_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE1_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE1_TOG_GPR [2/2]

#define CCM_GPR_PRIVATE1_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE1_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE1_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE2_AUTHEN_TZ_NS [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE2_AUTHEN_TZ_NS [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE2_AUTHEN_TZ_USER [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE2_AUTHEN_TZ_USER [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE2_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE2_CLR_GPR [1/2]

#define CCM_GPR_PRIVATE2_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE2_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE2_CLR_GPR [2/2]

#define CCM_GPR_PRIVATE2_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE2_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE2_GPR [1/2]

#define CCM_GPR_PRIVATE2_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_GPR_SHIFT)) & CCM_GPR_PRIVATE2_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE2_GPR [2/2]

#define CCM_GPR_PRIVATE2_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_GPR_SHIFT)) & CCM_GPR_PRIVATE2_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE2_SET_GPR [1/2]

#define CCM_GPR_PRIVATE2_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE2_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE2_SET_GPR [2/2]

#define CCM_GPR_PRIVATE2_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE2_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE2_TOG_GPR [1/2]

#define CCM_GPR_PRIVATE2_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE2_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE2_TOG_GPR [2/2]

#define CCM_GPR_PRIVATE2_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE2_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE2_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE3_AUTHEN_TZ_NS [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE3_AUTHEN_TZ_NS [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE3_AUTHEN_TZ_USER [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE3_AUTHEN_TZ_USER [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE3_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE3_CLR_GPR [1/2]

#define CCM_GPR_PRIVATE3_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE3_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE3_CLR_GPR [2/2]

#define CCM_GPR_PRIVATE3_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE3_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE3_GPR [1/2]

#define CCM_GPR_PRIVATE3_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_GPR_SHIFT)) & CCM_GPR_PRIVATE3_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE3_GPR [2/2]

#define CCM_GPR_PRIVATE3_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_GPR_SHIFT)) & CCM_GPR_PRIVATE3_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE3_SET_GPR [1/2]

#define CCM_GPR_PRIVATE3_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE3_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE3_SET_GPR [2/2]

#define CCM_GPR_PRIVATE3_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE3_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE3_TOG_GPR [1/2]

#define CCM_GPR_PRIVATE3_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE3_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE3_TOG_GPR [2/2]

#define CCM_GPR_PRIVATE3_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE3_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE3_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE4_AUTHEN_TZ_NS [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE4_AUTHEN_TZ_NS [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE4_AUTHEN_TZ_USER [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE4_AUTHEN_TZ_USER [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE4_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE4_CLR_GPR [1/2]

#define CCM_GPR_PRIVATE4_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE4_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE4_CLR_GPR [2/2]

#define CCM_GPR_PRIVATE4_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE4_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE4_GPR [1/2]

#define CCM_GPR_PRIVATE4_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_GPR_SHIFT)) & CCM_GPR_PRIVATE4_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE4_GPR [2/2]

#define CCM_GPR_PRIVATE4_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_GPR_SHIFT)) & CCM_GPR_PRIVATE4_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE4_SET_GPR [1/2]

#define CCM_GPR_PRIVATE4_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE4_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE4_SET_GPR [2/2]

#define CCM_GPR_PRIVATE4_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE4_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE4_TOG_GPR [1/2]

#define CCM_GPR_PRIVATE4_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE4_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE4_TOG_GPR [2/2]

#define CCM_GPR_PRIVATE4_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE4_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE4_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE5_AUTHEN_TZ_NS [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE5_AUTHEN_TZ_NS [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE5_AUTHEN_TZ_USER [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE5_AUTHEN_TZ_USER [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE5_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE5_CLR_GPR [1/2]

#define CCM_GPR_PRIVATE5_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE5_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE5_CLR_GPR [2/2]

#define CCM_GPR_PRIVATE5_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE5_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE5_GPR [1/2]

#define CCM_GPR_PRIVATE5_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_GPR_SHIFT)) & CCM_GPR_PRIVATE5_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE5_GPR [2/2]

#define CCM_GPR_PRIVATE5_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_GPR_SHIFT)) & CCM_GPR_PRIVATE5_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE5_SET_GPR [1/2]

#define CCM_GPR_PRIVATE5_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE5_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE5_SET_GPR [2/2]

#define CCM_GPR_PRIVATE5_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE5_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE5_TOG_GPR [1/2]

#define CCM_GPR_PRIVATE5_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE5_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE5_TOG_GPR [2/2]

#define CCM_GPR_PRIVATE5_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE5_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE5_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE6_AUTHEN_TZ_NS [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE6_AUTHEN_TZ_NS [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE6_AUTHEN_TZ_USER [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE6_AUTHEN_TZ_USER [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE6_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE6_CLR_GPR [1/2]

#define CCM_GPR_PRIVATE6_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE6_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE6_CLR_GPR [2/2]

#define CCM_GPR_PRIVATE6_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE6_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE6_GPR [1/2]

#define CCM_GPR_PRIVATE6_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_GPR_SHIFT)) & CCM_GPR_PRIVATE6_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE6_GPR [2/2]

#define CCM_GPR_PRIVATE6_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_GPR_SHIFT)) & CCM_GPR_PRIVATE6_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE6_SET_GPR [1/2]

#define CCM_GPR_PRIVATE6_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE6_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE6_SET_GPR [2/2]

#define CCM_GPR_PRIVATE6_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE6_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE6_TOG_GPR [1/2]

#define CCM_GPR_PRIVATE6_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE6_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE6_TOG_GPR [2/2]

#define CCM_GPR_PRIVATE6_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE6_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE6_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by Domain

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_PRIVATE7_AUTHEN_TZ_NS [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE7_AUTHEN_TZ_NS [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_PRIVATE7_AUTHEN_TZ_USER [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE7_AUTHEN_TZ_USER [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST [1/2]

#define CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST [2/2]

#define CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_PRIVATE7_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_PRIVATE7_CLR_GPR [1/2]

#define CCM_GPR_PRIVATE7_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE7_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE7_CLR_GPR [2/2]

#define CCM_GPR_PRIVATE7_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_CLR_GPR_SHIFT)) & CCM_GPR_PRIVATE7_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE7_GPR [1/2]

#define CCM_GPR_PRIVATE7_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_GPR_SHIFT)) & CCM_GPR_PRIVATE7_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE7_GPR [2/2]

#define CCM_GPR_PRIVATE7_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_GPR_SHIFT)) & CCM_GPR_PRIVATE7_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE7_SET_GPR [1/2]

#define CCM_GPR_PRIVATE7_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE7_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE7_SET_GPR [2/2]

#define CCM_GPR_PRIVATE7_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_SET_GPR_SHIFT)) & CCM_GPR_PRIVATE7_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE7_TOG_GPR [1/2]

#define CCM_GPR_PRIVATE7_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE7_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_PRIVATE7_TOG_GPR [2/2]

#define CCM_GPR_PRIVATE7_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_PRIVATE7_TOG_GPR_SHIFT)) & CCM_GPR_PRIVATE7_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE [1/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE [2/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST [1/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST [2/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE [1/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE [2/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ [1/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ [2/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS [1/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS [2/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER [1/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER [2/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST [1/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST [2/2]

#define CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_CLR_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE [1/2]

#define CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE [2/2]

#define CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain 0b1..Clock works in Domain Mode. 0b0..Clock does NOT work in Domain Mode.

◆ CCM_GPR_SHARED_AUTHEN_LOCK_LIST [1/2]

#define CCM_GPR_SHARED_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_SHARED_AUTHEN_LOCK_LIST [2/2]

#define CCM_GPR_SHARED_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_GPR_SHARED_AUTHEN_LOCK_MODE [1/2]

#define CCM_GPR_SHARED_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_SHARED_AUTHEN_LOCK_MODE [2/2]

#define CCM_GPR_SHARED_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_GPR_SHARED_AUTHEN_LOCK_TZ [1/2]

#define CCM_GPR_SHARED_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_SHARED_AUTHEN_LOCK_TZ [2/2]

#define CCM_GPR_SHARED_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE [1/2]

#define CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE [2/2]

#define CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST [1/2]

#define CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST [2/2]

#define CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE [1/2]

#define CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE [2/2]

#define CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ [1/2]

#define CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ [2/2]

#define CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_SHARED_AUTHEN_SET_TZ_NS [1/2]

#define CCM_GPR_SHARED_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_SHARED_AUTHEN_SET_TZ_NS [2/2]

#define CCM_GPR_SHARED_AUTHEN_SET_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_SHARED_AUTHEN_SET_TZ_USER [1/2]

#define CCM_GPR_SHARED_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_SHARED_AUTHEN_SET_TZ_USER [2/2]

#define CCM_GPR_SHARED_AUTHEN_SET_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST [1/2]

#define CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST [2/2]

#define CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_SET_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE [1/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE [2/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain

◆ CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST [1/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST [2/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist

◆ CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE [1/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE [2/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode

◆ CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ [1/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ [2/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_LOCK_TZ_MASK)

LOCK_TZ - Lock truszone setting

◆ CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS [1/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS [2/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_TZ_NS_MASK)

TZ_NS - Non-secure access

◆ CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER [1/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER [2/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_TZ_USER_MASK)

TZ_USER - User access

◆ CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST [1/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST [2/2]

#define CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TOG_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_GPR_SHARED_AUTHEN_TZ_NS [1/2]

#define CCM_GPR_SHARED_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_SHARED_AUTHEN_TZ_NS [2/2]

#define CCM_GPR_SHARED_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TZ_NS_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_GPR_SHARED_AUTHEN_TZ_USER [1/2]

#define CCM_GPR_SHARED_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_SHARED_AUTHEN_TZ_USER [2/2]

#define CCM_GPR_SHARED_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_TZ_USER_SHIFT)) & CCM_GPR_SHARED_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_GPR_SHARED_AUTHEN_WHITE_LIST [1/2]

#define CCM_GPR_SHARED_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_SHARED_AUTHEN_WHITE_LIST [2/2]

#define CCM_GPR_SHARED_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_AUTHEN_WHITE_LIST_SHIFT)) & CCM_GPR_SHARED_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist 0b0000..This domain is NOT allowed to change clock. 0b0001..This domain is allowed to change clock.

◆ CCM_GPR_SHARED_CLR_GPR [1/2]

#define CCM_GPR_SHARED_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_CLR_GPR_SHIFT)) & CCM_GPR_SHARED_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_SHARED_CLR_GPR [2/2]

#define CCM_GPR_SHARED_CLR_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_CLR_GPR_SHIFT)) & CCM_GPR_SHARED_CLR_GPR_MASK)

GPR - GP register

◆ CCM_GPR_SHARED_GPR [1/2]

#define CCM_GPR_SHARED_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_GPR_SHIFT)) & CCM_GPR_SHARED_GPR_MASK)

GPR - GP register

◆ CCM_GPR_SHARED_GPR [2/2]

#define CCM_GPR_SHARED_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_GPR_SHIFT)) & CCM_GPR_SHARED_GPR_MASK)

GPR - GP register

◆ CCM_GPR_SHARED_SET_GPR [1/2]

#define CCM_GPR_SHARED_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_SET_GPR_SHIFT)) & CCM_GPR_SHARED_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_SHARED_SET_GPR [2/2]

#define CCM_GPR_SHARED_SET_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_SET_GPR_SHIFT)) & CCM_GPR_SHARED_SET_GPR_MASK)

GPR - GP register

◆ CCM_GPR_SHARED_TOG_GPR [1/2]

#define CCM_GPR_SHARED_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_TOG_GPR_SHIFT)) & CCM_GPR_SHARED_TOG_GPR_MASK)

GPR - GP register

◆ CCM_GPR_SHARED_TOG_GPR [2/2]

#define CCM_GPR_SHARED_TOG_GPR ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_GPR_SHARED_TOG_GPR_SHIFT)) & CCM_GPR_SHARED_TOG_GPR_MASK)

GPR - GP register

◆ CCM_LPCG_AUTHEN_CPULPM [1/2]

#define CCM_LPCG_AUTHEN_CPULPM ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_CPULPM_SHIFT)) & CCM_LPCG_AUTHEN_CPULPM_MASK)

CPULPM - CPU Low Power Mode 0b1..LPCG is functioning in Low Power Mode 0b0..LPCG is not functioning in Low power Mode

◆ CCM_LPCG_AUTHEN_CPULPM [2/2]

#define CCM_LPCG_AUTHEN_CPULPM ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_CPULPM_SHIFT)) & CCM_LPCG_AUTHEN_CPULPM_MASK)

CPULPM - CPU Low Power Mode 0b1..LPCG is functioning in Low Power Mode 0b0..LPCG is not functioning in Low power Mode

◆ CCM_LPCG_AUTHEN_DOMAIN_MODE [1/2]

#define CCM_LPCG_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_LPCG_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain 0b1..Clock works in Domain Mode 0b0..Clock does not work in Domain Mode

◆ CCM_LPCG_AUTHEN_DOMAIN_MODE [2/2]

#define CCM_LPCG_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_LPCG_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain 0b1..Clock works in Domain Mode 0b0..Clock does not work in Domain Mode

◆ CCM_LPCG_AUTHEN_LOCK_LIST [1/2]

#define CCM_LPCG_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_LOCK_LIST_SHIFT)) & CCM_LPCG_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_LPCG_AUTHEN_LOCK_LIST [2/2]

#define CCM_LPCG_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_LOCK_LIST_SHIFT)) & CCM_LPCG_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_LPCG_AUTHEN_LOCK_MODE [1/2]

#define CCM_LPCG_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_LOCK_MODE_SHIFT)) & CCM_LPCG_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_LPCG_AUTHEN_LOCK_MODE [2/2]

#define CCM_LPCG_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_LOCK_MODE_SHIFT)) & CCM_LPCG_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_LPCG_AUTHEN_LOCK_TZ [1/2]

#define CCM_LPCG_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_LOCK_TZ_SHIFT)) & CCM_LPCG_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_LPCG_AUTHEN_LOCK_TZ [2/2]

#define CCM_LPCG_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_LOCK_TZ_SHIFT)) & CCM_LPCG_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_LPCG_AUTHEN_SETPOINT_MODE [1/2]

#define CCM_LPCG_AUTHEN_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_LPCG_AUTHEN_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint 0b1..LPCG is functioning in Setpoint controlled Mode 0b0..LPCG is not functioning in Setpoint controlled Mode

◆ CCM_LPCG_AUTHEN_SETPOINT_MODE [2/2]

#define CCM_LPCG_AUTHEN_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_LPCG_AUTHEN_SETPOINT_MODE_MASK)

SETPOINT_MODE - Low power and access control by Setpoint 0b1..LPCG is functioning in Setpoint controlled Mode 0b0..LPCG is not functioning in Setpoint controlled Mode

◆ CCM_LPCG_AUTHEN_TZ_NS [1/2]

#define CCM_LPCG_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_TZ_NS_SHIFT)) & CCM_LPCG_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_LPCG_AUTHEN_TZ_NS [2/2]

#define CCM_LPCG_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_TZ_NS_SHIFT)) & CCM_LPCG_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_LPCG_AUTHEN_TZ_USER [1/2]

#define CCM_LPCG_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_TZ_USER_SHIFT)) & CCM_LPCG_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..LPCG can be changed in user mode. 0b0..LPCG cannot be changed in user mode.

◆ CCM_LPCG_AUTHEN_TZ_USER [2/2]

#define CCM_LPCG_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_TZ_USER_SHIFT)) & CCM_LPCG_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..LPCG can be changed in user mode. 0b0..LPCG cannot be changed in user mode.

◆ CCM_LPCG_AUTHEN_WHITE_LIST [1/2]

#define CCM_LPCG_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_WHITE_LIST_SHIFT)) & CCM_LPCG_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_LPCG_AUTHEN_WHITE_LIST [2/2]

#define CCM_LPCG_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_AUTHEN_WHITE_LIST_SHIFT)) & CCM_LPCG_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_LPCG_CONFIG_SETPOINT_PRESENT [1/2]

#define CCM_LPCG_CONFIG_SETPOINT_PRESENT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_LPCG_CONFIG_SETPOINT_PRESENT_MASK)

SETPOINT_PRESENT - Setpoint present 0b1..Setpoint is implemented. 0b0..Setpoint is not implemented.

◆ CCM_LPCG_CONFIG_SETPOINT_PRESENT [2/2]

#define CCM_LPCG_CONFIG_SETPOINT_PRESENT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_LPCG_CONFIG_SETPOINT_PRESENT_MASK)

SETPOINT_PRESENT - Setpoint present 0b1..Setpoint is implemented. 0b0..Setpoint is not implemented.

◆ CCM_LPCG_DIRECT_ON [1/2]

#define CCM_LPCG_DIRECT_ON ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DIRECT_ON_SHIFT)) & CCM_LPCG_DIRECT_ON_MASK)

ON - LPCG on 0b0..LPCG is OFF. 0b1..LPCG is ON.

◆ CCM_LPCG_DIRECT_ON [2/2]

#define CCM_LPCG_DIRECT_ON ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DIRECT_ON_SHIFT)) & CCM_LPCG_DIRECT_ON_MASK)

ON - LPCG on 0b0..LPCG is OFF. 0b1..LPCG is ON.

◆ CCM_LPCG_DOMAIN_LEVEL [1/2]

#define CCM_LPCG_DOMAIN_LEVEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL_MASK)

LEVEL - Current dependence level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_LPCG_DOMAIN_LEVEL [2/2]

#define CCM_LPCG_DOMAIN_LEVEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL_MASK)

LEVEL - Current dependence level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_LPCG_DOMAIN_LEVEL0 [1/2]

#define CCM_LPCG_DOMAIN_LEVEL0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL0_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL0_MASK)

LEVEL0 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_LPCG_DOMAIN_LEVEL0 [2/2]

#define CCM_LPCG_DOMAIN_LEVEL0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL0_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL0_MASK)

LEVEL0 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_LPCG_DOMAIN_LEVEL1 [1/2]

#define CCM_LPCG_DOMAIN_LEVEL1 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL1_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL1_MASK)

LEVEL1 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_LPCG_DOMAIN_LEVEL1 [2/2]

#define CCM_LPCG_DOMAIN_LEVEL1 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL1_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL1_MASK)

LEVEL1 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_LPCG_DOMAIN_LEVEL2 [1/2]

#define CCM_LPCG_DOMAIN_LEVEL2 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL2_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL2_MASK)

LEVEL2 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_LPCG_DOMAIN_LEVEL2 [2/2]

#define CCM_LPCG_DOMAIN_LEVEL2 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL2_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL2_MASK)

LEVEL2 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_LPCG_DOMAIN_LEVEL3 [1/2]

#define CCM_LPCG_DOMAIN_LEVEL3 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL3_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL3_MASK)

LEVEL3 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_LPCG_DOMAIN_LEVEL3 [2/2]

#define CCM_LPCG_DOMAIN_LEVEL3 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_DOMAIN_LEVEL3_SHIFT)) & CCM_LPCG_DOMAIN_LEVEL3_MASK)

LEVEL3 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_LPCG_SETPOINT_SETPOINT [1/2]

#define CCM_LPCG_SETPOINT_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_SETPOINT_SETPOINT_SHIFT)) & CCM_LPCG_SETPOINT_SETPOINT_MASK)

SETPOINT - Setpoints

◆ CCM_LPCG_SETPOINT_SETPOINT [2/2]

#define CCM_LPCG_SETPOINT_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_SETPOINT_SETPOINT_SHIFT)) & CCM_LPCG_SETPOINT_SETPOINT_MASK)

SETPOINT - Setpoints

◆ CCM_LPCG_SETPOINT_STANDBY [1/2]

#define CCM_LPCG_SETPOINT_STANDBY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_SETPOINT_STANDBY_SHIFT)) & CCM_LPCG_SETPOINT_STANDBY_MASK)

STANDBY - Standby

◆ CCM_LPCG_SETPOINT_STANDBY [2/2]

#define CCM_LPCG_SETPOINT_STANDBY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_SETPOINT_STANDBY_SHIFT)) & CCM_LPCG_SETPOINT_STANDBY_MASK)

STANDBY - Standby

◆ CCM_LPCG_STATUS0_ACTIVE_DOMAIN [1/2]

#define CCM_LPCG_STATUS0_ACTIVE_DOMAIN ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS0_ACTIVE_DOMAIN_SHIFT)) & CCM_LPCG_STATUS0_ACTIVE_DOMAIN_MASK)

ACTIVE_DOMAIN - Domains that own this clock gate 0b0000..Clock not owned by any domain 0b0001..Clock owned by Domain0 0b0010..Clock owned by Domain1 0b0011..Clock owned by Domain0 and Domain1 0b0100..Clock owned by Domain2 0b0101..Clock owned by Domain0 and Domain2 0b0110..Clock owned by Domain1 and Domain2 0b0111..Clock owned by Domain0, Domain1 and Domain 2 0b1000..Clock owned by Domain3 0b1001..Clock owned by Domain0 and Domain3 0b1010..Clock owned by Domain1 and Domain3 0b1011..Clock owned by Domain2 and Domain3 0b1100..Clock owned by Domain0, Domain 1, and Domain3 0b1101..Clock owned by Domain0, Domain 2, and Domain3 0b1110..Clock owned by Domain1, Domain 2, and Domain3 0b1111..Clock owned by all domains

◆ CCM_LPCG_STATUS0_ACTIVE_DOMAIN [2/2]

#define CCM_LPCG_STATUS0_ACTIVE_DOMAIN ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS0_ACTIVE_DOMAIN_SHIFT)) & CCM_LPCG_STATUS0_ACTIVE_DOMAIN_MASK)

ACTIVE_DOMAIN - Domains that own this clock gate 0b0000..Clock not owned by any domain 0b0001..Clock owned by Domain0 0b0010..Clock owned by Domain1 0b0011..Clock owned by Domain0 and Domain1 0b0100..Clock owned by Domain2 0b0101..Clock owned by Domain0 and Domain2 0b0110..Clock owned by Domain1 and Domain2 0b0111..Clock owned by Domain0, Domain1 and Domain 2 0b1000..Clock owned by Domain3 0b1001..Clock owned by Domain0 and Domain3 0b1010..Clock owned by Domain1 and Domain3 0b1011..Clock owned by Domain2 and Domain3 0b1100..Clock owned by Domain0, Domain 1, and Domain3 0b1101..Clock owned by Domain0, Domain 2, and Domain3 0b1110..Clock owned by Domain1, Domain 2, and Domain3 0b1111..Clock owned by all domains

◆ CCM_LPCG_STATUS0_DOMAIN_ENABLE [1/2]

#define CCM_LPCG_STATUS0_DOMAIN_ENABLE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS0_DOMAIN_ENABLE_SHIFT)) & CCM_LPCG_STATUS0_DOMAIN_ENABLE_MASK)

DOMAIN_ENABLE - Enable status from each domain 0b0000..No domain request 0b0001..Request from Domain0 0b0010..Request from Domain1 0b0011..Request from Domain0 and Domain1 0b0100..Request from Domain2 0b0101..Request from Domain0 and Domain2 0b0110..Request from Domain1 and Domain2 0b0111..Request from Domain0, Domain1 and Domain 2 0b1000..Request from Domain3 0b1001..Request from Domain0 and Domain3 0b1010..Request from Domain1 and Domain3 0b1011..Request from Domain2 and Domain3 0b1100..Request from Domain0, Domain 1, and Domain3 0b1101..Request from Domain0, Domain 2, and Domain3 0b1110..Request from Domain1, Domain 2, and Domain3 0b1111..Request from all domains

◆ CCM_LPCG_STATUS0_DOMAIN_ENABLE [2/2]

#define CCM_LPCG_STATUS0_DOMAIN_ENABLE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS0_DOMAIN_ENABLE_SHIFT)) & CCM_LPCG_STATUS0_DOMAIN_ENABLE_MASK)

DOMAIN_ENABLE - Enable status from each domain 0b0000..No domain request 0b0001..Request from Domain0 0b0010..Request from Domain1 0b0011..Request from Domain0 and Domain1 0b0100..Request from Domain2 0b0101..Request from Domain0 and Domain2 0b0110..Request from Domain1 and Domain2 0b0111..Request from Domain0, Domain1 and Domain 2 0b1000..Request from Domain3 0b1001..Request from Domain0 and Domain3 0b1010..Request from Domain1 and Domain3 0b1011..Request from Domain2 and Domain3 0b1100..Request from Domain0, Domain 1, and Domain3 0b1101..Request from Domain0, Domain 2, and Domain3 0b1110..Request from Domain1, Domain 2, and Domain3 0b1111..Request from all domains

◆ CCM_LPCG_STATUS0_ON [1/2]

#define CCM_LPCG_STATUS0_ON ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS0_ON_SHIFT)) & CCM_LPCG_STATUS0_ON_MASK)

ON - LPCG current state 0b0..LPCG is OFF. 0b1..LPCG is ON.

◆ CCM_LPCG_STATUS0_ON [2/2]

#define CCM_LPCG_STATUS0_ON ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS0_ON_SHIFT)) & CCM_LPCG_STATUS0_ON_MASK)

ON - LPCG current state 0b0..LPCG is OFF. 0b1..LPCG is ON.

◆ CCM_LPCG_STATUS1_CPU0_MODE [1/2]

#define CCM_LPCG_STATUS1_CPU0_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU0_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU0_MODE_MASK)

CPU0_MODE - Domain0 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_LPCG_STATUS1_CPU0_MODE [2/2]

#define CCM_LPCG_STATUS1_CPU0_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU0_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU0_MODE_MASK)

CPU0_MODE - Domain0 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_LPCG_STATUS1_CPU0_MODE_DONE [1/2]

#define CCM_LPCG_STATUS1_CPU0_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU0_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU0_MODE_DONE_MASK)

CPU0_MODE_DONE - Domain0 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_LPCG_STATUS1_CPU0_MODE_DONE [2/2]

#define CCM_LPCG_STATUS1_CPU0_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU0_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU0_MODE_DONE_MASK)

CPU0_MODE_DONE - Domain0 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_LPCG_STATUS1_CPU0_MODE_REQUEST [1/2]

#define CCM_LPCG_STATUS1_CPU0_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU0_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU0_MODE_REQUEST_MASK)

CPU0_MODE_REQUEST - Domain0 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_LPCG_STATUS1_CPU0_MODE_REQUEST [2/2]

#define CCM_LPCG_STATUS1_CPU0_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU0_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU0_MODE_REQUEST_MASK)

CPU0_MODE_REQUEST - Domain0 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_LPCG_STATUS1_CPU1_MODE [1/2]

#define CCM_LPCG_STATUS1_CPU1_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU1_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU1_MODE_MASK)

CPU1_MODE - Domain1 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_LPCG_STATUS1_CPU1_MODE [2/2]

#define CCM_LPCG_STATUS1_CPU1_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU1_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU1_MODE_MASK)

CPU1_MODE - Domain1 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_LPCG_STATUS1_CPU1_MODE_DONE [1/2]

#define CCM_LPCG_STATUS1_CPU1_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU1_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU1_MODE_DONE_MASK)

CPU1_MODE_DONE - Domain1 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_LPCG_STATUS1_CPU1_MODE_DONE [2/2]

#define CCM_LPCG_STATUS1_CPU1_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU1_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU1_MODE_DONE_MASK)

CPU1_MODE_DONE - Domain1 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_LPCG_STATUS1_CPU1_MODE_REQUEST [1/2]

#define CCM_LPCG_STATUS1_CPU1_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU1_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU1_MODE_REQUEST_MASK)

CPU1_MODE_REQUEST - Domain1 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_LPCG_STATUS1_CPU1_MODE_REQUEST [2/2]

#define CCM_LPCG_STATUS1_CPU1_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU1_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU1_MODE_REQUEST_MASK)

CPU1_MODE_REQUEST - Domain1 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_LPCG_STATUS1_CPU2_MODE [1/2]

#define CCM_LPCG_STATUS1_CPU2_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU2_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU2_MODE_MASK)

CPU2_MODE - Domain2 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_LPCG_STATUS1_CPU2_MODE [2/2]

#define CCM_LPCG_STATUS1_CPU2_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU2_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU2_MODE_MASK)

CPU2_MODE - Domain2 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_LPCG_STATUS1_CPU2_MODE_DONE [1/2]

#define CCM_LPCG_STATUS1_CPU2_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU2_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU2_MODE_DONE_MASK)

CPU2_MODE_DONE - Domain2 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_LPCG_STATUS1_CPU2_MODE_DONE [2/2]

#define CCM_LPCG_STATUS1_CPU2_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU2_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU2_MODE_DONE_MASK)

CPU2_MODE_DONE - Domain2 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_LPCG_STATUS1_CPU2_MODE_REQUEST [1/2]

#define CCM_LPCG_STATUS1_CPU2_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU2_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU2_MODE_REQUEST_MASK)

CPU2_MODE_REQUEST - Domain2 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_LPCG_STATUS1_CPU2_MODE_REQUEST [2/2]

#define CCM_LPCG_STATUS1_CPU2_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU2_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU2_MODE_REQUEST_MASK)

CPU2_MODE_REQUEST - Domain2 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_LPCG_STATUS1_CPU3_MODE [1/2]

#define CCM_LPCG_STATUS1_CPU3_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU3_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU3_MODE_MASK)

CPU3_MODE - Domain3 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_LPCG_STATUS1_CPU3_MODE [2/2]

#define CCM_LPCG_STATUS1_CPU3_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU3_MODE_SHIFT)) & CCM_LPCG_STATUS1_CPU3_MODE_MASK)

CPU3_MODE - Domain3 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_LPCG_STATUS1_CPU3_MODE_DONE [1/2]

#define CCM_LPCG_STATUS1_CPU3_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU3_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU3_MODE_DONE_MASK)

CPU3_MODE_DONE - Domain3 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_LPCG_STATUS1_CPU3_MODE_DONE [2/2]

#define CCM_LPCG_STATUS1_CPU3_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU3_MODE_DONE_SHIFT)) & CCM_LPCG_STATUS1_CPU3_MODE_DONE_MASK)

CPU3_MODE_DONE - Domain3 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_LPCG_STATUS1_CPU3_MODE_REQUEST [1/2]

#define CCM_LPCG_STATUS1_CPU3_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU3_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU3_MODE_REQUEST_MASK)

CPU3_MODE_REQUEST - Domain3 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_LPCG_STATUS1_CPU3_MODE_REQUEST [2/2]

#define CCM_LPCG_STATUS1_CPU3_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CPU3_MODE_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_CPU3_MODE_REQUEST_MASK)

CPU3_MODE_REQUEST - Domain3 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_LPCG_STATUS1_CURRENT_SETPOINT [1/2]

#define CCM_LPCG_STATUS1_CURRENT_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_LPCG_STATUS1_CURRENT_SETPOINT_MASK)

CURRENT_SETPOINT - Current Setpoint

◆ CCM_LPCG_STATUS1_CURRENT_SETPOINT [2/2]

#define CCM_LPCG_STATUS1_CURRENT_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_LPCG_STATUS1_CURRENT_SETPOINT_MASK)

CURRENT_SETPOINT - Current Setpoint

◆ CCM_LPCG_STATUS1_SETPOINT_OFF_DONE [1/2]

#define CCM_LPCG_STATUS1_SETPOINT_OFF_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_OFF_DONE_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_OFF_DONE_MASK)

SETPOINT_OFF_DONE - Clock gate turn off finish from GPC Setpoint 0b1..Clock gate is turned off 0b0..Clock gate is not turned off

◆ CCM_LPCG_STATUS1_SETPOINT_OFF_DONE [2/2]

#define CCM_LPCG_STATUS1_SETPOINT_OFF_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_OFF_DONE_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_OFF_DONE_MASK)

SETPOINT_OFF_DONE - Clock gate turn off finish from GPC Setpoint 0b1..Clock gate is turned off 0b0..Clock gate is not turned off

◆ CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST [1/2]

#define CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST_MASK)

SETPOINT_OFF_REQUEST - Clock gate turn off request from GPC Setpoint 0b1..Clock gate requested to be turned off 0b0..No request

◆ CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST [2/2]

#define CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_OFF_REQUEST_MASK)

SETPOINT_OFF_REQUEST - Clock gate turn off request from GPC Setpoint 0b1..Clock gate requested to be turned off 0b0..No request

◆ CCM_LPCG_STATUS1_SETPOINT_ON_DONE [1/2]

#define CCM_LPCG_STATUS1_SETPOINT_ON_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_ON_DONE_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_ON_DONE_MASK)

SETPOINT_ON_DONE - Clock gate turn on finish from GPC Setpoint 0b1..Clock gate is turned on 0b0..Clock gate is not turned on

◆ CCM_LPCG_STATUS1_SETPOINT_ON_DONE [2/2]

#define CCM_LPCG_STATUS1_SETPOINT_ON_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_ON_DONE_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_ON_DONE_MASK)

SETPOINT_ON_DONE - Clock gate turn on finish from GPC Setpoint 0b1..Clock gate is turned on 0b0..Clock gate is not turned on

◆ CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST [1/2]

#define CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST_MASK)

SETPOINT_ON_REQUEST - Clock gate turn on request from GPC Setpoint 0b1..Clock gate requested to be turned on 0b0..No request

◆ CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST [2/2]

#define CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST_SHIFT)) & CCM_LPCG_STATUS1_SETPOINT_ON_REQUEST_MASK)

SETPOINT_ON_REQUEST - Clock gate turn on request from GPC Setpoint 0b1..Clock gate requested to be turned on 0b0..No request

◆ CCM_LPCG_STATUS1_TARGET_SETPOINT [1/2]

#define CCM_LPCG_STATUS1_TARGET_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_LPCG_STATUS1_TARGET_SETPOINT_MASK)

TARGET_SETPOINT - Next Setpoint to change to

◆ CCM_LPCG_STATUS1_TARGET_SETPOINT [2/2]

#define CCM_LPCG_STATUS1_TARGET_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_LPCG_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_LPCG_STATUS1_TARGET_SETPOINT_MASK)

TARGET_SETPOINT - Next Setpoint to change to

◆ CCM_OSCPLL_AUTHEN_CPULPM [1/2]

#define CCM_OSCPLL_AUTHEN_CPULPM ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_CPULPM_SHIFT)) & CCM_OSCPLL_AUTHEN_CPULPM_MASK)

CPULPM - CPU Low Power Mode 0b1..PLL functions in Low Power Mode 0b0..PLL does not function in Low power Mode

◆ CCM_OSCPLL_AUTHEN_CPULPM [2/2]

#define CCM_OSCPLL_AUTHEN_CPULPM ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_CPULPM_SHIFT)) & CCM_OSCPLL_AUTHEN_CPULPM_MASK)

CPULPM - CPU Low Power Mode 0b1..PLL functions in Low Power Mode 0b0..PLL does not function in Low power Mode

◆ CCM_OSCPLL_AUTHEN_DOMAIN_MODE [1/2]

#define CCM_OSCPLL_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_OSCPLL_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain 0b1..Clock works in Domain Mode. 0b0..Clock does not work in Domain Mode.

◆ CCM_OSCPLL_AUTHEN_DOMAIN_MODE [2/2]

#define CCM_OSCPLL_AUTHEN_DOMAIN_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_DOMAIN_MODE_SHIFT)) & CCM_OSCPLL_AUTHEN_DOMAIN_MODE_MASK)

DOMAIN_MODE - Low power and access control by domain 0b1..Clock works in Domain Mode. 0b0..Clock does not work in Domain Mode.

◆ CCM_OSCPLL_AUTHEN_LOCK_LIST [1/2]

#define CCM_OSCPLL_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_LOCK_LIST_SHIFT)) & CCM_OSCPLL_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_OSCPLL_AUTHEN_LOCK_LIST [2/2]

#define CCM_OSCPLL_AUTHEN_LOCK_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_LOCK_LIST_SHIFT)) & CCM_OSCPLL_AUTHEN_LOCK_LIST_MASK)

LOCK_LIST - Lock Whitelist 0b0..Whitelist is not locked. 0b1..Whitelist is locked.

◆ CCM_OSCPLL_AUTHEN_LOCK_MODE [1/2]

#define CCM_OSCPLL_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_LOCK_MODE_SHIFT)) & CCM_OSCPLL_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_OSCPLL_AUTHEN_LOCK_MODE [2/2]

#define CCM_OSCPLL_AUTHEN_LOCK_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_LOCK_MODE_SHIFT)) & CCM_OSCPLL_AUTHEN_LOCK_MODE_MASK)

LOCK_MODE - Lock low power and access mode 0b0..MODE is not locked. 0b1..MODE is locked.

◆ CCM_OSCPLL_AUTHEN_LOCK_TZ [1/2]

#define CCM_OSCPLL_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_LOCK_TZ_SHIFT)) & CCM_OSCPLL_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_OSCPLL_AUTHEN_LOCK_TZ [2/2]

#define CCM_OSCPLL_AUTHEN_LOCK_TZ ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_LOCK_TZ_SHIFT)) & CCM_OSCPLL_AUTHEN_LOCK_TZ_MASK)

LOCK_TZ - lock truszone setting 0b0..Trustzone setting is not locked. 0b1..Trustzone setting is locked.

◆ CCM_OSCPLL_AUTHEN_SETPOINT_MODE [1/2]

#define CCM_OSCPLL_AUTHEN_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_OSCPLL_AUTHEN_SETPOINT_MODE_MASK)

SETPOINT_MODE - LPCG works in Setpoint controlled Mode.

◆ CCM_OSCPLL_AUTHEN_SETPOINT_MODE [2/2]

#define CCM_OSCPLL_AUTHEN_SETPOINT_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_SETPOINT_MODE_SHIFT)) & CCM_OSCPLL_AUTHEN_SETPOINT_MODE_MASK)

SETPOINT_MODE - LPCG works in Setpoint controlled Mode.

◆ CCM_OSCPLL_AUTHEN_TZ_NS [1/2]

#define CCM_OSCPLL_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_TZ_NS_SHIFT)) & CCM_OSCPLL_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_OSCPLL_AUTHEN_TZ_NS [2/2]

#define CCM_OSCPLL_AUTHEN_TZ_NS ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_TZ_NS_SHIFT)) & CCM_OSCPLL_AUTHEN_TZ_NS_MASK)

TZ_NS - Non-secure access 0b0..Cannot be changed in Non-secure mode. 0b1..Can be changed in Non-secure mode.

◆ CCM_OSCPLL_AUTHEN_TZ_USER [1/2]

#define CCM_OSCPLL_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_TZ_USER_SHIFT)) & CCM_OSCPLL_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_OSCPLL_AUTHEN_TZ_USER [2/2]

#define CCM_OSCPLL_AUTHEN_TZ_USER ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_TZ_USER_SHIFT)) & CCM_OSCPLL_AUTHEN_TZ_USER_MASK)

TZ_USER - User access 0b1..Clock can be changed in user mode. 0b0..Clock cannot be changed in user mode.

◆ CCM_OSCPLL_AUTHEN_WHITE_LIST [1/2]

#define CCM_OSCPLL_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_WHITE_LIST_SHIFT)) & CCM_OSCPLL_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_OSCPLL_AUTHEN_WHITE_LIST [2/2]

#define CCM_OSCPLL_AUTHEN_WHITE_LIST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_AUTHEN_WHITE_LIST_SHIFT)) & CCM_OSCPLL_AUTHEN_WHITE_LIST_MASK)

WHITE_LIST - Whitelist

◆ CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT [1/2]

#define CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT_SHIFT)) & CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT_MASK)

AUTOMODE_PRESENT - Automode Present 0b1..Present 0b0..Not present

◆ CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT [2/2]

#define CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT_SHIFT)) & CCM_OSCPLL_CONFIG_AUTOMODE_PRESENT_MASK)

AUTOMODE_PRESENT - Automode Present 0b1..Present 0b0..Not present

◆ CCM_OSCPLL_CONFIG_SETPOINT_PRESENT [1/2]

#define CCM_OSCPLL_CONFIG_SETPOINT_PRESENT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_MASK)

SETPOINT_PRESENT - Setpoint present 0b1..Setpoint is implemented. 0b0..Setpoint is not implemented.

◆ CCM_OSCPLL_CONFIG_SETPOINT_PRESENT [2/2]

#define CCM_OSCPLL_CONFIG_SETPOINT_PRESENT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_SHIFT)) & CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_MASK)

SETPOINT_PRESENT - Setpoint present 0b1..Setpoint is implemented. 0b0..Setpoint is not implemented.

◆ CCM_OSCPLL_DIRECT_ON [1/2]

#define CCM_OSCPLL_DIRECT_ON ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DIRECT_ON_SHIFT)) & CCM_OSCPLL_DIRECT_ON_MASK)

ON - turn on clock source 0b0..OSCPLL is OFF 0b1..OSCPLL is ON

◆ CCM_OSCPLL_DIRECT_ON [2/2]

#define CCM_OSCPLL_DIRECT_ON ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DIRECT_ON_SHIFT)) & CCM_OSCPLL_DIRECT_ON_MASK)

ON - turn on clock source 0b0..OSCPLL is OFF 0b1..OSCPLL is ON

◆ CCM_OSCPLL_DOMAIN_LEVEL [1/2]

#define CCM_OSCPLL_DOMAIN_LEVEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL_MASK)

LEVEL - Current dependence level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_OSCPLL_DOMAIN_LEVEL [2/2]

#define CCM_OSCPLL_DOMAIN_LEVEL ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL_MASK)

LEVEL - Current dependence level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_OSCPLL_DOMAIN_LEVEL0 [1/2]

#define CCM_OSCPLL_DOMAIN_LEVEL0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL0_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL0_MASK)

LEVEL0 - Dependence level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_OSCPLL_DOMAIN_LEVEL0 [2/2]

#define CCM_OSCPLL_DOMAIN_LEVEL0 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL0_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL0_MASK)

LEVEL0 - Dependence level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_OSCPLL_DOMAIN_LEVEL1 [1/2]

#define CCM_OSCPLL_DOMAIN_LEVEL1 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL1_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL1_MASK)

LEVEL1 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_OSCPLL_DOMAIN_LEVEL1 [2/2]

#define CCM_OSCPLL_DOMAIN_LEVEL1 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL1_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL1_MASK)

LEVEL1 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_OSCPLL_DOMAIN_LEVEL2 [1/2]

#define CCM_OSCPLL_DOMAIN_LEVEL2 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL2_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL2_MASK)

LEVEL2 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_OSCPLL_DOMAIN_LEVEL2 [2/2]

#define CCM_OSCPLL_DOMAIN_LEVEL2 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL2_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL2_MASK)

LEVEL2 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_OSCPLL_DOMAIN_LEVEL3 [1/2]

#define CCM_OSCPLL_DOMAIN_LEVEL3 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL3_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL3_MASK)

LEVEL3 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_OSCPLL_DOMAIN_LEVEL3 [2/2]

#define CCM_OSCPLL_DOMAIN_LEVEL3 ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_DOMAIN_LEVEL3_SHIFT)) & CCM_OSCPLL_DOMAIN_LEVEL3_MASK)

LEVEL3 - Depend level 0b000..This clock source is not needed in any mode, and can be turned off 0b001..This clock source is needed in RUN mode, but not needed in WAIT, STOP mode 0b010..This clock source is needed in RUN and WAIT mode, but not needed in STOP mode 0b011..This clock source is needed in RUN, WAIT and STOP mode 0b100..This clock source is always on in any mode (including SUSPEND) 0b101, 0b110, 0b111..Reserved

◆ CCM_OSCPLL_SETPOINT_SETPOINT [1/2]

#define CCM_OSCPLL_SETPOINT_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_SETPOINT_SETPOINT_SHIFT)) & CCM_OSCPLL_SETPOINT_SETPOINT_MASK)

SETPOINT - Setpoint

◆ CCM_OSCPLL_SETPOINT_SETPOINT [2/2]

#define CCM_OSCPLL_SETPOINT_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_SETPOINT_SETPOINT_SHIFT)) & CCM_OSCPLL_SETPOINT_SETPOINT_MASK)

SETPOINT - Setpoint

◆ CCM_OSCPLL_SETPOINT_STANDBY [1/2]

#define CCM_OSCPLL_SETPOINT_STANDBY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_SETPOINT_STANDBY_SHIFT)) & CCM_OSCPLL_SETPOINT_STANDBY_MASK)

STANDBY - Standby

◆ CCM_OSCPLL_SETPOINT_STANDBY [2/2]

#define CCM_OSCPLL_SETPOINT_STANDBY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_SETPOINT_STANDBY_SHIFT)) & CCM_OSCPLL_SETPOINT_STANDBY_MASK)

STANDBY - Standby

◆ CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN [1/2]

#define CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN_SHIFT)) & CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN_MASK)

ACTIVE_DOMAIN - Domains that own this clock source 0b0000..Clock not owned by any domain 0b0001..Clock owned by Domain0 0b0010..Clock owned by Domain1 0b0011..Clock owned by Domain0 and Domain1 0b0100..Clock owned by Domain2 0b0101..Clock owned by Domain0 and Domain2 0b0110..Clock owned by Domain1 and Domain2 0b0111..Clock owned by Domain0, Domain1 and Domain 2 0b1000..Clock owned by Domain3 0b1001..Clock owned by Domain0 and Domain3 0b1010..Clock owned by Domain1 and Domain3 0b1011..Clock owned by Domain2 and Domain3 0b1100..Clock owned by Domain0, Domain 1, and Domain3 0b1101..Clock owned by Domain0, Domain 2, and Domain3 0b1110..Clock owned by Domain1, Domain 2, and Domain3 0b1111..Clock owned by all domains

◆ CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN [2/2]

#define CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN_SHIFT)) & CCM_OSCPLL_STATUS0_ACTIVE_DOMAIN_MASK)

ACTIVE_DOMAIN - Domains that own this clock source 0b0000..Clock not owned by any domain 0b0001..Clock owned by Domain0 0b0010..Clock owned by Domain1 0b0011..Clock owned by Domain0 and Domain1 0b0100..Clock owned by Domain2 0b0101..Clock owned by Domain0 and Domain2 0b0110..Clock owned by Domain1 and Domain2 0b0111..Clock owned by Domain0, Domain1 and Domain 2 0b1000..Clock owned by Domain3 0b1001..Clock owned by Domain0 and Domain3 0b1010..Clock owned by Domain1 and Domain3 0b1011..Clock owned by Domain2 and Domain3 0b1100..Clock owned by Domain0, Domain 1, and Domain3 0b1101..Clock owned by Domain0, Domain 2, and Domain3 0b1110..Clock owned by Domain1, Domain 2, and Domain3 0b1111..Clock owned by all domains

◆ CCM_OSCPLL_STATUS0_DOMAIN_ENABLE [1/2]

#define CCM_OSCPLL_STATUS0_DOMAIN_ENABLE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_DOMAIN_ENABLE_SHIFT)) & CCM_OSCPLL_STATUS0_DOMAIN_ENABLE_MASK)

DOMAIN_ENABLE - Enable status from each domain 0b0000..No domain request 0b0001..Request from Domain0 0b0010..Request from Domain1 0b0011..Request from Domain0 and Domain1 0b0100..Request from Domain2 0b0101..Request from Domain0 and Domain2 0b0110..Request from Domain1 and Domain2 0b0111..Request from Domain0, Domain1 and Domain 2 0b1000..Request from Domain3 0b1001..Request from Domain0 and Domain3 0b1010..Request from Domain1 and Domain3 0b1011..Request from Domain2 and Domain3 0b1100..Request from Domain0, Domain 1, and Domain3 0b1101..Request from Domain0, Domain 2, and Domain3 0b1110..Request from Domain1, Domain 2, and Domain3 0b1111..Request from all domains

◆ CCM_OSCPLL_STATUS0_DOMAIN_ENABLE [2/2]

#define CCM_OSCPLL_STATUS0_DOMAIN_ENABLE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_DOMAIN_ENABLE_SHIFT)) & CCM_OSCPLL_STATUS0_DOMAIN_ENABLE_MASK)

DOMAIN_ENABLE - Enable status from each domain 0b0000..No domain request 0b0001..Request from Domain0 0b0010..Request from Domain1 0b0011..Request from Domain0 and Domain1 0b0100..Request from Domain2 0b0101..Request from Domain0 and Domain2 0b0110..Request from Domain1 and Domain2 0b0111..Request from Domain0, Domain1 and Domain 2 0b1000..Request from Domain3 0b1001..Request from Domain0 and Domain3 0b1010..Request from Domain1 and Domain3 0b1011..Request from Domain2 and Domain3 0b1100..Request from Domain0, Domain 1, and Domain3 0b1101..Request from Domain0, Domain 2, and Domain3 0b1110..Request from Domain1, Domain 2, and Domain3 0b1111..Request from all domains

◆ CCM_OSCPLL_STATUS0_IN_USE [1/2]

#define CCM_OSCPLL_STATUS0_IN_USE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_IN_USE_SHIFT)) & CCM_OSCPLL_STATUS0_IN_USE_MASK)

IN_USE - In use 0b1..Clock source is being used by clock roots 0b0..Clock source is not being used by clock roots

◆ CCM_OSCPLL_STATUS0_IN_USE [2/2]

#define CCM_OSCPLL_STATUS0_IN_USE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_IN_USE_SHIFT)) & CCM_OSCPLL_STATUS0_IN_USE_MASK)

IN_USE - In use 0b1..Clock source is being used by clock roots 0b0..Clock source is not being used by clock roots

◆ CCM_OSCPLL_STATUS0_ON [1/2]

#define CCM_OSCPLL_STATUS0_ON ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_ON_SHIFT)) & CCM_OSCPLL_STATUS0_ON_MASK)

ON - Clock source current state 0b0..Clock source is OFF 0b1..Clock source is ON

◆ CCM_OSCPLL_STATUS0_ON [2/2]

#define CCM_OSCPLL_STATUS0_ON ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_ON_SHIFT)) & CCM_OSCPLL_STATUS0_ON_MASK)

ON - Clock source current state 0b0..Clock source is OFF 0b1..Clock source is ON

◆ CCM_OSCPLL_STATUS0_STATUS_EARLY [1/2]

#define CCM_OSCPLL_STATUS0_STATUS_EARLY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_STATUS_EARLY_SHIFT)) & CCM_OSCPLL_STATUS0_STATUS_EARLY_MASK)

STATUS_EARLY - Clock source active 0b1..Clock source is active 0b0..Clock source is not active

◆ CCM_OSCPLL_STATUS0_STATUS_EARLY [2/2]

#define CCM_OSCPLL_STATUS0_STATUS_EARLY ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_STATUS_EARLY_SHIFT)) & CCM_OSCPLL_STATUS0_STATUS_EARLY_MASK)

STATUS_EARLY - Clock source active 0b1..Clock source is active 0b0..Clock source is not active

◆ CCM_OSCPLL_STATUS0_STATUS_LATE [1/2]

#define CCM_OSCPLL_STATUS0_STATUS_LATE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_STATUS_LATE_SHIFT)) & CCM_OSCPLL_STATUS0_STATUS_LATE_MASK)

STATUS_LATE - Clock source ready 0b1..Clock source is ready to use 0b0..Clock source is not ready to use

◆ CCM_OSCPLL_STATUS0_STATUS_LATE [2/2]

#define CCM_OSCPLL_STATUS0_STATUS_LATE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS0_STATUS_LATE_SHIFT)) & CCM_OSCPLL_STATUS0_STATUS_LATE_MASK)

STATUS_LATE - Clock source ready 0b1..Clock source is ready to use 0b0..Clock source is not ready to use

◆ CCM_OSCPLL_STATUS1_CPU0_MODE [1/2]

#define CCM_OSCPLL_STATUS1_CPU0_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU0_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU0_MODE_MASK)

CPU0_MODE - Domain0 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_OSCPLL_STATUS1_CPU0_MODE [2/2]

#define CCM_OSCPLL_STATUS1_CPU0_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU0_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU0_MODE_MASK)

CPU0_MODE - Domain0 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_OSCPLL_STATUS1_CPU0_MODE_DONE [1/2]

#define CCM_OSCPLL_STATUS1_CPU0_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU0_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU0_MODE_DONE_MASK)

CPU0_MODE_DONE - Domain0 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_OSCPLL_STATUS1_CPU0_MODE_DONE [2/2]

#define CCM_OSCPLL_STATUS1_CPU0_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU0_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU0_MODE_DONE_MASK)

CPU0_MODE_DONE - Domain0 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST [1/2]

#define CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST_MASK)

CPU0_MODE_REQUEST - Domain0 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST [2/2]

#define CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU0_MODE_REQUEST_MASK)

CPU0_MODE_REQUEST - Domain0 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_OSCPLL_STATUS1_CPU1_MODE [1/2]

#define CCM_OSCPLL_STATUS1_CPU1_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)

CPU1_MODE - Domain1 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_OSCPLL_STATUS1_CPU1_MODE [2/2]

#define CCM_OSCPLL_STATUS1_CPU1_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)

CPU1_MODE - Domain1 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_OSCPLL_STATUS1_CPU1_MODE_DONE [1/2]

#define CCM_OSCPLL_STATUS1_CPU1_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_DONE_MASK)

CPU1_MODE_DONE - Domain1 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_OSCPLL_STATUS1_CPU1_MODE_DONE [2/2]

#define CCM_OSCPLL_STATUS1_CPU1_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_DONE_MASK)

CPU1_MODE_DONE - Domain1 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST [1/2]

#define CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST_MASK)

CPU1_MODE_REQUEST - Domain1 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST [2/2]

#define CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_REQUEST_MASK)

CPU1_MODE_REQUEST - Domain1 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_OSCPLL_STATUS1_CPU2_MODE [1/2]

#define CCM_OSCPLL_STATUS1_CPU2_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)

CPU2_MODE - Domain2 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_OSCPLL_STATUS1_CPU2_MODE [2/2]

#define CCM_OSCPLL_STATUS1_CPU2_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)

CPU2_MODE - Domain2 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_OSCPLL_STATUS1_CPU2_MODE_DONE [1/2]

#define CCM_OSCPLL_STATUS1_CPU2_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_DONE_MASK)

CPU2_MODE_DONE - Domain2 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_OSCPLL_STATUS1_CPU2_MODE_DONE [2/2]

#define CCM_OSCPLL_STATUS1_CPU2_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_DONE_MASK)

CPU2_MODE_DONE - Domain2 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST [1/2]

#define CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST_MASK)

CPU2_MODE_REQUEST - Domain2 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST [2/2]

#define CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_REQUEST_MASK)

CPU2_MODE_REQUEST - Domain2 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_OSCPLL_STATUS1_CPU3_MODE [1/2]

#define CCM_OSCPLL_STATUS1_CPU3_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU3_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU3_MODE_MASK)

CPU3_MODE - Domain3 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_OSCPLL_STATUS1_CPU3_MODE [2/2]

#define CCM_OSCPLL_STATUS1_CPU3_MODE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU3_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU3_MODE_MASK)

CPU3_MODE - Domain3 Low Power Mode 0b00..Run 0b01..Wait 0b10..Stop 0b11..Suspend

◆ CCM_OSCPLL_STATUS1_CPU3_MODE_DONE [1/2]

#define CCM_OSCPLL_STATUS1_CPU3_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU3_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU3_MODE_DONE_MASK)

CPU3_MODE_DONE - Domain3 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_OSCPLL_STATUS1_CPU3_MODE_DONE [2/2]

#define CCM_OSCPLL_STATUS1_CPU3_MODE_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU3_MODE_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU3_MODE_DONE_MASK)

CPU3_MODE_DONE - Domain3 Low Power Mode task done 0b1..Clock is gated-off 0b0..Clock is not gated

◆ CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST [1/2]

#define CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST_MASK)

CPU3_MODE_REQUEST - Domain3 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST [2/2]

#define CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_CPU3_MODE_REQUEST_MASK)

CPU3_MODE_REQUEST - Domain3 request enter Low Power Mode 0b1..Request from domain to enter Low Power Mode 0b0..No request

◆ CCM_OSCPLL_STATUS1_CURRENT_SETPOINT [1/2]

#define CCM_OSCPLL_STATUS1_CURRENT_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_OSCPLL_STATUS1_CURRENT_SETPOINT_MASK)

CURRENT_SETPOINT - Current Setpoint

◆ CCM_OSCPLL_STATUS1_CURRENT_SETPOINT [2/2]

#define CCM_OSCPLL_STATUS1_CURRENT_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CURRENT_SETPOINT_SHIFT)) & CCM_OSCPLL_STATUS1_CURRENT_SETPOINT_MASK)

CURRENT_SETPOINT - Current Setpoint

◆ CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE [1/2]

#define CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE_MASK)

SETPOINT_OFF_DONE - Clock source turn off finish from GPC Setpoint 0b1..Clock source is turned off 0b0..Clock source is not turned off

◆ CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE [2/2]

#define CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_OFF_DONE_MASK)

SETPOINT_OFF_DONE - Clock source turn off finish from GPC Setpoint 0b1..Clock source is turned off 0b0..Clock source is not turned off

◆ CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST [1/2]

#define CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST_MASK)

SETPOINT_OFF_REQUEST - Clock gate turn off request from GPC Setpoint 0b1..Clock gate requested to be turned off 0b0..No request

◆ CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST [2/2]

#define CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_OFF_REQUEST_MASK)

SETPOINT_OFF_REQUEST - Clock gate turn off request from GPC Setpoint 0b1..Clock gate requested to be turned off 0b0..No request

◆ CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE [1/2]

#define CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE_MASK)

SETPOINT_ON_DONE - Clock gate turn on finish from GPC Setpoint 0b1..Request to turn on clock gate 0b0..No request

◆ CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE [2/2]

#define CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_ON_DONE_MASK)

SETPOINT_ON_DONE - Clock gate turn on finish from GPC Setpoint 0b1..Request to turn on clock gate 0b0..No request

◆ CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST [1/2]

#define CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST_MASK)

SETPOINT_ON_REQUEST - Clock gate turn on request from GPC Setpoint 0b1..Clock gate requested to be turned on 0b0..No request

◆ CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST [2/2]

#define CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_SETPOINT_ON_REQUEST_MASK)

SETPOINT_ON_REQUEST - Clock gate turn on request from GPC Setpoint 0b1..Clock gate requested to be turned on 0b0..No request

◆ CCM_OSCPLL_STATUS1_STANDBY_IN_DONE [1/2]

#define CCM_OSCPLL_STATUS1_STANDBY_IN_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_IN_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_IN_DONE_MASK)

STANDBY_IN_DONE - Clock source turn off finish from GPC standby 0b1..Clock source is turned off 0b0..Clock source is not turned off

◆ CCM_OSCPLL_STATUS1_STANDBY_IN_DONE [2/2]

#define CCM_OSCPLL_STATUS1_STANDBY_IN_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_IN_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_IN_DONE_MASK)

STANDBY_IN_DONE - Clock source turn off finish from GPC standby 0b1..Clock source is turned off 0b0..Clock source is not turned off

◆ CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST [1/2]

#define CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST_MASK)

STANDBY_IN_REQUEST - Clock gate turn off request from GPC standby 0b1..Clock gate requested to be turned off 0b0..No request

◆ CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST [2/2]

#define CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_IN_REQUEST_MASK)

STANDBY_IN_REQUEST - Clock gate turn off request from GPC standby 0b1..Clock gate requested to be turned off 0b0..No request

◆ CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE [1/2]

#define CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE_MASK)

STANDBY_OUT_DONE - Clock gate turn on finish from GPC standby 0b1..Request to turn on Clock gate is complete 0b0..Request to turn on Clock gate is not complete

◆ CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE [2/2]

#define CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_OUT_DONE_MASK)

STANDBY_OUT_DONE - Clock gate turn on finish from GPC standby 0b1..Request to turn on Clock gate is complete 0b0..Request to turn on Clock gate is not complete

◆ CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST [1/2]

#define CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST_MASK)

STANDBY_OUT_REQUEST - Clock gate turn on request from GPC standby 0b1..Clock gate requested to be turned on 0b0..No request

◆ CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST [2/2]

#define CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST_SHIFT)) & CCM_OSCPLL_STATUS1_STANDBY_OUT_REQUEST_MASK)

STANDBY_OUT_REQUEST - Clock gate turn on request from GPC standby 0b1..Clock gate requested to be turned on 0b0..No request

◆ CCM_OSCPLL_STATUS1_TARGET_SETPOINT [1/2]

#define CCM_OSCPLL_STATUS1_TARGET_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_OSCPLL_STATUS1_TARGET_SETPOINT_MASK)

TARGET_SETPOINT - Next Setpoint to change to

◆ CCM_OSCPLL_STATUS1_TARGET_SETPOINT [2/2]

#define CCM_OSCPLL_STATUS1_TARGET_SETPOINT ( x ) (((uint32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_TARGET_SETPOINT_SHIFT)) & CCM_OSCPLL_STATUS1_TARGET_SETPOINT_MASK)

TARGET_SETPOINT - Next Setpoint to change to

Macros

CCR - CCM Control Register

CSR - CCM Status Register

CCSR - CCM Clock Switcher Register

CACRR - CCM Arm Clock Root Register

CBCDR - CCM Bus Clock Divider Register

CBCMR - CCM Bus Clock Multiplexer Register

CSCMR1 - CCM Serial Clock Multiplexer Register 1

CSCMR2 - CCM Serial Clock Multiplexer Register 2

CSCDR1 - CCM Serial Clock Divider Register 1

CS1CDR - CCM Clock Divider Register

CS2CDR - CCM Clock Divider Register

CDCDR - CCM D1 Clock Divider Register

CSCDR2 - CCM Serial Clock Divider Register 2

CSCDR3 - CCM Serial Clock Divider Register 3

CDHIPR - CCM Divider Handshake In-Process Register

CLPCR - CCM Low Power Control Register

CISR - CCM Interrupt Status Register

CIMR - CCM Interrupt Mask Register

CCOSR - CCM Clock Output Source Register

CGPR - CCM General Purpose Register

CCGR0 - CCM Clock Gating Register 0

CCGR1 - CCM Clock Gating Register 1

CCGR2 - CCM Clock Gating Register 2

CCGR3 - CCM Clock Gating Register 3

CCGR4 - CCM Clock Gating Register 4

CCGR5 - CCM Clock Gating Register 5

CCGR6 - CCM Clock Gating Register 6

CMEOR - CCM Module Enable Overide Register

CLOCK_ROOT_CONTROL - Clock root control

CLOCK_ROOT_CONTROL_SET - Clock root control

CLOCK_ROOT_CONTROL_CLR - Clock root control

CLOCK_ROOT_CONTROL_TOG - Clock root control

CLOCK_ROOT_STATUS0 - Clock root working status

CLOCK_ROOT_STATUS1 - Clock root low power status

CLOCK_ROOT_CONFIG - Clock root configuration

CLOCK_ROOT_AUTHEN - Clock root access control

CLOCK_ROOT_AUTHEN_SET - Clock root access control

CLOCK_ROOT_AUTHEN_CLR - Clock root access control

CLOCK_ROOT_AUTHEN_TOG - Clock root access control

CLOCK_ROOT_CLOCK_ROOT_SETPOINT_SETPOINT - Setpoint setting

CLOCK_GROUP_CONTROL - Clock group control

CLOCK_GROUP_CONTROL_SET - Clock group control

CLOCK_GROUP_CONTROL_CLR - Clock group control

CLOCK_GROUP_CONTROL_TOG - Clock group control

CLOCK_GROUP_STATUS0 - Clock group working status

CLOCK_GROUP_STATUS1 - Clock group low power/extend status

CLOCK_GROUP_CONFIG - Clock group configuration

CLOCK_GROUP_AUTHEN - Clock group access control

CLOCK_GROUP_AUTHEN_SET - Clock group access control

CLOCK_GROUP_AUTHEN_CLR - Clock group access control

CLOCK_GROUP_AUTHEN_TOG - Clock group access control

CLOCK_GROUP_CLOCK_GROUP_SETPOINT_SETPOINT - Setpoint setting

GPR_SHARED - General Purpose Register

GPR_SHARED_SET - General Purpose Register

GPR_SHARED_CLR - General Purpose Register

GPR_SHARED_TOG - General Purpose Register

GPR_SHARED_AUTHEN - GPR access control

GPR_SHARED_AUTHEN_SET - GPR access control

GPR_SHARED_AUTHEN_CLR - GPR access control

GPR_SHARED_AUTHEN_TOG - GPR access control

GPR_PRIVATE1 - General Purpose Register

GPR_PRIVATE1_SET - General Purpose Register

GPR_PRIVATE1_CLR - General Purpose Register

GPR_PRIVATE1_TOG - General Purpose Register

GPR_PRIVATE1_AUTHEN - GPR access control

GPR_PRIVATE1_AUTHEN_SET - GPR access control

GPR_PRIVATE1_AUTHEN_CLR - GPR access control

GPR_PRIVATE1_AUTHEN_TOG - GPR access control

GPR_PRIVATE2 - General Purpose Register

GPR_PRIVATE2_SET - General Purpose Register

GPR_PRIVATE2_CLR - General Purpose Register

GPR_PRIVATE2_TOG - General Purpose Register

GPR_PRIVATE2_AUTHEN - GPR access control

GPR_PRIVATE2_AUTHEN_SET - GPR access control

GPR_PRIVATE2_AUTHEN_CLR - GPR access control

GPR_PRIVATE2_AUTHEN_TOG - GPR access control

GPR_PRIVATE3 - General Purpose Register

GPR_PRIVATE3_SET - General Purpose Register

GPR_PRIVATE3_CLR - General Purpose Register