RTEMS 6.1-rc2
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AUDIO_PLL Register Masks
Mapping Information » Iomuxc_pads » Device Peripheral Access Layer » AUDIO_PLL Peripheral Access Layer

CTRL0 - Fractional PLL Control Register

#define AUDIO_PLL_CTRL0_DIV_SELECT_MASK   (0x7FU)
 
#define AUDIO_PLL_CTRL0_DIV_SELECT_SHIFT   (0U)
 
#define AUDIO_PLL_CTRL0_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DIV_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_DIV_SELECT_MASK)
 
#define AUDIO_PLL_CTRL0_ENABLE_ALT_MASK   (0x100U)
 
#define AUDIO_PLL_CTRL0_ENABLE_ALT_SHIFT   (8U)
 
#define AUDIO_PLL_CTRL0_ENABLE_ALT(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_ALT_MASK)
 
#define AUDIO_PLL_CTRL0_HOLD_RING_OFF_MASK   (0x2000U)
 
#define AUDIO_PLL_CTRL0_HOLD_RING_OFF_SHIFT   (13U)
 
#define AUDIO_PLL_CTRL0_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & AUDIO_PLL_CTRL0_HOLD_RING_OFF_MASK)
 
#define AUDIO_PLL_CTRL0_POWERUP_MASK   (0x4000U)
 
#define AUDIO_PLL_CTRL0_POWERUP_SHIFT   (14U)
 
#define AUDIO_PLL_CTRL0_POWERUP(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POWERUP_SHIFT)) & AUDIO_PLL_CTRL0_POWERUP_MASK)
 
#define AUDIO_PLL_CTRL0_ENABLE_MASK   (0x8000U)
 
#define AUDIO_PLL_CTRL0_ENABLE_SHIFT   (15U)
 
#define AUDIO_PLL_CTRL0_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_MASK)
 
#define AUDIO_PLL_CTRL0_BYPASS_MASK   (0x10000U)
 
#define AUDIO_PLL_CTRL0_BYPASS_SHIFT   (16U)
 
#define AUDIO_PLL_CTRL0_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BYPASS_SHIFT)) & AUDIO_PLL_CTRL0_BYPASS_MASK)
 
#define AUDIO_PLL_CTRL0_DITHER_EN_MASK   (0x20000U)
 
#define AUDIO_PLL_CTRL0_DITHER_EN_SHIFT   (17U)
 
#define AUDIO_PLL_CTRL0_DITHER_EN(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DITHER_EN_SHIFT)) & AUDIO_PLL_CTRL0_DITHER_EN_MASK)
 
#define AUDIO_PLL_CTRL0_BIAS_TRIM_MASK   (0x380000U)
 
#define AUDIO_PLL_CTRL0_BIAS_TRIM_SHIFT   (19U)
 
#define AUDIO_PLL_CTRL0_BIAS_TRIM(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_TRIM_MASK)
 
#define AUDIO_PLL_CTRL0_PLL_REG_EN_MASK   (0x400000U)
 
#define AUDIO_PLL_CTRL0_PLL_REG_EN_SHIFT   (22U)
 
#define AUDIO_PLL_CTRL0_PLL_REG_EN(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & AUDIO_PLL_CTRL0_PLL_REG_EN_MASK)
 
#define AUDIO_PLL_CTRL0_POST_DIV_SEL_MASK   (0xE000000U)
 
#define AUDIO_PLL_CTRL0_POST_DIV_SEL_SHIFT   (25U)
 
#define AUDIO_PLL_CTRL0_POST_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & AUDIO_PLL_CTRL0_POST_DIV_SEL_MASK)
 
#define AUDIO_PLL_CTRL0_BIAS_SELECT_MASK   (0x20000000U)
 
#define AUDIO_PLL_CTRL0_BIAS_SELECT_SHIFT   (29U)
 
#define AUDIO_PLL_CTRL0_BIAS_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_SELECT_MASK)
 
#define ETHERNET_PLL_CTRL0_DIV_SELECT_MASK   (0x7FU)
 
#define ETHERNET_PLL_CTRL0_DIV_SELECT_SHIFT   (0U)
 
#define ETHERNET_PLL_CTRL0_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DIV_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_DIV_SELECT_MASK)
 
#define ETHERNET_PLL_CTRL0_ENABLE_ALT_MASK   (0x100U)
 
#define ETHERNET_PLL_CTRL0_ENABLE_ALT_SHIFT   (8U)
 
#define ETHERNET_PLL_CTRL0_ENABLE_ALT(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_ALT_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_ALT_MASK)
 
#define ETHERNET_PLL_CTRL0_HOLD_RING_OFF_MASK   (0x2000U)
 
#define ETHERNET_PLL_CTRL0_HOLD_RING_OFF_SHIFT   (13U)
 
#define ETHERNET_PLL_CTRL0_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & ETHERNET_PLL_CTRL0_HOLD_RING_OFF_MASK)
 
#define ETHERNET_PLL_CTRL0_POWERUP_MASK   (0x4000U)
 
#define ETHERNET_PLL_CTRL0_POWERUP_SHIFT   (14U)
 
#define ETHERNET_PLL_CTRL0_POWERUP(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POWERUP_SHIFT)) & ETHERNET_PLL_CTRL0_POWERUP_MASK)
 
#define ETHERNET_PLL_CTRL0_ENABLE_MASK   (0x8000U)
 
#define ETHERNET_PLL_CTRL0_ENABLE_SHIFT   (15U)
 
#define ETHERNET_PLL_CTRL0_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_MASK)
 
#define ETHERNET_PLL_CTRL0_BYPASS_MASK   (0x10000U)
 
#define ETHERNET_PLL_CTRL0_BYPASS_SHIFT   (16U)
 
#define ETHERNET_PLL_CTRL0_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BYPASS_SHIFT)) & ETHERNET_PLL_CTRL0_BYPASS_MASK)
 
#define ETHERNET_PLL_CTRL0_DITHER_EN_MASK   (0x20000U)
 
#define ETHERNET_PLL_CTRL0_DITHER_EN_SHIFT   (17U)
 
#define ETHERNET_PLL_CTRL0_DITHER_EN(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DITHER_EN_SHIFT)) & ETHERNET_PLL_CTRL0_DITHER_EN_MASK)
 
#define ETHERNET_PLL_CTRL0_BIAS_TRIM_MASK   (0x380000U)
 
#define ETHERNET_PLL_CTRL0_BIAS_TRIM_SHIFT   (19U)
 
#define ETHERNET_PLL_CTRL0_BIAS_TRIM(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_TRIM_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_TRIM_MASK)
 
#define ETHERNET_PLL_CTRL0_PLL_REG_EN_MASK   (0x400000U)
 
#define ETHERNET_PLL_CTRL0_PLL_REG_EN_SHIFT   (22U)
 
#define ETHERNET_PLL_CTRL0_PLL_REG_EN(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_PLL_REG_EN_SHIFT)) & ETHERNET_PLL_CTRL0_PLL_REG_EN_MASK)
 
#define ETHERNET_PLL_CTRL0_POST_DIV_SEL_MASK   (0xE000000U)
 
#define ETHERNET_PLL_CTRL0_POST_DIV_SEL_SHIFT   (25U)
 
#define ETHERNET_PLL_CTRL0_POST_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & ETHERNET_PLL_CTRL0_POST_DIV_SEL_MASK)
 
#define ETHERNET_PLL_CTRL0_BIAS_SELECT_MASK   (0x20000000U)
 
#define ETHERNET_PLL_CTRL0_BIAS_SELECT_SHIFT   (29U)
 
#define ETHERNET_PLL_CTRL0_BIAS_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_SELECT_MASK)
 
#define VIDEO_PLL_CTRL0_DIV_SELECT_MASK   (0x7FU)
 
#define VIDEO_PLL_CTRL0_DIV_SELECT_SHIFT   (0U)
 
#define VIDEO_PLL_CTRL0_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DIV_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_DIV_SELECT_MASK)
 
#define VIDEO_PLL_CTRL0_ENABLE_ALT_MASK   (0x100U)
 
#define VIDEO_PLL_CTRL0_ENABLE_ALT_SHIFT   (8U)
 
#define VIDEO_PLL_CTRL0_ENABLE_ALT(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_ALT_MASK)
 
#define VIDEO_PLL_CTRL0_HOLD_RING_OFF_MASK   (0x2000U)
 
#define VIDEO_PLL_CTRL0_HOLD_RING_OFF_SHIFT   (13U)
 
#define VIDEO_PLL_CTRL0_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & VIDEO_PLL_CTRL0_HOLD_RING_OFF_MASK)
 
#define VIDEO_PLL_CTRL0_POWERUP_MASK   (0x4000U)
 
#define VIDEO_PLL_CTRL0_POWERUP_SHIFT   (14U)
 
#define VIDEO_PLL_CTRL0_POWERUP(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POWERUP_SHIFT)) & VIDEO_PLL_CTRL0_POWERUP_MASK)
 
#define VIDEO_PLL_CTRL0_ENABLE_MASK   (0x8000U)
 
#define VIDEO_PLL_CTRL0_ENABLE_SHIFT   (15U)
 
#define VIDEO_PLL_CTRL0_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_MASK)
 
#define VIDEO_PLL_CTRL0_BYPASS_MASK   (0x10000U)
 
#define VIDEO_PLL_CTRL0_BYPASS_SHIFT   (16U)
 
#define VIDEO_PLL_CTRL0_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BYPASS_SHIFT)) & VIDEO_PLL_CTRL0_BYPASS_MASK)
 
#define VIDEO_PLL_CTRL0_DITHER_EN_MASK   (0x20000U)
 
#define VIDEO_PLL_CTRL0_DITHER_EN_SHIFT   (17U)
 
#define VIDEO_PLL_CTRL0_DITHER_EN(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DITHER_EN_SHIFT)) & VIDEO_PLL_CTRL0_DITHER_EN_MASK)
 
#define VIDEO_PLL_CTRL0_BIAS_TRIM_MASK   (0x380000U)
 
#define VIDEO_PLL_CTRL0_BIAS_TRIM_SHIFT   (19U)
 
#define VIDEO_PLL_CTRL0_BIAS_TRIM(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_TRIM_MASK)
 
#define VIDEO_PLL_CTRL0_PLL_REG_EN_MASK   (0x400000U)
 
#define VIDEO_PLL_CTRL0_PLL_REG_EN_SHIFT   (22U)
 
#define VIDEO_PLL_CTRL0_PLL_REG_EN(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & VIDEO_PLL_CTRL0_PLL_REG_EN_MASK)
 
#define VIDEO_PLL_CTRL0_POST_DIV_SEL_MASK   (0xE000000U)
 
#define VIDEO_PLL_CTRL0_POST_DIV_SEL_SHIFT   (25U)
 
#define VIDEO_PLL_CTRL0_POST_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & VIDEO_PLL_CTRL0_POST_DIV_SEL_MASK)
 
#define VIDEO_PLL_CTRL0_BIAS_SELECT_MASK   (0x20000000U)
 
#define VIDEO_PLL_CTRL0_BIAS_SELECT_SHIFT   (29U)
 
#define VIDEO_PLL_CTRL0_BIAS_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_SELECT_MASK)
 

SPREAD_SPECTRUM - Fractional PLL Spread Spectrum Control Register

#define AUDIO_PLL_SPREAD_SPECTRUM_STEP_MASK   (0x7FFFU)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_STEP_SHIFT   (0U)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_STEP(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STEP_MASK)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_MASK   (0x8000U)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT   (15U)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_MASK)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_STOP_MASK   (0xFFFF0000U)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_STOP_SHIFT   (16U)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_STOP(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STOP_MASK)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_STEP_MASK   (0x7FFFU)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_STEP_SHIFT   (0U)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_STEP(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STEP_MASK)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_MASK   (0x8000U)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT   (15U)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_MASK)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_STOP_MASK   (0xFFFF0000U)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_STOP_SHIFT   (16U)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_STOP(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STOP_MASK)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_STEP_MASK   (0x7FFFU)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_STEP_SHIFT   (0U)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_STEP(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STEP_MASK)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_MASK   (0x8000U)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT   (15U)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_MASK)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_STOP_MASK   (0xFFFF0000U)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_STOP_SHIFT   (16U)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_STOP(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STOP_MASK)
 

NUMERATOR - Fractional PLL Numerator Control Register

#define AUDIO_PLL_NUMERATOR_NUM_MASK   (0x3FFFFFFFU)
 
#define AUDIO_PLL_NUMERATOR_NUM_SHIFT   (0U)
 
#define AUDIO_PLL_NUMERATOR_NUM(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_NUMERATOR_NUM_SHIFT)) & AUDIO_PLL_NUMERATOR_NUM_MASK)
 
#define ETHERNET_PLL_NUMERATOR_NUM_MASK   (0x3FFFFFFFU)
 
#define ETHERNET_PLL_NUMERATOR_NUM_SHIFT   (0U)
 
#define ETHERNET_PLL_NUMERATOR_NUM(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_NUMERATOR_NUM_SHIFT)) & ETHERNET_PLL_NUMERATOR_NUM_MASK)
 
#define VIDEO_PLL_NUMERATOR_NUM_MASK   (0x3FFFFFFFU)
 
#define VIDEO_PLL_NUMERATOR_NUM_SHIFT   (0U)
 
#define VIDEO_PLL_NUMERATOR_NUM(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_NUMERATOR_NUM_SHIFT)) & VIDEO_PLL_NUMERATOR_NUM_MASK)
 

DENOMINATOR - Fractional PLL Denominator Control Register

#define AUDIO_PLL_DENOMINATOR_DENOM_MASK   (0x3FFFFFFFU)
 
#define AUDIO_PLL_DENOMINATOR_DENOM_SHIFT   (0U)
 
#define AUDIO_PLL_DENOMINATOR_DENOM(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_DENOMINATOR_DENOM_SHIFT)) & AUDIO_PLL_DENOMINATOR_DENOM_MASK)
 
#define ETHERNET_PLL_DENOMINATOR_DENOM_MASK   (0x3FFFFFFFU)
 
#define ETHERNET_PLL_DENOMINATOR_DENOM_SHIFT   (0U)
 
#define ETHERNET_PLL_DENOMINATOR_DENOM(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_DENOMINATOR_DENOM_SHIFT)) & ETHERNET_PLL_DENOMINATOR_DENOM_MASK)
 
#define VIDEO_PLL_DENOMINATOR_DENOM_MASK   (0x3FFFFFFFU)
 
#define VIDEO_PLL_DENOMINATOR_DENOM_SHIFT   (0U)
 
#define VIDEO_PLL_DENOMINATOR_DENOM(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_DENOMINATOR_DENOM_SHIFT)) & VIDEO_PLL_DENOMINATOR_DENOM_MASK)
 

CTRL0 - Fractional PLL Control Register

#define AUDIO_PLL_CTRL0_DIV_SELECT_MASK   (0x7FU)
 
#define AUDIO_PLL_CTRL0_DIV_SELECT_SHIFT   (0U)
 
#define AUDIO_PLL_CTRL0_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DIV_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_DIV_SELECT_MASK)
 
#define AUDIO_PLL_CTRL0_ENABLE_ALT_MASK   (0x100U)
 
#define AUDIO_PLL_CTRL0_ENABLE_ALT_SHIFT   (8U)
 
#define AUDIO_PLL_CTRL0_ENABLE_ALT(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_ALT_MASK)
 
#define AUDIO_PLL_CTRL0_HOLD_RING_OFF_MASK   (0x2000U)
 
#define AUDIO_PLL_CTRL0_HOLD_RING_OFF_SHIFT   (13U)
 
#define AUDIO_PLL_CTRL0_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & AUDIO_PLL_CTRL0_HOLD_RING_OFF_MASK)
 
#define AUDIO_PLL_CTRL0_POWERUP_MASK   (0x4000U)
 
#define AUDIO_PLL_CTRL0_POWERUP_SHIFT   (14U)
 
#define AUDIO_PLL_CTRL0_POWERUP(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POWERUP_SHIFT)) & AUDIO_PLL_CTRL0_POWERUP_MASK)
 
#define AUDIO_PLL_CTRL0_ENABLE_MASK   (0x8000U)
 
#define AUDIO_PLL_CTRL0_ENABLE_SHIFT   (15U)
 
#define AUDIO_PLL_CTRL0_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_MASK)
 
#define AUDIO_PLL_CTRL0_BYPASS_MASK   (0x10000U)
 
#define AUDIO_PLL_CTRL0_BYPASS_SHIFT   (16U)
 
#define AUDIO_PLL_CTRL0_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BYPASS_SHIFT)) & AUDIO_PLL_CTRL0_BYPASS_MASK)
 
#define AUDIO_PLL_CTRL0_DITHER_EN_MASK   (0x20000U)
 
#define AUDIO_PLL_CTRL0_DITHER_EN_SHIFT   (17U)
 
#define AUDIO_PLL_CTRL0_DITHER_EN(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DITHER_EN_SHIFT)) & AUDIO_PLL_CTRL0_DITHER_EN_MASK)
 
#define AUDIO_PLL_CTRL0_BIAS_TRIM_MASK   (0x380000U)
 
#define AUDIO_PLL_CTRL0_BIAS_TRIM_SHIFT   (19U)
 
#define AUDIO_PLL_CTRL0_BIAS_TRIM(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_TRIM_MASK)
 
#define AUDIO_PLL_CTRL0_PLL_REG_EN_MASK   (0x400000U)
 
#define AUDIO_PLL_CTRL0_PLL_REG_EN_SHIFT   (22U)
 
#define AUDIO_PLL_CTRL0_PLL_REG_EN(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & AUDIO_PLL_CTRL0_PLL_REG_EN_MASK)
 
#define AUDIO_PLL_CTRL0_POST_DIV_SEL_MASK   (0xE000000U)
 
#define AUDIO_PLL_CTRL0_POST_DIV_SEL_SHIFT   (25U)
 
#define AUDIO_PLL_CTRL0_POST_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & AUDIO_PLL_CTRL0_POST_DIV_SEL_MASK)
 
#define AUDIO_PLL_CTRL0_BIAS_SELECT_MASK   (0x20000000U)
 
#define AUDIO_PLL_CTRL0_BIAS_SELECT_SHIFT   (29U)
 
#define AUDIO_PLL_CTRL0_BIAS_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_SELECT_MASK)
 
#define ETHERNET_PLL_CTRL0_DIV_SELECT_MASK   (0x7FU)
 
#define ETHERNET_PLL_CTRL0_DIV_SELECT_SHIFT   (0U)
 
#define ETHERNET_PLL_CTRL0_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DIV_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_DIV_SELECT_MASK)
 
#define ETHERNET_PLL_CTRL0_ENABLE_ALT_MASK   (0x100U)
 
#define ETHERNET_PLL_CTRL0_ENABLE_ALT_SHIFT   (8U)
 
#define ETHERNET_PLL_CTRL0_ENABLE_ALT(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_ALT_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_ALT_MASK)
 
#define ETHERNET_PLL_CTRL0_HOLD_RING_OFF_MASK   (0x2000U)
 
#define ETHERNET_PLL_CTRL0_HOLD_RING_OFF_SHIFT   (13U)
 
#define ETHERNET_PLL_CTRL0_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & ETHERNET_PLL_CTRL0_HOLD_RING_OFF_MASK)
 
#define ETHERNET_PLL_CTRL0_POWERUP_MASK   (0x4000U)
 
#define ETHERNET_PLL_CTRL0_POWERUP_SHIFT   (14U)
 
#define ETHERNET_PLL_CTRL0_POWERUP(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POWERUP_SHIFT)) & ETHERNET_PLL_CTRL0_POWERUP_MASK)
 
#define ETHERNET_PLL_CTRL0_ENABLE_MASK   (0x8000U)
 
#define ETHERNET_PLL_CTRL0_ENABLE_SHIFT   (15U)
 
#define ETHERNET_PLL_CTRL0_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_MASK)
 
#define ETHERNET_PLL_CTRL0_BYPASS_MASK   (0x10000U)
 
#define ETHERNET_PLL_CTRL0_BYPASS_SHIFT   (16U)
 
#define ETHERNET_PLL_CTRL0_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BYPASS_SHIFT)) & ETHERNET_PLL_CTRL0_BYPASS_MASK)
 
#define ETHERNET_PLL_CTRL0_DITHER_EN_MASK   (0x20000U)
 
#define ETHERNET_PLL_CTRL0_DITHER_EN_SHIFT   (17U)
 
#define ETHERNET_PLL_CTRL0_DITHER_EN(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DITHER_EN_SHIFT)) & ETHERNET_PLL_CTRL0_DITHER_EN_MASK)
 
#define ETHERNET_PLL_CTRL0_BIAS_TRIM_MASK   (0x380000U)
 
#define ETHERNET_PLL_CTRL0_BIAS_TRIM_SHIFT   (19U)
 
#define ETHERNET_PLL_CTRL0_BIAS_TRIM(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_TRIM_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_TRIM_MASK)
 
#define ETHERNET_PLL_CTRL0_PLL_REG_EN_MASK   (0x400000U)
 
#define ETHERNET_PLL_CTRL0_PLL_REG_EN_SHIFT   (22U)
 
#define ETHERNET_PLL_CTRL0_PLL_REG_EN(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_PLL_REG_EN_SHIFT)) & ETHERNET_PLL_CTRL0_PLL_REG_EN_MASK)
 
#define ETHERNET_PLL_CTRL0_POST_DIV_SEL_MASK   (0xE000000U)
 
#define ETHERNET_PLL_CTRL0_POST_DIV_SEL_SHIFT   (25U)
 
#define ETHERNET_PLL_CTRL0_POST_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & ETHERNET_PLL_CTRL0_POST_DIV_SEL_MASK)
 
#define ETHERNET_PLL_CTRL0_BIAS_SELECT_MASK   (0x20000000U)
 
#define ETHERNET_PLL_CTRL0_BIAS_SELECT_SHIFT   (29U)
 
#define ETHERNET_PLL_CTRL0_BIAS_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_SELECT_MASK)
 
#define VIDEO_PLL_CTRL0_DIV_SELECT_MASK   (0x7FU)
 
#define VIDEO_PLL_CTRL0_DIV_SELECT_SHIFT   (0U)
 
#define VIDEO_PLL_CTRL0_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DIV_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_DIV_SELECT_MASK)
 
#define VIDEO_PLL_CTRL0_ENABLE_ALT_MASK   (0x100U)
 
#define VIDEO_PLL_CTRL0_ENABLE_ALT_SHIFT   (8U)
 
#define VIDEO_PLL_CTRL0_ENABLE_ALT(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_ALT_MASK)
 
#define VIDEO_PLL_CTRL0_HOLD_RING_OFF_MASK   (0x2000U)
 
#define VIDEO_PLL_CTRL0_HOLD_RING_OFF_SHIFT   (13U)
 
#define VIDEO_PLL_CTRL0_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & VIDEO_PLL_CTRL0_HOLD_RING_OFF_MASK)
 
#define VIDEO_PLL_CTRL0_POWERUP_MASK   (0x4000U)
 
#define VIDEO_PLL_CTRL0_POWERUP_SHIFT   (14U)
 
#define VIDEO_PLL_CTRL0_POWERUP(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POWERUP_SHIFT)) & VIDEO_PLL_CTRL0_POWERUP_MASK)
 
#define VIDEO_PLL_CTRL0_ENABLE_MASK   (0x8000U)
 
#define VIDEO_PLL_CTRL0_ENABLE_SHIFT   (15U)
 
#define VIDEO_PLL_CTRL0_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_MASK)
 
#define VIDEO_PLL_CTRL0_BYPASS_MASK   (0x10000U)
 
#define VIDEO_PLL_CTRL0_BYPASS_SHIFT   (16U)
 
#define VIDEO_PLL_CTRL0_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BYPASS_SHIFT)) & VIDEO_PLL_CTRL0_BYPASS_MASK)
 
#define VIDEO_PLL_CTRL0_DITHER_EN_MASK   (0x20000U)
 
#define VIDEO_PLL_CTRL0_DITHER_EN_SHIFT   (17U)
 
#define VIDEO_PLL_CTRL0_DITHER_EN(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DITHER_EN_SHIFT)) & VIDEO_PLL_CTRL0_DITHER_EN_MASK)
 
#define VIDEO_PLL_CTRL0_BIAS_TRIM_MASK   (0x380000U)
 
#define VIDEO_PLL_CTRL0_BIAS_TRIM_SHIFT   (19U)
 
#define VIDEO_PLL_CTRL0_BIAS_TRIM(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_TRIM_MASK)
 
#define VIDEO_PLL_CTRL0_PLL_REG_EN_MASK   (0x400000U)
 
#define VIDEO_PLL_CTRL0_PLL_REG_EN_SHIFT   (22U)
 
#define VIDEO_PLL_CTRL0_PLL_REG_EN(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & VIDEO_PLL_CTRL0_PLL_REG_EN_MASK)
 
#define VIDEO_PLL_CTRL0_POST_DIV_SEL_MASK   (0xE000000U)
 
#define VIDEO_PLL_CTRL0_POST_DIV_SEL_SHIFT   (25U)
 
#define VIDEO_PLL_CTRL0_POST_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & VIDEO_PLL_CTRL0_POST_DIV_SEL_MASK)
 
#define VIDEO_PLL_CTRL0_BIAS_SELECT_MASK   (0x20000000U)
 
#define VIDEO_PLL_CTRL0_BIAS_SELECT_SHIFT   (29U)
 
#define VIDEO_PLL_CTRL0_BIAS_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_SELECT_MASK)
 

SPREAD_SPECTRUM - Fractional PLL Spread Spectrum Control Register

#define AUDIO_PLL_SPREAD_SPECTRUM_STEP_MASK   (0x7FFFU)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_STEP_SHIFT   (0U)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_STEP(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STEP_MASK)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_MASK   (0x8000U)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT   (15U)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_MASK)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_STOP_MASK   (0xFFFF0000U)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_STOP_SHIFT   (16U)
 
#define AUDIO_PLL_SPREAD_SPECTRUM_STOP(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STOP_MASK)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_STEP_MASK   (0x7FFFU)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_STEP_SHIFT   (0U)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_STEP(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STEP_MASK)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_MASK   (0x8000U)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT   (15U)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_MASK)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_STOP_MASK   (0xFFFF0000U)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_STOP_SHIFT   (16U)
 
#define ETHERNET_PLL_SPREAD_SPECTRUM_STOP(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STOP_MASK)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_STEP_MASK   (0x7FFFU)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_STEP_SHIFT   (0U)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_STEP(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STEP_MASK)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_MASK   (0x8000U)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT   (15U)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_MASK)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_STOP_MASK   (0xFFFF0000U)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_STOP_SHIFT   (16U)
 
#define VIDEO_PLL_SPREAD_SPECTRUM_STOP(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STOP_MASK)
 

NUMERATOR - Fractional PLL Numerator Control Register

#define AUDIO_PLL_NUMERATOR_NUM_MASK   (0x3FFFFFFFU)
 
#define AUDIO_PLL_NUMERATOR_NUM_SHIFT   (0U)
 
#define AUDIO_PLL_NUMERATOR_NUM(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_NUMERATOR_NUM_SHIFT)) & AUDIO_PLL_NUMERATOR_NUM_MASK)
 
#define ETHERNET_PLL_NUMERATOR_NUM_MASK   (0x3FFFFFFFU)
 
#define ETHERNET_PLL_NUMERATOR_NUM_SHIFT   (0U)
 
#define ETHERNET_PLL_NUMERATOR_NUM(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_NUMERATOR_NUM_SHIFT)) & ETHERNET_PLL_NUMERATOR_NUM_MASK)
 
#define VIDEO_PLL_NUMERATOR_NUM_MASK   (0x3FFFFFFFU)
 
#define VIDEO_PLL_NUMERATOR_NUM_SHIFT   (0U)
 
#define VIDEO_PLL_NUMERATOR_NUM(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_NUMERATOR_NUM_SHIFT)) & VIDEO_PLL_NUMERATOR_NUM_MASK)
 

DENOMINATOR - Fractional PLL Denominator Control Register

#define AUDIO_PLL_DENOMINATOR_DENOM_MASK   (0x3FFFFFFFU)
 
#define AUDIO_PLL_DENOMINATOR_DENOM_SHIFT   (0U)
 
#define AUDIO_PLL_DENOMINATOR_DENOM(x)   (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_DENOMINATOR_DENOM_SHIFT)) & AUDIO_PLL_DENOMINATOR_DENOM_MASK)
 
#define ETHERNET_PLL_DENOMINATOR_DENOM_MASK   (0x3FFFFFFFU)
 
#define ETHERNET_PLL_DENOMINATOR_DENOM_SHIFT   (0U)
 
#define ETHERNET_PLL_DENOMINATOR_DENOM(x)   (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_DENOMINATOR_DENOM_SHIFT)) & ETHERNET_PLL_DENOMINATOR_DENOM_MASK)
 
#define VIDEO_PLL_DENOMINATOR_DENOM_MASK   (0x3FFFFFFFU)
 
#define VIDEO_PLL_DENOMINATOR_DENOM_SHIFT   (0U)
 
#define VIDEO_PLL_DENOMINATOR_DENOM(x)   (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_DENOMINATOR_DENOM_SHIFT)) & VIDEO_PLL_DENOMINATOR_DENOM_MASK)
 

Detailed Description

Macro Definition Documentation

◆ AUDIO_PLL_CTRL0_BIAS_SELECT [1/2]

#define AUDIO_PLL_CTRL0_BIAS_SELECT (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_SELECT_MASK)

BIAS_SELECT - BIAS_SELECT 0b0..Used in SoCs with a bias current of 10uA 0b1..Used in SoCs with a bias current of 2uA

◆ AUDIO_PLL_CTRL0_BIAS_SELECT [2/2]

#define AUDIO_PLL_CTRL0_BIAS_SELECT (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_SELECT_MASK)

BIAS_SELECT - BIAS_SELECT 0b0..Used in SoCs with a bias current of 10uA 0b1..Used in SoCs with a bias current of 2uA

◆ AUDIO_PLL_CTRL0_BIAS_TRIM [1/2]

#define AUDIO_PLL_CTRL0_BIAS_TRIM (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_TRIM_MASK)

BIAS_TRIM - BIAS_TRIM

◆ AUDIO_PLL_CTRL0_BIAS_TRIM [2/2]

#define AUDIO_PLL_CTRL0_BIAS_TRIM (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_TRIM_MASK)

BIAS_TRIM - BIAS_TRIM

◆ AUDIO_PLL_CTRL0_BYPASS [1/2]

#define AUDIO_PLL_CTRL0_BYPASS (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BYPASS_SHIFT)) & AUDIO_PLL_CTRL0_BYPASS_MASK)

BYPASS - BYPASS 0b1..Bypass the PLL 0b0..No Bypass

◆ AUDIO_PLL_CTRL0_BYPASS [2/2]

#define AUDIO_PLL_CTRL0_BYPASS (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BYPASS_SHIFT)) & AUDIO_PLL_CTRL0_BYPASS_MASK)

BYPASS - BYPASS 0b1..Bypass the PLL 0b0..No Bypass

◆ AUDIO_PLL_CTRL0_DITHER_EN [1/2]

#define AUDIO_PLL_CTRL0_DITHER_EN (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DITHER_EN_SHIFT)) & AUDIO_PLL_CTRL0_DITHER_EN_MASK)

DITHER_EN - DITHER_EN 0b0..Disable Dither 0b1..Enable Dither

◆ AUDIO_PLL_CTRL0_DITHER_EN [2/2]

#define AUDIO_PLL_CTRL0_DITHER_EN (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DITHER_EN_SHIFT)) & AUDIO_PLL_CTRL0_DITHER_EN_MASK)

DITHER_EN - DITHER_EN 0b0..Disable Dither 0b1..Enable Dither

◆ AUDIO_PLL_CTRL0_DIV_SELECT [1/2]

#define AUDIO_PLL_CTRL0_DIV_SELECT (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DIV_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_DIV_SELECT_MASK)

DIV_SELECT - DIV_SELECT

◆ AUDIO_PLL_CTRL0_DIV_SELECT [2/2]

#define AUDIO_PLL_CTRL0_DIV_SELECT (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DIV_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_DIV_SELECT_MASK)

DIV_SELECT - DIV_SELECT

◆ AUDIO_PLL_CTRL0_ENABLE [1/2]

#define AUDIO_PLL_CTRL0_ENABLE (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_MASK)

ENABLE - ENABLE 0b1..Enable the clock output 0b0..Disable the clock output

◆ AUDIO_PLL_CTRL0_ENABLE [2/2]

#define AUDIO_PLL_CTRL0_ENABLE (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_MASK)

ENABLE - ENABLE 0b1..Enable the clock output 0b0..Disable the clock output

◆ AUDIO_PLL_CTRL0_ENABLE_ALT [1/2]

#define AUDIO_PLL_CTRL0_ENABLE_ALT (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_ALT_MASK)

ENABLE_ALT - ENABLE_ALT 0b0..Disable the alternate clock output 0b1..Enable the alternate clock output which is the output of the post_divider, and cannot be bypassed

◆ AUDIO_PLL_CTRL0_ENABLE_ALT [2/2]

#define AUDIO_PLL_CTRL0_ENABLE_ALT (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_ALT_MASK)

ENABLE_ALT - ENABLE_ALT 0b0..Disable the alternate clock output 0b1..Enable the alternate clock output which is the output of the post_divider, and cannot be bypassed

◆ AUDIO_PLL_CTRL0_HOLD_RING_OFF [1/2]

#define AUDIO_PLL_CTRL0_HOLD_RING_OFF (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & AUDIO_PLL_CTRL0_HOLD_RING_OFF_MASK)

HOLD_RING_OFF - PLL Start up initialization 0b0..Normal operation 0b1..Initialize PLL start up

◆ AUDIO_PLL_CTRL0_HOLD_RING_OFF [2/2]

#define AUDIO_PLL_CTRL0_HOLD_RING_OFF (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & AUDIO_PLL_CTRL0_HOLD_RING_OFF_MASK)

HOLD_RING_OFF - PLL Start up initialization 0b0..Normal operation 0b1..Initialize PLL start up

◆ AUDIO_PLL_CTRL0_PLL_REG_EN [1/2]

#define AUDIO_PLL_CTRL0_PLL_REG_EN (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & AUDIO_PLL_CTRL0_PLL_REG_EN_MASK)

PLL_REG_EN - PLL_REG_EN

◆ AUDIO_PLL_CTRL0_PLL_REG_EN [2/2]

#define AUDIO_PLL_CTRL0_PLL_REG_EN (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & AUDIO_PLL_CTRL0_PLL_REG_EN_MASK)

PLL_REG_EN - PLL_REG_EN

◆ AUDIO_PLL_CTRL0_POST_DIV_SEL [1/2]

#define AUDIO_PLL_CTRL0_POST_DIV_SEL (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & AUDIO_PLL_CTRL0_POST_DIV_SEL_MASK)

POST_DIV_SEL - Post Divide Select 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 4 0b011..Divide by 8 0b100..Divide by 16 0b101..Divide by 32

◆ AUDIO_PLL_CTRL0_POST_DIV_SEL [2/2]

#define AUDIO_PLL_CTRL0_POST_DIV_SEL (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & AUDIO_PLL_CTRL0_POST_DIV_SEL_MASK)

POST_DIV_SEL - Post Divide Select 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 4 0b011..Divide by 8 0b100..Divide by 16 0b101..Divide by 32

◆ AUDIO_PLL_CTRL0_POWERUP [1/2]

#define AUDIO_PLL_CTRL0_POWERUP (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POWERUP_SHIFT)) & AUDIO_PLL_CTRL0_POWERUP_MASK)

POWERUP - POWERUP 0b1..Power Up the PLL 0b0..Power down the PLL

◆ AUDIO_PLL_CTRL0_POWERUP [2/2]

#define AUDIO_PLL_CTRL0_POWERUP (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POWERUP_SHIFT)) & AUDIO_PLL_CTRL0_POWERUP_MASK)

POWERUP - POWERUP 0b1..Power Up the PLL 0b0..Power down the PLL

◆ AUDIO_PLL_DENOMINATOR_DENOM [1/2]

#define AUDIO_PLL_DENOMINATOR_DENOM (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_DENOMINATOR_DENOM_SHIFT)) & AUDIO_PLL_DENOMINATOR_DENOM_MASK)

DENOM - Denominator

◆ AUDIO_PLL_DENOMINATOR_DENOM [2/2]

#define AUDIO_PLL_DENOMINATOR_DENOM (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_DENOMINATOR_DENOM_SHIFT)) & AUDIO_PLL_DENOMINATOR_DENOM_MASK)

DENOM - Denominator

◆ AUDIO_PLL_NUMERATOR_NUM [1/2]

#define AUDIO_PLL_NUMERATOR_NUM (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_NUMERATOR_NUM_SHIFT)) & AUDIO_PLL_NUMERATOR_NUM_MASK)

NUM - Numerator

◆ AUDIO_PLL_NUMERATOR_NUM [2/2]

#define AUDIO_PLL_NUMERATOR_NUM (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_NUMERATOR_NUM_SHIFT)) & AUDIO_PLL_NUMERATOR_NUM_MASK)

NUM - Numerator

◆ AUDIO_PLL_SPREAD_SPECTRUM_ENABLE [1/2]

#define AUDIO_PLL_SPREAD_SPECTRUM_ENABLE (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_MASK)

ENABLE - Enable

◆ AUDIO_PLL_SPREAD_SPECTRUM_ENABLE [2/2]

#define AUDIO_PLL_SPREAD_SPECTRUM_ENABLE (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_MASK)

ENABLE - Enable

◆ AUDIO_PLL_SPREAD_SPECTRUM_STEP [1/2]

#define AUDIO_PLL_SPREAD_SPECTRUM_STEP (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STEP_MASK)

STEP - Step

◆ AUDIO_PLL_SPREAD_SPECTRUM_STEP [2/2]

#define AUDIO_PLL_SPREAD_SPECTRUM_STEP (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STEP_MASK)

STEP - Step

◆ AUDIO_PLL_SPREAD_SPECTRUM_STOP [1/2]

#define AUDIO_PLL_SPREAD_SPECTRUM_STOP (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STOP_MASK)

STOP - Stop

◆ AUDIO_PLL_SPREAD_SPECTRUM_STOP [2/2]

#define AUDIO_PLL_SPREAD_SPECTRUM_STOP (   x)    (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STOP_MASK)

STOP - Stop

◆ ETHERNET_PLL_CTRL0_BIAS_SELECT [1/2]

#define ETHERNET_PLL_CTRL0_BIAS_SELECT (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_SELECT_MASK)

BIAS_SELECT - BIAS_SELECT 0b0..Used in SoCs with a bias current of 10uA 0b1..Used in SoCs with a bias current of 2uA

◆ ETHERNET_PLL_CTRL0_BIAS_SELECT [2/2]

#define ETHERNET_PLL_CTRL0_BIAS_SELECT (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_SELECT_MASK)

BIAS_SELECT - BIAS_SELECT 0b0..Used in SoCs with a bias current of 10uA 0b1..Used in SoCs with a bias current of 2uA

◆ ETHERNET_PLL_CTRL0_BIAS_TRIM [1/2]

#define ETHERNET_PLL_CTRL0_BIAS_TRIM (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_TRIM_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_TRIM_MASK)

BIAS_TRIM - BIAS_TRIM

◆ ETHERNET_PLL_CTRL0_BIAS_TRIM [2/2]

#define ETHERNET_PLL_CTRL0_BIAS_TRIM (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_TRIM_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_TRIM_MASK)

BIAS_TRIM - BIAS_TRIM

◆ ETHERNET_PLL_CTRL0_BYPASS [1/2]

#define ETHERNET_PLL_CTRL0_BYPASS (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BYPASS_SHIFT)) & ETHERNET_PLL_CTRL0_BYPASS_MASK)

BYPASS - BYPASS 0b1..Bypass the PLL 0b0..No Bypass

◆ ETHERNET_PLL_CTRL0_BYPASS [2/2]

#define ETHERNET_PLL_CTRL0_BYPASS (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BYPASS_SHIFT)) & ETHERNET_PLL_CTRL0_BYPASS_MASK)

BYPASS - BYPASS 0b1..Bypass the PLL 0b0..No Bypass

◆ ETHERNET_PLL_CTRL0_DITHER_EN [1/2]

#define ETHERNET_PLL_CTRL0_DITHER_EN (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DITHER_EN_SHIFT)) & ETHERNET_PLL_CTRL0_DITHER_EN_MASK)

DITHER_EN - DITHER_EN 0b0..Disable Dither 0b1..Enable Dither

◆ ETHERNET_PLL_CTRL0_DITHER_EN [2/2]

#define ETHERNET_PLL_CTRL0_DITHER_EN (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DITHER_EN_SHIFT)) & ETHERNET_PLL_CTRL0_DITHER_EN_MASK)

DITHER_EN - DITHER_EN 0b0..Disable Dither 0b1..Enable Dither

◆ ETHERNET_PLL_CTRL0_DIV_SELECT [1/2]

#define ETHERNET_PLL_CTRL0_DIV_SELECT (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DIV_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_DIV_SELECT_MASK)

DIV_SELECT - DIV_SELECT

◆ ETHERNET_PLL_CTRL0_DIV_SELECT [2/2]

#define ETHERNET_PLL_CTRL0_DIV_SELECT (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DIV_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_DIV_SELECT_MASK)

DIV_SELECT - DIV_SELECT

◆ ETHERNET_PLL_CTRL0_ENABLE [1/2]

#define ETHERNET_PLL_CTRL0_ENABLE (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_MASK)

ENABLE - ENABLE 0b1..Enable the clock output 0b0..Disable the clock output

◆ ETHERNET_PLL_CTRL0_ENABLE [2/2]

#define ETHERNET_PLL_CTRL0_ENABLE (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_MASK)

ENABLE - ENABLE 0b1..Enable the clock output 0b0..Disable the clock output

◆ ETHERNET_PLL_CTRL0_ENABLE_ALT [1/2]

#define ETHERNET_PLL_CTRL0_ENABLE_ALT (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_ALT_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_ALT_MASK)

ENABLE_ALT - ENABLE_ALT 0b0..Disable the alternate clock output 0b1..Enable the alternate clock output which is the output of the post_divider, and cannot be bypassed

◆ ETHERNET_PLL_CTRL0_ENABLE_ALT [2/2]

#define ETHERNET_PLL_CTRL0_ENABLE_ALT (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_ALT_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_ALT_MASK)

ENABLE_ALT - ENABLE_ALT 0b0..Disable the alternate clock output 0b1..Enable the alternate clock output which is the output of the post_divider, and cannot be bypassed

◆ ETHERNET_PLL_CTRL0_HOLD_RING_OFF [1/2]

#define ETHERNET_PLL_CTRL0_HOLD_RING_OFF (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & ETHERNET_PLL_CTRL0_HOLD_RING_OFF_MASK)

HOLD_RING_OFF - PLL Start up initialization 0b0..Normal operation 0b1..Initialize PLL start up

◆ ETHERNET_PLL_CTRL0_HOLD_RING_OFF [2/2]

#define ETHERNET_PLL_CTRL0_HOLD_RING_OFF (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & ETHERNET_PLL_CTRL0_HOLD_RING_OFF_MASK)

HOLD_RING_OFF - PLL Start up initialization 0b0..Normal operation 0b1..Initialize PLL start up

◆ ETHERNET_PLL_CTRL0_PLL_REG_EN [1/2]

#define ETHERNET_PLL_CTRL0_PLL_REG_EN (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_PLL_REG_EN_SHIFT)) & ETHERNET_PLL_CTRL0_PLL_REG_EN_MASK)

PLL_REG_EN - PLL_REG_EN

◆ ETHERNET_PLL_CTRL0_PLL_REG_EN [2/2]

#define ETHERNET_PLL_CTRL0_PLL_REG_EN (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_PLL_REG_EN_SHIFT)) & ETHERNET_PLL_CTRL0_PLL_REG_EN_MASK)

PLL_REG_EN - PLL_REG_EN

◆ ETHERNET_PLL_CTRL0_POST_DIV_SEL [1/2]

#define ETHERNET_PLL_CTRL0_POST_DIV_SEL (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & ETHERNET_PLL_CTRL0_POST_DIV_SEL_MASK)

POST_DIV_SEL - Post Divide Select 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 4 0b011..Divide by 8 0b100..Divide by 16 0b101..Divide by 32

◆ ETHERNET_PLL_CTRL0_POST_DIV_SEL [2/2]

#define ETHERNET_PLL_CTRL0_POST_DIV_SEL (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & ETHERNET_PLL_CTRL0_POST_DIV_SEL_MASK)

POST_DIV_SEL - Post Divide Select 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 4 0b011..Divide by 8 0b100..Divide by 16 0b101..Divide by 32

◆ ETHERNET_PLL_CTRL0_POWERUP [1/2]

#define ETHERNET_PLL_CTRL0_POWERUP (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POWERUP_SHIFT)) & ETHERNET_PLL_CTRL0_POWERUP_MASK)

POWERUP - POWERUP 0b1..Power Up the PLL 0b0..Power down the PLL

◆ ETHERNET_PLL_CTRL0_POWERUP [2/2]

#define ETHERNET_PLL_CTRL0_POWERUP (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POWERUP_SHIFT)) & ETHERNET_PLL_CTRL0_POWERUP_MASK)

POWERUP - POWERUP 0b1..Power Up the PLL 0b0..Power down the PLL

◆ ETHERNET_PLL_DENOMINATOR_DENOM [1/2]

#define ETHERNET_PLL_DENOMINATOR_DENOM (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_DENOMINATOR_DENOM_SHIFT)) & ETHERNET_PLL_DENOMINATOR_DENOM_MASK)

DENOM - Denominator

◆ ETHERNET_PLL_DENOMINATOR_DENOM [2/2]

#define ETHERNET_PLL_DENOMINATOR_DENOM (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_DENOMINATOR_DENOM_SHIFT)) & ETHERNET_PLL_DENOMINATOR_DENOM_MASK)

DENOM - Denominator

◆ ETHERNET_PLL_NUMERATOR_NUM [1/2]

#define ETHERNET_PLL_NUMERATOR_NUM (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_NUMERATOR_NUM_SHIFT)) & ETHERNET_PLL_NUMERATOR_NUM_MASK)

NUM - Numerator

◆ ETHERNET_PLL_NUMERATOR_NUM [2/2]

#define ETHERNET_PLL_NUMERATOR_NUM (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_NUMERATOR_NUM_SHIFT)) & ETHERNET_PLL_NUMERATOR_NUM_MASK)

NUM - Numerator

◆ ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE [1/2]

#define ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_MASK)

ENABLE - Enable

◆ ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE [2/2]

#define ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_MASK)

ENABLE - Enable

◆ ETHERNET_PLL_SPREAD_SPECTRUM_STEP [1/2]

#define ETHERNET_PLL_SPREAD_SPECTRUM_STEP (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STEP_MASK)

STEP - Step

◆ ETHERNET_PLL_SPREAD_SPECTRUM_STEP [2/2]

#define ETHERNET_PLL_SPREAD_SPECTRUM_STEP (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STEP_MASK)

STEP - Step

◆ ETHERNET_PLL_SPREAD_SPECTRUM_STOP [1/2]

#define ETHERNET_PLL_SPREAD_SPECTRUM_STOP (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STOP_MASK)

STOP - Stop

◆ ETHERNET_PLL_SPREAD_SPECTRUM_STOP [2/2]

#define ETHERNET_PLL_SPREAD_SPECTRUM_STOP (   x)    (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STOP_MASK)

STOP - Stop

◆ VIDEO_PLL_CTRL0_BIAS_SELECT [1/2]

#define VIDEO_PLL_CTRL0_BIAS_SELECT (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_SELECT_MASK)

BIAS_SELECT - BIAS_SELECT 0b0..Used in SoCs with a bias current of 10uA 0b1..Used in SoCs with a bias current of 2uA

◆ VIDEO_PLL_CTRL0_BIAS_SELECT [2/2]

#define VIDEO_PLL_CTRL0_BIAS_SELECT (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_SELECT_MASK)

BIAS_SELECT - BIAS_SELECT 0b0..Used in SoCs with a bias current of 10uA 0b1..Used in SoCs with a bias current of 2uA

◆ VIDEO_PLL_CTRL0_BIAS_TRIM [1/2]

#define VIDEO_PLL_CTRL0_BIAS_TRIM (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_TRIM_MASK)

BIAS_TRIM - BIAS_TRIM

◆ VIDEO_PLL_CTRL0_BIAS_TRIM [2/2]

#define VIDEO_PLL_CTRL0_BIAS_TRIM (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_TRIM_MASK)

BIAS_TRIM - BIAS_TRIM

◆ VIDEO_PLL_CTRL0_BYPASS [1/2]

#define VIDEO_PLL_CTRL0_BYPASS (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BYPASS_SHIFT)) & VIDEO_PLL_CTRL0_BYPASS_MASK)

BYPASS - BYPASS 0b1..Bypass the PLL 0b0..No Bypass

◆ VIDEO_PLL_CTRL0_BYPASS [2/2]

#define VIDEO_PLL_CTRL0_BYPASS (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BYPASS_SHIFT)) & VIDEO_PLL_CTRL0_BYPASS_MASK)

BYPASS - BYPASS 0b1..Bypass the PLL 0b0..No Bypass

◆ VIDEO_PLL_CTRL0_DITHER_EN [1/2]

#define VIDEO_PLL_CTRL0_DITHER_EN (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DITHER_EN_SHIFT)) & VIDEO_PLL_CTRL0_DITHER_EN_MASK)

DITHER_EN - DITHER_EN 0b0..Disable Dither 0b1..Enable Dither

◆ VIDEO_PLL_CTRL0_DITHER_EN [2/2]

#define VIDEO_PLL_CTRL0_DITHER_EN (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DITHER_EN_SHIFT)) & VIDEO_PLL_CTRL0_DITHER_EN_MASK)

DITHER_EN - DITHER_EN 0b0..Disable Dither 0b1..Enable Dither

◆ VIDEO_PLL_CTRL0_DIV_SELECT [1/2]

#define VIDEO_PLL_CTRL0_DIV_SELECT (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DIV_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_DIV_SELECT_MASK)

DIV_SELECT - DIV_SELECT

◆ VIDEO_PLL_CTRL0_DIV_SELECT [2/2]

#define VIDEO_PLL_CTRL0_DIV_SELECT (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DIV_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_DIV_SELECT_MASK)

DIV_SELECT - DIV_SELECT

◆ VIDEO_PLL_CTRL0_ENABLE [1/2]

#define VIDEO_PLL_CTRL0_ENABLE (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_MASK)

ENABLE - ENABLE 0b1..Enable the clock output 0b0..Disable the clock output

◆ VIDEO_PLL_CTRL0_ENABLE [2/2]

#define VIDEO_PLL_CTRL0_ENABLE (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_MASK)

ENABLE - ENABLE 0b1..Enable the clock output 0b0..Disable the clock output

◆ VIDEO_PLL_CTRL0_ENABLE_ALT [1/2]

#define VIDEO_PLL_CTRL0_ENABLE_ALT (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_ALT_MASK)

ENABLE_ALT - ENABLE_ALT 0b0..Disable the alternate clock output 0b1..Enable the alternate clock output which is the output of the post_divider, and cannot be bypassed

◆ VIDEO_PLL_CTRL0_ENABLE_ALT [2/2]

#define VIDEO_PLL_CTRL0_ENABLE_ALT (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_ALT_MASK)

ENABLE_ALT - ENABLE_ALT 0b0..Disable the alternate clock output 0b1..Enable the alternate clock output which is the output of the post_divider, and cannot be bypassed

◆ VIDEO_PLL_CTRL0_HOLD_RING_OFF [1/2]

#define VIDEO_PLL_CTRL0_HOLD_RING_OFF (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & VIDEO_PLL_CTRL0_HOLD_RING_OFF_MASK)

HOLD_RING_OFF - PLL Start up initialization 0b0..Normal operation 0b1..Initialize PLL start up

◆ VIDEO_PLL_CTRL0_HOLD_RING_OFF [2/2]

#define VIDEO_PLL_CTRL0_HOLD_RING_OFF (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & VIDEO_PLL_CTRL0_HOLD_RING_OFF_MASK)

HOLD_RING_OFF - PLL Start up initialization 0b0..Normal operation 0b1..Initialize PLL start up

◆ VIDEO_PLL_CTRL0_PLL_REG_EN [1/2]

#define VIDEO_PLL_CTRL0_PLL_REG_EN (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & VIDEO_PLL_CTRL0_PLL_REG_EN_MASK)

PLL_REG_EN - PLL_REG_EN

◆ VIDEO_PLL_CTRL0_PLL_REG_EN [2/2]

#define VIDEO_PLL_CTRL0_PLL_REG_EN (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & VIDEO_PLL_CTRL0_PLL_REG_EN_MASK)

PLL_REG_EN - PLL_REG_EN

◆ VIDEO_PLL_CTRL0_POST_DIV_SEL [1/2]

#define VIDEO_PLL_CTRL0_POST_DIV_SEL (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & VIDEO_PLL_CTRL0_POST_DIV_SEL_MASK)

POST_DIV_SEL - Post Divide Select 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 4 0b011..Divide by 8 0b100..Divide by 16 0b101..Divide by 32

◆ VIDEO_PLL_CTRL0_POST_DIV_SEL [2/2]

#define VIDEO_PLL_CTRL0_POST_DIV_SEL (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & VIDEO_PLL_CTRL0_POST_DIV_SEL_MASK)

POST_DIV_SEL - Post Divide Select 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 4 0b011..Divide by 8 0b100..Divide by 16 0b101..Divide by 32

◆ VIDEO_PLL_CTRL0_POWERUP [1/2]

#define VIDEO_PLL_CTRL0_POWERUP (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POWERUP_SHIFT)) & VIDEO_PLL_CTRL0_POWERUP_MASK)

POWERUP - POWERUP 0b1..Power Up the PLL 0b0..Power down the PLL

◆ VIDEO_PLL_CTRL0_POWERUP [2/2]

#define VIDEO_PLL_CTRL0_POWERUP (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POWERUP_SHIFT)) & VIDEO_PLL_CTRL0_POWERUP_MASK)

POWERUP - POWERUP 0b1..Power Up the PLL 0b0..Power down the PLL

◆ VIDEO_PLL_DENOMINATOR_DENOM [1/2]

#define VIDEO_PLL_DENOMINATOR_DENOM (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_DENOMINATOR_DENOM_SHIFT)) & VIDEO_PLL_DENOMINATOR_DENOM_MASK)

DENOM - Denominator

◆ VIDEO_PLL_DENOMINATOR_DENOM [2/2]

#define VIDEO_PLL_DENOMINATOR_DENOM (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_DENOMINATOR_DENOM_SHIFT)) & VIDEO_PLL_DENOMINATOR_DENOM_MASK)

DENOM - Denominator

◆ VIDEO_PLL_NUMERATOR_NUM [1/2]

#define VIDEO_PLL_NUMERATOR_NUM (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_NUMERATOR_NUM_SHIFT)) & VIDEO_PLL_NUMERATOR_NUM_MASK)

NUM - Numerator

◆ VIDEO_PLL_NUMERATOR_NUM [2/2]

#define VIDEO_PLL_NUMERATOR_NUM (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_NUMERATOR_NUM_SHIFT)) & VIDEO_PLL_NUMERATOR_NUM_MASK)

NUM - Numerator

◆ VIDEO_PLL_SPREAD_SPECTRUM_ENABLE [1/2]

#define VIDEO_PLL_SPREAD_SPECTRUM_ENABLE (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_MASK)

ENABLE - Enable

◆ VIDEO_PLL_SPREAD_SPECTRUM_ENABLE [2/2]

#define VIDEO_PLL_SPREAD_SPECTRUM_ENABLE (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_MASK)

ENABLE - Enable

◆ VIDEO_PLL_SPREAD_SPECTRUM_STEP [1/2]

#define VIDEO_PLL_SPREAD_SPECTRUM_STEP (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STEP_MASK)

STEP - Step

◆ VIDEO_PLL_SPREAD_SPECTRUM_STEP [2/2]

#define VIDEO_PLL_SPREAD_SPECTRUM_STEP (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STEP_MASK)

STEP - Step

◆ VIDEO_PLL_SPREAD_SPECTRUM_STOP [1/2]

#define VIDEO_PLL_SPREAD_SPECTRUM_STOP (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STOP_MASK)

STOP - Stop

◆ VIDEO_PLL_SPREAD_SPECTRUM_STOP [2/2]

#define VIDEO_PLL_SPREAD_SPECTRUM_STOP (   x)    (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STOP_MASK)

STOP - Stop

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