RTEMS 6.1-rc2
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Modules | |
AIPSTZ Register Masks | |
Data Structures | |
struct | AIPSTZ_Type |
Macros | |
#define | AIPSTZ1_BASE (0x4007C000u) |
#define | AIPSTZ1 ((AIPSTZ_Type *)AIPSTZ1_BASE) |
#define | AIPSTZ2_BASE (0x4017C000u) |
#define | AIPSTZ2 ((AIPSTZ_Type *)AIPSTZ2_BASE) |
#define | AIPSTZ3_BASE (0x4027C000u) |
#define | AIPSTZ3 ((AIPSTZ_Type *)AIPSTZ3_BASE) |
#define | AIPSTZ4_BASE (0x4037C000u) |
#define | AIPSTZ4 ((AIPSTZ_Type *)AIPSTZ4_BASE) |
#define | AIPSTZ_BASE_ADDRS { 0u, AIPSTZ1_BASE, AIPSTZ2_BASE, AIPSTZ3_BASE, AIPSTZ4_BASE } |
#define | AIPSTZ_BASE_PTRS { (AIPSTZ_Type *)0u, AIPSTZ1, AIPSTZ2, AIPSTZ3, AIPSTZ4 } |
#define AIPSTZ1 ((AIPSTZ_Type *)AIPSTZ1_BASE) |
Peripheral AIPSTZ1 base pointer
#define AIPSTZ1_BASE (0x4007C000u) |
Peripheral AIPSTZ1 base address
#define AIPSTZ2 ((AIPSTZ_Type *)AIPSTZ2_BASE) |
Peripheral AIPSTZ2 base pointer
#define AIPSTZ2_BASE (0x4017C000u) |
Peripheral AIPSTZ2 base address
#define AIPSTZ3 ((AIPSTZ_Type *)AIPSTZ3_BASE) |
Peripheral AIPSTZ3 base pointer
#define AIPSTZ3_BASE (0x4027C000u) |
Peripheral AIPSTZ3 base address
#define AIPSTZ4 ((AIPSTZ_Type *)AIPSTZ4_BASE) |
Peripheral AIPSTZ4 base pointer
#define AIPSTZ4_BASE (0x4037C000u) |
Peripheral AIPSTZ4 base address
#define AIPSTZ_BASE_ADDRS { 0u, AIPSTZ1_BASE, AIPSTZ2_BASE, AIPSTZ3_BASE, AIPSTZ4_BASE } |
Array initializer of AIPSTZ peripheral base addresses
#define AIPSTZ_BASE_PTRS { (AIPSTZ_Type *)0u, AIPSTZ1, AIPSTZ2, AIPSTZ3, AIPSTZ4 } |
Array initializer of AIPSTZ peripheral base pointers