RTEMS 6.1-rc2
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fsl_lpuart.h
1/*
2 * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2022 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8#ifndef _FSL_LPUART_H_
9#define _FSL_LPUART_H_
10
11#include "fsl_common.h"
12
18/*******************************************************************************
19 * Definitions
20 ******************************************************************************/
21
25#define FSL_LPUART_DRIVER_VERSION (MAKE_VERSION(2, 7, 0))
29#ifndef UART_RETRY_TIMES
30#define UART_RETRY_TIMES 0U /* Defining to zero means to keep waiting for the flag until it is assert/deassert. */
31#endif
32
34enum
35{
54};
55
58{
63
66{
68#if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
69 kLPUART_SevenDataBits = 0x1U,
70#endif
72
75{
79
80#if defined(FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT) && FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT
82typedef enum _lpuart_transmit_cts_source
83{
84 kLPUART_CtsSourcePin = 0U,
85 kLPUART_CtsSourceMatchResult = 1U,
86} lpuart_transmit_cts_source_t;
87
89typedef enum _lpuart_transmit_cts_config
90{
91 kLPUART_CtsSampleAtStart = 0U,
92 kLPUART_CtsSampleAtIdle = 1U,
93} lpuart_transmit_cts_config_t;
94#endif
95
98{
102
108{
118
125{
126#if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
127 kLPUART_LinBreakInterruptEnable = (LPUART_BAUD_LBKDIE_MASK >> 8U),
128#endif
129 kLPUART_RxActiveEdgeInterruptEnable = (LPUART_BAUD_RXEDGIE_MASK >> 8U),
130 kLPUART_TxDataRegEmptyInterruptEnable = (LPUART_CTRL_TIE_MASK),
132 kLPUART_RxDataRegFullInterruptEnable = (LPUART_CTRL_RIE_MASK),
133 kLPUART_IdleLineInterruptEnable = (LPUART_CTRL_ILIE_MASK),
134 kLPUART_RxOverrunInterruptEnable = (LPUART_CTRL_ORIE_MASK),
135 kLPUART_NoiseErrorInterruptEnable = (LPUART_CTRL_NEIE_MASK),
136 kLPUART_FramingErrorInterruptEnable = (LPUART_CTRL_FEIE_MASK),
137 kLPUART_ParityErrorInterruptEnable = (LPUART_CTRL_PEIE_MASK),
138#if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
139 kLPUART_Match1InterruptEnable = (LPUART_CTRL_MA1IE_MASK),
140 kLPUART_Match2InterruptEnable = (LPUART_CTRL_MA2IE_MASK),
141#endif
142#if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
143 kLPUART_TxFifoOverflowInterruptEnable = (LPUART_FIFO_TXOFE_MASK),
144 kLPUART_RxFifoUnderflowInterruptEnable = (LPUART_FIFO_RXUFE_MASK),
145#endif
146
152#if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
153 | kLPUART_LinBreakInterruptEnable
154#endif
155#if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
156 | kLPUART_Match1InterruptEnable | kLPUART_Match2InterruptEnable
157#endif
158#if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
159 | kLPUART_TxFifoOverflowInterruptEnable | kLPUART_RxFifoUnderflowInterruptEnable
160#endif
161 ,
162};
163
170{
172 (LPUART_STAT_TDRE_MASK),
174 (LPUART_STAT_TC_MASK),
175 kLPUART_RxDataRegFullFlag = (LPUART_STAT_RDRF_MASK),
177 kLPUART_IdleLineFlag = (LPUART_STAT_IDLE_MASK),
178 kLPUART_RxOverrunFlag = (LPUART_STAT_OR_MASK),
180 kLPUART_NoiseErrorFlag = (LPUART_STAT_NF_MASK),
183 (LPUART_STAT_FE_MASK),
184 kLPUART_ParityErrorFlag = (LPUART_STAT_PF_MASK),
185#if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
186 kLPUART_LinBreakFlag = (LPUART_STAT_LBKDIF_MASK),
188#endif
189 kLPUART_RxActiveEdgeFlag = (LPUART_STAT_RXEDGIF_MASK),
192 (LPUART_STAT_RAF_MASK),
193#if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
194 kLPUART_DataMatch1Flag =
195 LPUART_STAT_MA1F_MASK,
196 kLPUART_DataMatch2Flag =
197 LPUART_STAT_MA2F_MASK,
198#endif
199#if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
200 kLPUART_TxFifoEmptyFlag =
201 (LPUART_FIFO_TXEMPT_MASK >> 16),
202 kLPUART_RxFifoEmptyFlag =
203 (LPUART_FIFO_RXEMPT_MASK >> 16),
204 kLPUART_TxFifoOverflowFlag =
205 (LPUART_FIFO_TXOF_MASK >> 16),
206 kLPUART_RxFifoUnderflowFlag =
207 (LPUART_FIFO_RXUF_MASK >> 16),
208#endif
209
212#if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
213 | kLPUART_DataMatch1Flag | kLPUART_DataMatch2Flag
214#endif
215#if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
216 | kLPUART_TxFifoOverflowFlag | kLPUART_RxFifoUnderflowFlag
217#endif
218#if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
219 | kLPUART_LinBreakFlag
220#endif
221 ,
222
223 kLPUART_AllFlags =
227#if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
228 | kLPUART_DataMatch1Flag | kLPUART_DataMatch2Flag
229#endif
230#if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
231 | kLPUART_TxFifoOverflowFlag | kLPUART_RxFifoUnderflowFlag | kLPUART_TxFifoEmptyFlag | kLPUART_RxFifoEmptyFlag
232#endif
233#if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
234 | kLPUART_LinBreakFlag
235#endif
236 ,
237};
238
240typedef struct _lpuart_config
241{
242 uint32_t baudRate_Bps;
245 bool isMsb;
246#if defined(FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT) && FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT
247 lpuart_stop_bit_count_t stopBitCount;
248#endif
249#if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
250 uint8_t txFifoWatermark;
251 uint8_t rxFifoWatermark;
252#endif
253#if defined(FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT) && FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT
254 bool enableRxRTS;
255 bool enableTxCTS;
256 lpuart_transmit_cts_source_t txCtsSource;
257 lpuart_transmit_cts_config_t txCtsConfig;
258#endif
261 bool enableTx;
262 bool enableRx;
264
266typedef struct _lpuart_transfer
267{
268 /*
269 * Use separate TX and RX data pointer, because TX data is const data.
270 * The member data is kept for backward compatibility.
271 */
272 union
273 {
274 uint8_t *data;
275 uint8_t *rxData;
276 const uint8_t *txData;
277 };
278 size_t dataSize;
280
281/* Forward declaration of the handle typedef. */
282typedef struct _lpuart_handle lpuart_handle_t;
283
285typedef void (*lpuart_transfer_callback_t)(LPUART_Type *base, lpuart_handle_t *handle, status_t status, void *userData);
286
289{
290 const uint8_t *volatile txData;
291 volatile size_t txDataSize;
293 uint8_t *volatile rxData;
294 volatile size_t rxDataSize;
297 uint8_t *rxRingBuffer;
299 volatile uint16_t rxRingBufferHead;
300 volatile uint16_t rxRingBufferTail;
303 void *userData;
305 volatile uint8_t txState;
306 volatile uint8_t rxState;
308#if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
309 bool isSevenDataBits;
310#endif
311};
312
313/* Typedef for interrupt handler. */
314typedef void (*lpuart_isr_t)(LPUART_Type *base, void *handle);
315
316/*******************************************************************************
317 * Variables
318 ******************************************************************************/
319/* Array of LPUART handle. */
320extern void *s_lpuartHandle[];
321
322/* Array of LPUART IRQ number. */
323#if defined(FSL_FEATURE_LPUART_HAS_SEPARATE_RX_TX_IRQ) && FSL_FEATURE_LPUART_HAS_SEPARATE_RX_TX_IRQ
324extern const IRQn_Type s_lpuartTxIRQ[];
325#else
326extern const IRQn_Type s_lpuartIRQ[];
327#endif
328
329/* LPUART ISR for transactional APIs. */
330extern lpuart_isr_t s_lpuartIsr[];
331
332/*******************************************************************************
333 * API
334 ******************************************************************************/
335
336#if defined(__cplusplus)
337extern "C" {
338#endif /* _cplusplus */
339
340#if defined(FSL_FEATURE_LPUART_HAS_GLOBAL) && FSL_FEATURE_LPUART_HAS_GLOBAL
341
355static inline void LPUART_SoftwareReset(LPUART_Type *base)
356{
357 base->GLOBAL |= LPUART_GLOBAL_RST_MASK;
358 base->GLOBAL &= ~LPUART_GLOBAL_RST_MASK;
359}
360/* @} */
361#endif /*FSL_FEATURE_LPUART_HAS_GLOBAL*/
362
392#ifndef __rtems__
393status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz);
394#else /* __rtems__ */
395status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz, bool do_reset);
396#endif /* __rtems__ */
397
405void LPUART_Deinit(LPUART_Type *base);
406
427/* @} */
428
448status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
449
458void LPUART_Enable9bitMode(LPUART_Type *base, bool enable);
459
477static inline void LPUART_SetMatchAddress(LPUART_Type *base, uint16_t address1, uint16_t address2)
478{
479 /* Configure match address. */
480 uint32_t address = ((uint32_t)address2 << 16U) | (uint32_t)address1 | 0x1000100UL;
481 base->MATCH = address;
482}
483
491static inline void LPUART_EnableMatchAddress(LPUART_Type *base, bool match1, bool match2)
492{
493 /* Configure match address1 enable bit. */
494 if (match1)
495 {
496 base->BAUD |= (uint32_t)LPUART_BAUD_MAEN1_MASK;
497 }
498 else
499 {
500 base->BAUD &= ~(uint32_t)LPUART_BAUD_MAEN1_MASK;
501 }
502 /* Configure match address2 enable bit. */
503 if (match2)
504 {
505 base->BAUD |= (uint32_t)LPUART_BAUD_MAEN2_MASK;
506 }
507 else
508 {
509 base->BAUD &= ~(uint32_t)LPUART_BAUD_MAEN2_MASK;
510 }
511}
512
513#if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
520static inline void LPUART_SetRxFifoWatermark(LPUART_Type *base, uint8_t water)
521{
522 assert((uint8_t)FSL_FEATURE_LPUART_FIFO_SIZEn(base) > water);
523 base->WATER = (base->WATER & ~LPUART_WATER_RXWATER_MASK) | LPUART_WATER_RXWATER(water);
524}
525
532static inline void LPUART_SetTxFifoWatermark(LPUART_Type *base, uint8_t water)
533{
534 assert((uint8_t)FSL_FEATURE_LPUART_FIFO_SIZEn(base) > water);
535 base->WATER = (base->WATER & ~LPUART_WATER_TXWATER_MASK) | LPUART_WATER_TXWATER(water);
536}
537#endif
538/* @} */
539
562uint32_t LPUART_GetStatusFlags(LPUART_Type *base);
563
583status_t LPUART_ClearStatusFlags(LPUART_Type *base, uint32_t mask);
584/* @} */
585
604void LPUART_EnableInterrupts(LPUART_Type *base, uint32_t mask);
605
619void LPUART_DisableInterrupts(LPUART_Type *base, uint32_t mask);
620
642/* @} */
643
644#if defined(FSL_FEATURE_LPUART_HAS_DMA_ENABLE) && FSL_FEATURE_LPUART_HAS_DMA_ENABLE
657static inline uint32_t LPUART_GetDataRegisterAddress(LPUART_Type *base)
658{
659 return (uint32_t) & (base->DATA);
660}
661
670static inline void LPUART_EnableTxDMA(LPUART_Type *base, bool enable)
671{
672 if (enable)
673 {
674 base->BAUD |= LPUART_BAUD_TDMAE_MASK;
675 }
676 else
677 {
678 base->BAUD &= ~LPUART_BAUD_TDMAE_MASK;
679 }
680}
681
690static inline void LPUART_EnableRxDMA(LPUART_Type *base, bool enable)
691{
692 if (enable)
693 {
694 base->BAUD |= LPUART_BAUD_RDMAE_MASK;
695 }
696 else
697 {
698 base->BAUD &= ~LPUART_BAUD_RDMAE_MASK;
699 }
700}
701/* @} */
702#endif /* FSL_FEATURE_LPUART_HAS_DMA_ENABLE */
703
715uint32_t LPUART_GetInstance(LPUART_Type *base);
716
725static inline void LPUART_EnableTx(LPUART_Type *base, bool enable)
726{
727 if (enable)
728 {
729 base->CTRL |= LPUART_CTRL_TE_MASK;
730 }
731 else
732 {
733 base->CTRL &= ~LPUART_CTRL_TE_MASK;
734 }
735}
736
745static inline void LPUART_EnableRx(LPUART_Type *base, bool enable)
746{
747 if (enable)
748 {
749 base->CTRL |= LPUART_CTRL_RE_MASK;
750 }
751 else
752 {
753 base->CTRL &= ~LPUART_CTRL_RE_MASK;
754 }
755}
756
766static inline void LPUART_WriteByte(LPUART_Type *base, uint8_t data)
767{
768 base->DATA = data;
769}
770
780static inline uint8_t LPUART_ReadByte(LPUART_Type *base)
781{
782#if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
783 uint32_t ctrl = base->CTRL;
784 uint8_t result;
785 bool isSevenDataBits = (((ctrl & LPUART_CTRL_M7_MASK) != 0U) ||
786 (((ctrl & LPUART_CTRL_M7_MASK) == 0U) && ((ctrl & LPUART_CTRL_M_MASK) == 0U) &&
787 ((ctrl & LPUART_CTRL_PE_MASK) != 0U)));
788
789 if (isSevenDataBits)
790 {
791 result = (uint8_t)(base->DATA & 0x7FU);
792 }
793 else
794 {
795 result = (uint8_t)base->DATA;
796 }
797
798 return result;
799#else
800 return (uint8_t)(base->DATA);
801#endif
802}
803
804#if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
811static inline uint8_t LPUART_GetRxFifoCount(LPUART_Type *base)
812{
813 return (uint8_t)((base->WATER & LPUART_WATER_RXCOUNT_MASK) >> LPUART_WATER_RXCOUNT_SHIFT);
814}
815
822static inline uint8_t LPUART_GetTxFifoCount(LPUART_Type *base)
823{
824 return (uint8_t)((base->WATER & LPUART_WATER_TXCOUNT_MASK) >> LPUART_WATER_TXCOUNT_SHIFT);
825}
826#endif
827
834void LPUART_SendAddress(LPUART_Type *base, uint8_t address);
835
848status_t LPUART_WriteBlocking(LPUART_Type *base, const uint8_t *data, size_t length);
849
866status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length);
867
868/* @} */
869
894 lpuart_handle_t *handle,
896 void *userData);
917
936 lpuart_handle_t *handle,
937 uint8_t *ringBuffer,
938 size_t ringBufferSize);
939
949
958
969
982status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count);
983
1011 lpuart_handle_t *handle,
1012 lpuart_transfer_t *xfer,
1013 size_t *receivedBytes);
1014
1025
1039
1048void LPUART_TransferHandleIRQ(LPUART_Type *base, void *irqHandle);
1049
1058void LPUART_TransferHandleErrorIRQ(LPUART_Type *base, void *irqHandle);
1059
1060/* @} */
1061
1062#if defined(__cplusplus)
1063}
1064#endif
1065
1068#endif /* _FSL_LPUART_H_ */
#define LPUART_WATER_RXWATER(x)
Definition: MIMXRT1052.h:32114
#define LPUART_WATER_TXWATER(x)
Definition: MIMXRT1052.h:32102
IRQn_Type
STM32H7XX Interrupt Number Definition, according to the selected device in Library_configuration_sect...
Definition: stm32h723xx.h:49
int32_t status_t
Type used for all status and error return values.
Definition: fsl_common.h:225
#define MAKE_STATUS(group, code)
Construct a status code value from a group and code number.
Definition: fsl_common.h:47
@ kStatusGroup_LPUART
Definition: fsl_common.h:96
size_t rxRingBufferSize
Definition: fsl_lpuart.h:298
bool isMsb
Definition: fsl_lpuart.h:245
void LPUART_TransferCreateHandle(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_callback_t callback, void *userData)
Initializes the LPUART handle.
Definition: fsl_lpuart.c:1154
uint8_t * rxRingBuffer
Definition: fsl_lpuart.h:297
_lpuart_idle_config
LPUART idle detected configuration. This structure defines the number of idle characters that must be...
Definition: fsl_lpuart.h:108
volatile uint8_t txState
Definition: fsl_lpuart.h:305
uint32_t LPUART_GetEnabledInterrupts(LPUART_Type *base)
Gets enabled LPUART interrupts.
Definition: fsl_lpuart.c:849
_lpuart_interrupt_enable
LPUART interrupt configuration structure, default settings all disabled.
Definition: fsl_lpuart.h:125
volatile uint16_t rxRingBufferHead
Definition: fsl_lpuart.h:299
_lpuart_parity_mode
LPUART parity mode.
Definition: fsl_lpuart.h:58
uint8_t *volatile rxData
Definition: fsl_lpuart.h:293
_lpuart_flags
LPUART status flags.
Definition: fsl_lpuart.h:170
size_t txDataSizeAll
Definition: fsl_lpuart.h:292
void LPUART_DisableInterrupts(LPUART_Type *base, uint32_t mask)
Disables LPUART interrupts according to a provided mask.
Definition: fsl_lpuart.c:801
status_t LPUART_WriteBlocking(LPUART_Type *base, const uint8_t *data, size_t length)
Writes to the transmitter register using a blocking method.
Definition: fsl_lpuart.c:970
status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz)
Initializes an LPUART instance with the user configuration structure and the peripheral clock.
Definition: fsl_lpuart.c:278
volatile uint16_t rxRingBufferTail
Definition: fsl_lpuart.h:300
void LPUART_TransferHandleErrorIRQ(LPUART_Type *base, void *irqHandle)
LPUART Error IRQ handle function.
Definition: fsl_lpuart.c:1894
void LPUART_Deinit(LPUART_Type *base)
Deinitializes a LPUART instance.
Definition: fsl_lpuart.c:506
struct _lpuart_transfer lpuart_transfer_t
LPUART transfer structure.
enum _lpuart_idle_type_select lpuart_idle_type_select_t
LPUART idle flag type defines when the receiver starts counting.
lpuart_parity_mode_t parityMode
Definition: fsl_lpuart.h:243
lpuart_idle_type_select_t rxIdleType
Definition: fsl_lpuart.h:259
void LPUART_TransferAbortReceive(LPUART_Type *base, lpuart_handle_t *handle)
Aborts the interrupt-driven data receiving.
Definition: fsl_lpuart.c:1551
const uint8_t *volatile txData
Definition: fsl_lpuart.h:290
void LPUART_TransferStartRingBuffer(LPUART_Type *base, lpuart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)
Sets up the RX ring buffer.
Definition: fsl_lpuart.c:1219
size_t LPUART_TransferGetRxRingBufferLength(LPUART_Type *base, lpuart_handle_t *handle)
Get the length of received data in RX ring buffer.
Definition: fsl_lpuart.c:171
void(* lpuart_transfer_callback_t)(LPUART_Type *base, lpuart_handle_t *handle, status_t status, void *userData)
LPUART transfer callback function.
Definition: fsl_lpuart.h:285
_lpuart_data_bits
LPUART data bits count.
Definition: fsl_lpuart.h:66
uint8_t * data
Definition: fsl_lpuart.h:274
uint8_t * rxData
Definition: fsl_lpuart.h:275
_lpuart_idle_type_select
LPUART idle flag type defines when the receiver starts counting.
Definition: fsl_lpuart.h:98
void LPUART_TransferHandleIRQ(LPUART_Type *base, void *irqHandle)
LPUART IRQ handle function.
Definition: fsl_lpuart.c:1836
enum _lpuart_data_bits lpuart_data_bits_t
LPUART data bits count.
void LPUART_TransferAbortSend(LPUART_Type *base, lpuart_handle_t *handle)
Aborts the interrupt-driven data transmit.
Definition: fsl_lpuart.c:1329
struct _lpuart_config lpuart_config_t
LPUART configuration structure.
void LPUART_SendAddress(LPUART_Type *base, uint8_t address)
Transmit an address frame in 9-bit data mode.
Definition: fsl_lpuart.c:737
status_t LPUART_TransferReceiveNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer, size_t *receivedBytes)
Receives a buffer of data using the interrupt method.
Definition: fsl_lpuart.c:1412
void LPUART_GetDefaultConfig(lpuart_config_t *config)
Gets the default configuration structure.
Definition: fsl_lpuart.c:570
volatile size_t txDataSize
Definition: fsl_lpuart.h:291
enum _lpuart_stop_bit_count lpuart_stop_bit_count_t
LPUART stop bit count.
size_t dataSize
Definition: fsl_lpuart.h:278
enum _lpuart_parity_mode lpuart_parity_mode_t
LPUART parity mode.
uint32_t LPUART_GetInstance(LPUART_Type *base)
Get the LPUART instance from peripheral base address.
Definition: fsl_lpuart.c:147
enum _lpuart_idle_config lpuart_idle_config_t
LPUART idle detected configuration. This structure defines the number of idle characters that must be...
lpuart_transfer_callback_t callback
Definition: fsl_lpuart.h:302
bool enableRx
Definition: fsl_lpuart.h:262
lpuart_idle_config_t rxIdleConfig
Definition: fsl_lpuart.h:260
void LPUART_EnableInterrupts(LPUART_Type *base, uint32_t mask)
Enables LPUART interrupts according to a provided mask.
Definition: fsl_lpuart.c:759
uint32_t LPUART_GetStatusFlags(LPUART_Type *base)
Gets LPUART status flags.
Definition: fsl_lpuart.c:887
bool enableTx
Definition: fsl_lpuart.h:261
status_t LPUART_TransferGetReceiveCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count)
Gets the number of bytes that have been received.
Definition: fsl_lpuart.c:1582
volatile uint8_t rxState
Definition: fsl_lpuart.h:306
status_t LPUART_ClearStatusFlags(LPUART_Type *base, uint32_t mask)
Clears status flags with a provided mask.
Definition: fsl_lpuart.c:920
volatile size_t rxDataSize
Definition: fsl_lpuart.h:294
_lpuart_stop_bit_count
LPUART stop bit count.
Definition: fsl_lpuart.h:75
void LPUART_TransferStopRingBuffer(LPUART_Type *base, lpuart_handle_t *handle)
Aborts the background transfer and uninstalls the ring buffer.
Definition: fsl_lpuart.c:1248
status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count)
Gets the number of bytes that have been sent out to bus.
Definition: fsl_lpuart.c:1354
void * userData
Definition: fsl_lpuart.h:303
size_t rxDataSizeAll
Definition: fsl_lpuart.h:295
status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length)
Reads the receiver data register using a blocking method.
Definition: fsl_lpuart.c:1035
void LPUART_Enable9bitMode(LPUART_Type *base, bool enable)
Enable 9-bit data mode for LPUART.
Definition: fsl_lpuart.c:703
uint32_t baudRate_Bps
Definition: fsl_lpuart.h:242
status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)
Sets the LPUART instance baudrate.
Definition: fsl_lpuart.c:615
lpuart_data_bits_t dataBitsCount
Definition: fsl_lpuart.h:244
status_t LPUART_TransferSendNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer)
Transmits a buffer of data using the interrupt method.
Definition: fsl_lpuart.c:1286
const uint8_t * txData
Definition: fsl_lpuart.h:276
@ kLPUART_IdleCharacter32
Definition: fsl_lpuart.h:114
@ kLPUART_IdleCharacter2
Definition: fsl_lpuart.h:110
@ kLPUART_IdleCharacter128
Definition: fsl_lpuart.h:116
@ kLPUART_IdleCharacter1
Definition: fsl_lpuart.h:109
@ kLPUART_IdleCharacter64
Definition: fsl_lpuart.h:115
@ kLPUART_IdleCharacter4
Definition: fsl_lpuart.h:111
@ kLPUART_IdleCharacter16
Definition: fsl_lpuart.h:113
@ kLPUART_IdleCharacter8
Definition: fsl_lpuart.h:112
@ kLPUART_TransmissionCompleteInterruptEnable
Definition: fsl_lpuart.h:131
@ kLPUART_TxDataRegEmptyInterruptEnable
Definition: fsl_lpuart.h:130
@ kLPUART_ParityErrorInterruptEnable
Definition: fsl_lpuart.h:137
@ kLPUART_FramingErrorInterruptEnable
Definition: fsl_lpuart.h:136
@ kLPUART_RxActiveEdgeInterruptEnable
Definition: fsl_lpuart.h:129
@ kLPUART_RxDataRegFullInterruptEnable
Definition: fsl_lpuart.h:132
@ kLPUART_RxOverrunInterruptEnable
Definition: fsl_lpuart.h:134
@ kLPUART_NoiseErrorInterruptEnable
Definition: fsl_lpuart.h:135
@ kLPUART_IdleLineInterruptEnable
Definition: fsl_lpuart.h:133
@ kLPUART_ParityDisabled
Definition: fsl_lpuart.h:59
@ kLPUART_ParityEven
Definition: fsl_lpuart.h:60
@ kLPUART_ParityOdd
Definition: fsl_lpuart.h:61
@ kLPUART_RxActiveFlag
Definition: fsl_lpuart.h:191
@ kLPUART_NoiseErrorFlag
Definition: fsl_lpuart.h:180
@ kLPUART_ParityErrorFlag
Definition: fsl_lpuart.h:184
@ kLPUART_RxOverrunFlag
Definition: fsl_lpuart.h:178
@ kLPUART_RxDataRegFullFlag
Definition: fsl_lpuart.h:175
@ kLPUART_TxDataRegEmptyFlag
Definition: fsl_lpuart.h:171
@ kLPUART_IdleLineFlag
Definition: fsl_lpuart.h:177
@ kLPUART_FramingErrorFlag
Definition: fsl_lpuart.h:182
@ kLPUART_TransmissionCompleteFlag
Definition: fsl_lpuart.h:173
@ kLPUART_RxActiveEdgeFlag
Definition: fsl_lpuart.h:189
@ kLPUART_EightDataBits
Definition: fsl_lpuart.h:67
@ kLPUART_IdleTypeStartBit
Definition: fsl_lpuart.h:99
@ kLPUART_IdleTypeStopBit
Definition: fsl_lpuart.h:100
@ kStatus_LPUART_RxIdle
Definition: fsl_lpuart.h:39
@ kStatus_LPUART_TxIdle
Definition: fsl_lpuart.h:38
@ kStatus_LPUART_FlagCannotClearManually
Definition: fsl_lpuart.h:42
@ kStatus_LPUART_Timeout
Definition: fsl_lpuart.h:53
@ kStatus_LPUART_FramingError
Definition: fsl_lpuart.h:48
@ kStatus_LPUART_IdleLineDetected
Definition: fsl_lpuart.h:52
@ kStatus_LPUART_RxRingBufferOverrun
Definition: fsl_lpuart.h:44
@ kStatus_LPUART_NoiseError
Definition: fsl_lpuart.h:47
@ kStatus_LPUART_RxBusy
Definition: fsl_lpuart.h:37
@ kStatus_LPUART_BaudrateNotSupport
Definition: fsl_lpuart.h:50
@ kStatus_LPUART_TxWatermarkTooLarge
Definition: fsl_lpuart.h:40
@ kStatus_LPUART_TxBusy
Definition: fsl_lpuart.h:36
@ kStatus_LPUART_RxWatermarkTooLarge
Definition: fsl_lpuart.h:41
@ kStatus_LPUART_ParityError
Definition: fsl_lpuart.h:49
@ kStatus_LPUART_Error
Definition: fsl_lpuart.h:43
@ kStatus_LPUART_RxHardwareOverrun
Definition: fsl_lpuart.h:46
@ kLPUART_OneStopBit
Definition: fsl_lpuart.h:76
@ kLPUART_TwoStopBit
Definition: fsl_lpuart.h:77
Definition: MIMXRT1052.h:31147
LPUART configuration structure.
Definition: fsl_lpuart.h:241
LPUART handle structure.
Definition: fsl_lpuart.h:289
LPUART transfer structure.
Definition: fsl_lpuart.h:267
Definition: deflate.c:114