RTEMS 6.1-rc2
Loading...
Searching...
No Matches
fsl_dcic.h
1/*
2 * Copyright 2020-2022 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#ifndef _FSL_DCIC_H_
9#define _FSL_DCIC_H_
10
11#include "fsl_common.h"
12
18/*******************************************************************************
19 * Definitions
20 ******************************************************************************/
21#ifndef DCIC_REGION_COUNT
22#define DCIC_REGION_COUNT DCIC_DCICRCS_COUNT
23#endif
24
26#define FSL_DCIC_DRIVER_VERSION (MAKE_VERSION(2, 0, 3))
27
29#define DCIC_CRC32_POLYNOMIAL 0x04C11DB7UL
30
32#define DCIC_CRC32_INIT_VALUE 0UL
33
35#define DCIC_REGION_MISMATCH_STATUS(region) (1UL << (DCIC_DCICS_ROI_MATCH_STAT_SHIFT + (region)))
36
42{
49 kDCIC_VsyncActiveLow = DCIC_DCICC_VSYNC_POL_MASK,
50 kDCIC_HsyncActiveLow = DCIC_DCICC_HSYNC_POL_MASK,
51 kDCIC_DataEnableActiveLow = DCIC_DCICC_DE_POL_MASK,
52 kDCIC_DriveDataOnRisingClkEdge = DCIC_DCICC_CLK_POL_MASK,
54};
55
61{
62 kDCIC_FunctionalInterruptStatus = DCIC_DCICS_FI_STAT_MASK,
63 kDCIC_ErrorInterruptStatus = DCIC_DCICS_EI_STAT_MASK,
80};
81
87{
88 kDCIC_FunctionalInterruptEnable = DCIC_DCICIC_FI_MASK_MASK,
89 kDCIC_ErrorInterruptEnable = DCIC_DCICIC_EI_MASK_MASK,
90};
91
95typedef struct _dcic_config
96{
99 uint8_t polarityFlags;
102
107{
108 bool lock;
109 uint16_t upperLeftX;
110 uint16_t upperLeftY;
111 uint16_t lowerRightX;
112 uint16_t lowerRightY;
113 uint32_t refCrc;
115
116#if defined(__cplusplus)
117extern "C" {
118#endif
119
120/*******************************************************************************
121 * API
122 ******************************************************************************/
123
141void DCIC_Init(DCIC_Type *base, const dcic_config_t *config);
142
150void DCIC_Deinit(DCIC_Type *base);
151
167
174static inline void DCIC_Enable(DCIC_Type *base, bool enable)
175{
176 if (enable)
177 {
178 base->DCICC |= DCIC_DCICC_IC_EN_MASK;
179 }
180 else
181 {
182 base->DCICC &= ~DCIC_DCICC_IC_EN_MASK;
183 }
184}
185
186/* @} */
187
202static inline uint32_t DCIC_GetStatusFlags(DCIC_Type *base)
203{
204 return base->DCICS;
205}
206
216static inline void DCIC_ClearStatusFlags(DCIC_Type *base, uint32_t mask)
217{
218 base->DCICS = (mask & (DCIC_DCICS_FI_STAT_MASK | DCIC_DCICS_ROI_MATCH_STAT_MASK));
219}
220
221/* @} */
222
236static inline void DCIC_LockInterruptEnabledStatus(DCIC_Type *base)
237{
238 base->DCICIC |= DCIC_DCICIC_FREEZE_MASK_MASK;
239}
240
247static inline void DCIC_EnableInterrupts(DCIC_Type *base, uint32_t mask)
248{
249 base->DCICIC &= ~mask;
250}
251
258static inline void DCIC_DisableInterrupts(DCIC_Type *base, uint32_t mask)
259{
260 base->DCICIC |= mask;
261}
262
263/* @} */
264
284void DCIC_EnableRegion(DCIC_Type *base, uint8_t regionIdx, const dcic_region_config_t *config);
285
292static inline void DCIC_DisableRegion(DCIC_Type *base, uint8_t regionIdx)
293{
294 assert(regionIdx < DCIC_REGION_COUNT);
295
296 if (regionIdx < DCIC_REGION_COUNT)
297 {
298 base->REGION[regionIdx].DCICRC &= ~DCIC_DCICRC_ROI_EN_MASK;
299 }
300}
301
309static inline void DCIC_SetRegionRefCrc(DCIC_Type *base, uint8_t regionIdx, uint32_t crc)
310{
311 assert(regionIdx < DCIC_REGION_COUNT);
312
313 if (regionIdx < DCIC_REGION_COUNT)
314 {
315 base->REGION[regionIdx].DCICRRS = crc;
316 }
317}
318
326static inline uint32_t DCIC_GetRegionCalculatedCrc(DCIC_Type *base, uint8_t regionIdx)
327{
328 uint32_t localdcicrcs = 0U;
329
330 assert(regionIdx < DCIC_REGION_COUNT);
331
332 if (regionIdx < DCIC_REGION_COUNT)
333 {
334 localdcicrcs = base->REGION[regionIdx].DCICRCS;
335 }
336
337 return localdcicrcs;
338}
339
340/* @} */
341
360static inline void DCIC_EnableMismatchExternalSignal(DCIC_Type *base, bool enable)
361{
362 if (enable)
363 {
364 base->DCICIC |= DCIC_DCICIC_EXT_SIG_EN_MASK;
365 }
366 else
367 {
368 base->DCICIC &= ~DCIC_DCICIC_EXT_SIG_EN_MASK;
369 }
370}
371
372/* @} */
373
374#if defined(__cplusplus)
375}
376#endif
380#endif /* _FSL_DCIC_H_ */
struct _dcic_config dcic_config_t
DCIC configuration.
void DCIC_Deinit(DCIC_Type *base)
Deinitialize the DCIC.
Definition: fsl_dcic.c:112
void DCIC_EnableRegion(DCIC_Type *base, uint8_t regionIdx, const dcic_region_config_t *config)
Enable the region of interest (ROI) with configuration.
Definition: fsl_dcic.c:158
uint32_t enableInterrupts
Definition: fsl_dcic.h:100
#define DCIC_REGION_MISMATCH_STATUS(region)
ROI CRC32 value mismatch status.
Definition: fsl_dcic.h:35
_dcic_interrupt_enable
Interrupts. .
Definition: fsl_dcic.h:87
bool lock
Definition: fsl_dcic.h:108
_DCIC_status_flags
Status flags. .
Definition: fsl_dcic.h:61
uint8_t polarityFlags
Definition: fsl_dcic.h:99
uint16_t lowerRightX
Definition: fsl_dcic.h:111
_DCIC_polarity_flags
DCIC display signal polarity flags .
Definition: fsl_dcic.h:42
uint32_t refCrc
Definition: fsl_dcic.h:113
struct _dcic_region_config dcic_region_config_t
Region of interest (ROI) configuration.
bool enableExternalSignal
Definition: fsl_dcic.h:97
uint16_t lowerRightY
Definition: fsl_dcic.h:112
void DCIC_Init(DCIC_Type *base, const dcic_config_t *config)
Initializes the DCIC.
Definition: fsl_dcic.c:92
uint16_t upperLeftY
Definition: fsl_dcic.h:110
void DCIC_GetDefaultConfig(dcic_config_t *config)
Get the default configuration to initialize DCIC.
Definition: fsl_dcic.c:134
uint16_t upperLeftX
Definition: fsl_dcic.h:109
@ kDCIC_ErrorInterruptEnable
Definition: fsl_dcic.h:89
@ kDCIC_FunctionalInterruptEnable
Definition: fsl_dcic.h:88
@ kDCIC_Region5MismatchStatus
Definition: fsl_dcic.h:69
@ kDCIC_ErrorInterruptStatus
Definition: fsl_dcic.h:63
@ kDCIC_Region14MismatchStatus
Definition: fsl_dcic.h:78
@ kDCIC_Region15MismatchStatus
Definition: fsl_dcic.h:79
@ kDCIC_Region12MismatchStatus
Definition: fsl_dcic.h:76
@ kDCIC_Region13MismatchStatus
Definition: fsl_dcic.h:77
@ kDCIC_Region3MismatchStatus
Definition: fsl_dcic.h:67
@ kDCIC_Region10MismatchStatus
Definition: fsl_dcic.h:74
@ kDCIC_Region2MismatchStatus
Definition: fsl_dcic.h:66
@ kDCIC_Region8MismatchStatus
Definition: fsl_dcic.h:72
@ kDCIC_Region1MismatchStatus
Definition: fsl_dcic.h:65
@ kDCIC_Region4MismatchStatus
Definition: fsl_dcic.h:68
@ kDCIC_Region6MismatchStatus
Definition: fsl_dcic.h:70
@ kDCIC_Region9MismatchStatus
Definition: fsl_dcic.h:73
@ kDCIC_Region7MismatchStatus
Definition: fsl_dcic.h:71
@ kDCIC_FunctionalInterruptStatus
Definition: fsl_dcic.h:62
@ kDCIC_Region0MismatchStatus
Definition: fsl_dcic.h:64
@ kDCIC_Region11MismatchStatus
Definition: fsl_dcic.h:75
@ kDCIC_HsyncActiveHigh
Definition: fsl_dcic.h:44
@ kDCIC_DriveDataOnRisingClkEdge
Definition: fsl_dcic.h:52
@ kDCIC_VsyncActiveHigh
Definition: fsl_dcic.h:43
@ kDCIC_DataEnableActiveLow
Definition: fsl_dcic.h:51
@ kDCIC_VsyncActiveLow
Definition: fsl_dcic.h:49
@ kDCIC_DataEnableActiveHigh
Definition: fsl_dcic.h:45
@ kDCIC_DriveDataOnFallingClkEdge
Definition: fsl_dcic.h:46
@ kDCIC_HsyncActiveLow
Definition: fsl_dcic.h:50
Definition: MIMXRT1166_cm4.h:28925
DCIC configuration.
Definition: fsl_dcic.h:96
Region of interest (ROI) configuration.
Definition: fsl_dcic.h:107
Definition: deflate.c:114