RTEMS 6.1-rc2
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Data Structures | |
struct | bfin_isr_s |
Typedefs | |
typedef struct bfin_isr_s | bfin_isr_t |
Enumerations | |
enum | e_isr_t { IRQ_PLL_WAKEUP_INTERRUPT , IRQ_DMA_ERROR_0 , IRQ_DMAR0_BLOCK_INTERRUPT , IRQ_DMAR1_BLOCK_INTERRUPT , IRQ_DMAR0_OVERFLOW_ERROR , IRQ_DMAR1_OVERFLOW_ERROR , IRQ_PPI_STATUS , IRQ_MAC_STATUS , IRQ_SPORT0_STATUS , IRQ_SPORT1_STATUS , IRQ_RESERVED_10 , IRQ_RESERVED_11 , IRQ_UART0_STATUS , IRQ_UART1_STATUS , IRQ_REAL_TIME_CLOCK , IRQ_DMA0_PPI_NFC , IRQ_DMA3_SPORT0_RX , IRQ_DMA4_SPORT0_TX , IRQ_DMA5_SPORT1_RX , IRQ_DMA6_SPORT1_TX , IRQ_TWI_INTERRUPT , IRQ_DMA7_SPI , IRQ_DMA8_UART0_RX , IRQ_DMA9_UART0_TX , IRQ_DMA10_UART1_RX , IRQ_DMA11_UART1_TX , IRQ_OTP , IRQ_GP_COUNTER , IRQ_DMA1_MAC_RX_HOSTDP , IRQ_PORT_H_INTERRUPT_A , IRQ_DMA2_MAC_TX_NFC , IRQ_PORT_H_INTERRUPT_B , SIC_ISR0_MAX , IRQ_TIMER0 = SIC_ISR0_MAX , IRQ_TIMER1 , IRQ_TIMER2 , IRQ_TIMER3 , IRQ_TIMER4 , IRQ_TIMER5 , IRQ_TIMER6 , IRQ_TIMER7 , IRQ_PORT_G_INTERRUPT_A , IRQ_PORT_G_INTERRUPT_B , IRQ_MDMA0_STREAM_0_INTERRUPT , IRQ_MDMA1_STREAM_0_INTERRUPT , IRQ_SOFTWARE_WATCHDOG_INTERRUPT , IRQ_PORT_F_INTERRUPT_A , IRQ_PORT_F_INTERRUPT_B , IRQ_SPI_STATUS , IRQ_NFC_STATUS , IRQ_HOSTDP_STATUS , IRQ_HOREAD_DONE_INTERRUPT , IRQ_RESERVED_19 , IRQ_USB_INT0_INTERRUPT , IRQ_USB_INT1_INTERRUPT , IRQ_USB_INT2_INTERRUPT , IRQ_USB_DMAINT , IRQ_MAX } |
Functions | |
rtems_status_code | bfin_interrupt_register (bfin_isr_t *isr) |
rtems_status_code | bfin_interrupt_unregister (bfin_isr_t *isr) |
void | bfin_interrupt_init (void) |
Target: TLL6527v1-0 Compiler:
COPYRIGHT (c) 2010 by ECE Northeastern University.
The license and distribution terms for this file may be found in the file LICENSE in this distribution or at http://www.rtems.org/license
LastChange:
enum e_isr_t |
The type of interrupts handled by the SIC
void bfin_interrupt_init | ( | void | ) |
blackfin interrupt initialization routine. It initializes the bfin ISR dispatcher. It will also create SIC CEC map which will be used for identifying the ISR.
Initializes the interrupt module
The bf52x has 8 IAR registers but they do not have a constant pitch.
rtems_status_code bfin_interrupt_register | ( | bfin_isr_t * | isr | ) |
This routine registers a new ISR. It will write a new entry to the IVT table
isr | contains a callback function and source |
rtems_status_code bfin_interrupt_unregister | ( | bfin_isr_t * | isr | ) |
This function unregisters a registered interrupt handler.
isr |