47#define XDMAD_TRANSFER_MEMORY 0xFF
48#define XDMAD_ALLOC_FAILED 0xFFFF
50#define XDMAD_TRANSFER_TX 0
51#define XDMAD_TRANSFER_RX 1
54#define XDMA_UBC_NDE (0x1u << 24)
55#define XDMA_UBC_NDE_FETCH_DIS (0x0u << 24)
56#define XDMA_UBC_NDE_FETCH_EN (0x1u << 24)
57#define XDMA_UBC_NSEN (0x1u << 25)
58#define XDMA_UBC_NSEN_UNCHANGED (0x0u << 25)
59#define XDMA_UBC_NSEN_UPDATED (0x1u << 25)
60#define XDMA_UBC_NDEN (0x1u << 26)
61#define XDMA_UBC_NDEN_UNCHANGED (0x0u << 26)
62#define XDMA_UBC_NDEN_UPDATED (0x1u << 26)
63#define XDMA_UBC_NVIEW_Pos 27
64#define XDMA_UBC_NVIEW_Msk (0x3u << XDMA_UBC_NVIEW_Pos)
65#define XDMA_UBC_NVIEW_NDV0 (0x0u << XDMA_UBC_NVIEW_Pos)
66#define XDMA_UBC_NVIEW_NDV1 (0x1u << XDMA_UBC_NVIEW_Pos)
67#define XDMA_UBC_NVIEW_NDV2 (0x2u << XDMA_UBC_NVIEW_Pos)
68#define XDMA_UBC_NVIEW_NDV3 (0x3u << XDMA_UBC_NVIEW_Pos)
130 uint8_t numControllers;
218extern sXdmad XDMAD_Instance;
226 uint8_t bSrcID, uint8_t bDstID);
232 uint32_t dwXdmaDescCfg,
233 uint32_t dwXdmaDescAddr,
234 uint32_t dwXdmaIntEn);
238extern eXdmadRC XDMAD_IsTransferDone(
sXdmad *pXdmad, uint32_t dwChannel);
242extern void XDMAD_DoNothingCallback(uint32_t Channel,
void *pArg, uint32_t status);
244extern bool XDMAD_UpdateStatusFromCallback(
sXdmad *pXdmad,
This header file provides the interfaces of the Assert Handler.
eXdmadRC XDMAD_ConfigureTransfer(sXdmad *pXdmad, uint32_t dwChannel, sXdmadCfg *pXdmaParam, uint32_t dwXdmaDescCfg, uint32_t dwXdmaDescAddr, uint32_t dwXdmaIntEn)
Configure DMA for a single transfer.
Definition: xdmad.c:396
eXdmadRC XDMAD_StartTransfer(sXdmad *pXdmad, uint32_t dwChannel)
Start xDMA transfer.
Definition: xdmad.c:457
eXdmadRC XDMAD_FreeChannel(sXdmad *pXdmad, uint32_t dwChannel)
Free the specified xDMA channel.
Definition: xdmad.c:263
eXdmadRC XDMAD_PrepareChannel(sXdmad *pXdmad, uint32_t dwChannel)
Enable clock of the xDMA peripheral, Enable the dma peripheral, configure configuration register for ...
Definition: xdmad.c:323
eXdmadRC XDMAD_StopTransfer(sXdmad *pXdmad, uint32_t dwChannel)
Stop DMA transfer.
Definition: xdmad.c:489
eXdmadRC XDMAD_SetCallback(sXdmad *pXdmad, uint32_t dwChannel, XdmadTransferCallback fCallback, void *pArg)
Set the callback function for xDMA channel transfer.
Definition: xdmad.c:293
uint32_t XDMAD_AllocateChannel(sXdmad *pXdmad, uint8_t bSrcID, uint8_t bDstID)
Allocate a XDMA channel for upper layer.
Definition: xdmad.c:244
struct _LinkedListDescriporView2 LinkedListDescriporView2
Structure for storing parameters for DMA view2 that can be performed by the DMA Master transfer.
enum _XdmadState eXdmadState
enum _XdmadProgState eXdmadProgState
struct _XdmadChannel sXdmadChannel
void(* XdmadTransferCallback)(uint32_t Channel, void *pArg, uint32_t status)
Definition: xdmad.h:110
_XdmadState
Definition: xdmad.h:93
enum _XdmadStatus eXdmadStatus
struct _LinkedListDescriporView0 LinkedListDescriporView0
Structure for storing parameters for DMA view0 that can be performed by the DMA Master transfer.
struct _LinkedListDescriporView3 LinkedListDescriporView3
Structure for storing parameters for DMA view3 that can be performed by the DMA Master transfer.
struct _LinkedListDescriporView1 LinkedListDescriporView1
Structure for storing parameters for DMA view1 that can be performed by the DMA Master transfer.
_XdmadProgState
Definition: xdmad.h:103
_XdmadStatus
Definition: xdmad.h:83
@ XDMAD_STATE_HALTED
Definition: xdmad.h:99
@ XDMAD_STATE_IN_XFR
Definition: xdmad.h:97
@ XDMAD_STATE_FREE
Definition: xdmad.h:94
@ XDMAD_STATE_ALLOCATED
Definition: xdmad.h:95
@ XDMAD_STATE_DONE
Definition: xdmad.h:98
@ XDMAD_STATE_START
Definition: xdmad.h:96
@ XDMAD_CANCELED
Definition: xdmad.h:89
@ XDMAD_BUSY
Definition: xdmad.h:87
@ XDMAD_ERROR
Definition: xdmad.h:88
@ XDMAD_OK
Definition: xdmad.h:84
Definition: component_xdmac.h:60
Structure for storing parameters for DMA view0 that can be performed by the DMA Master transfer.
Definition: xdmad.h:156
uint32_t mbr_nda
Definition: xdmad.h:158
uint32_t mbr_ta
Definition: xdmad.h:162
uint32_t mbr_ubc
Definition: xdmad.h:160
Structure for storing parameters for DMA view1 that can be performed by the DMA Master transfer.
Definition: xdmad.h:167
uint32_t mbr_da
Definition: xdmad.h:175
uint32_t mbr_nda
Definition: xdmad.h:169
uint32_t mbr_sa
Definition: xdmad.h:173
uint32_t mbr_ubc
Definition: xdmad.h:171
Structure for storing parameters for DMA view2 that can be performed by the DMA Master transfer.
Definition: xdmad.h:180
uint32_t mbr_da
Definition: xdmad.h:188
uint32_t mbr_cfg
Definition: xdmad.h:190
uint32_t mbr_sa
Definition: xdmad.h:186
uint32_t mbr_ubc
Definition: xdmad.h:184
uint32_t mbr_nda
Definition: xdmad.h:182
Structure for storing parameters for DMA view3 that can be performed by the DMA Master transfer.
Definition: xdmad.h:195
uint32_t mbr_cfg
Definition: xdmad.h:205
uint32_t mbr_dus
Definition: xdmad.h:213
uint32_t mbr_nda
Definition: xdmad.h:197
uint32_t mbr_ds
Definition: xdmad.h:209
uint32_t mbr_sa
Definition: xdmad.h:201
uint32_t mbr_sus
Definition: xdmad.h:211
uint32_t mbr_bc
Definition: xdmad.h:207
uint32_t mbr_ubc
Definition: xdmad.h:199
uint32_t mbr_da
Definition: xdmad.h:203
uint32_t mbr_sus
Definition: xdmad.h:149
uint32_t mbr_bc
Definition: xdmad.h:145
uint32_t mbr_dus
Definition: xdmad.h:151
uint32_t mbr_sa
Definition: xdmad.h:139
uint32_t mbr_ds
Definition: xdmad.h:147
uint32_t mbr_cfg
Definition: xdmad.h:143
uint32_t mbr_da
Definition: xdmad.h:141
uint32_t mbr_ubc
Definition: xdmad.h:137
uint8_t bDstRxIfID
Definition: xdmad.h:122
volatile uint8_t state
Definition: xdmad.h:123
uint8_t bDstPeriphID
Definition: xdmad.h:118
uint8_t bSrcTxIfID
Definition: xdmad.h:119
uint8_t bSrcPeriphID
Definition: xdmad.h:117
uint8_t bDstTxIfID
Definition: xdmad.h:121
uint8_t bIrqOwner
Definition: xdmad.h:116
XdmadTransferCallback fCallback
Definition: xdmad.h:114
void * pArg
Definition: xdmad.h:115
uint8_t bSrcRxIfID
Definition: xdmad.h:120