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uint32_t | GLBCTRL |
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uint32_t | TRENA |
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uint32_t | GSR |
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uint32_t | RAM1REG1 |
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uint32_t | RAM1REG2 |
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uint32_t | RAM2REG1 |
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uint32_t | RAM2REG2 |
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uint8_t | reserved1 [8] |
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uint32_t | PERREG1 |
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uint32_t | PERREG2 |
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uint32_t | DDMW |
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uint8_t | reserved2 [4] |
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uint32_t | PC0 |
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uint32_t | PC1 |
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uint32_t | PC2 |
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uint32_t | PC3 |
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uint32_t | PC4 |
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uint32_t | PC5 |
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uint32_t | PC6 |
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uint32_t | PC7 |
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uint32_t | PC8 |
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The documentation for this struct was generated from the following file:
- bsps/arm/tms570/include/bsp/ti_herc/reg_rtp.h
1.9.4