PwmCh_num hardware registers. More...

Data Fields
__IO uint32_t	PWM_CMR
	(PwmCh_num Offset: 0x0) PWM Channel Mode Register

__IO uint32_t	PWM_CDTY
	(PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register

__O uint32_t	PWM_CDTYUPD
	(PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register

__IO uint32_t	PWM_CPRD
	(PwmCh_num Offset: 0xC) PWM Channel Period Register

__O uint32_t	PWM_CPRDUPD
	(PwmCh_num Offset: 0x10) PWM Channel Period Update Register

__I uint32_t	PWM_CCNT
	(PwmCh_num Offset: 0x14) PWM Channel Counter Register

__IO uint32_t	PWM_DT
	(PwmCh_num Offset: 0x18) PWM Channel Dead Time Register

__O uint32_t	PWM_DTUPD
	(PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register

Detailed Description

PwmCh_num hardware registers.

The documentation for this struct was generated from the following files:

Data Fields